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/openbmc/u-boot/drivers/misc/
H A Ddp_mcu_firmware.h6 0xa0000080, 0xa0000080, 0xa0000080, 0xa00029a8,
7 0xa0002a08, 0xa0002a68, 0xa0000080, 0xa0000080,
8 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
9 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
10 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
11 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
12 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
13 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
14 0x2a801e6e, 0x5694b000, 0x29201800, 0x55290000,
15 0x54c00104, 0x54e00000, 0x05093800, 0xdc080000,
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-vpu.dtsi10 ranges = <0x2c000000 0x0 0x2c000000 0x2000000>;
11 reg = <0 0x2c000000 0 0x1000000>;
17 reg = <0x2d000000 0x20000>;
26 reg = <0x2d020000 0x20000>;
35 reg = <0x2d040000 0x20000>;
43 reg = <0x2d080000 0x10000>;
47 mboxes = <&mu_m0 0 0>,
48 <&mu_m0 0 1>,
49 <&mu_m0 1 0>;
54 reg = <0x2d090000 0x10000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Damphion,vpu.yaml20 pattern: "^vpu@[0-9a-f]+$"
43 "^mailbox@[0-9a-f]+$":
50 "^vpu-core@[0-9a-f]+$":
116 ranges = <0x2c000000 0x2c000000 0x2000000>;
117 reg = <0x2c000000 0x1000000>;
124 reg = <0x2d000000 0x20000>;
125 interrupts = <0 472 4>;
132 reg = <0x2d020000 0x20000>;
133 interrupts = <0 473 4>;
140 reg = <0x2d040000 0x20000>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
/openbmc/u-boot/board/xilinx/microblaze-generic/
H A Dxparameters.h17 #define XILINX_FLASH_START 0x2c000000
18 #define XILINX_FLASH_SIZE 0x00800000
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Dfoundation-v8-gicv3.dtsi13 ranges = <0x0 0x0 0x2f000000 0x100000>;
15 reg = <0x0 0x2f000000 0x0 0x10000>,
16 <0x0 0x2f100000 0x0 0x200000>,
17 <0x0 0x2c000000 0x0 0x2000>,
18 <0x0 0x2c010000 0x0 0x2000>,
19 <0x0 0x2c02f000 0x0 0x2000>;
26 reg = <0x20000 0x20000>;
/openbmc/u-boot/configs/
H A Domap3_overo_defconfig3 CONFIG_SYS_MALLOC_F_LEN=0x2000
17 CONFIG_CMD_SPL_NAND_OFS=0x240000
31 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
32 CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1792k(u-boot),256k(environ),8m(linux),…
41 CONFIG_SMC911X_BASE=0x2C000000
H A Dduovero_defconfig29 CONFIG_SMC911X_BASE=0x2C000000
H A Digep00x0_defconfig39 CONFIG_SMC911X_BASE=0x2C000000
H A Dtwister_defconfig4 CONFIG_SYS_TEXT_BASE=0x80008000
15 CONFIG_CMD_SPL_NAND_OFS=0x00800000
16 CONFIG_CMD_SPL_WRITE_SIZE=0x400
32 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
33 CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1m(u-boot),256k(env1),256k(env2),6m(kernel…
43 CONFIG_SMC911X_BASE=0x2C000000
H A Dcm_t35_defconfig4 CONFIG_SYS_TEXT_BASE=0x80008000
41 CONFIG_LED_STATUS_BOOT=0
47 CONFIG_SMC911X_BASE=0x2C000000
H A Domap3_evm_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x4000
7 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
11 CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
21 CONFIG_CMD_SPL_NAND_OFS=0x280000
22 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
36 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
37 CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1920k(u-boot),128k(u-boot-env),128k(dtb),6…
52 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
59 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
62 CONFIG_SMC911X_BASE=0x2C000000
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-sbc-t3730.dts21 pinctrl-0 = <&sb_t35_usb_hub_pins>;
25 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
31 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
32 <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
33 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
H A Domap3-sbc-t3530.dts21 pinctrl-0 = <&sb_t35_usb_hub_pins>;
25 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
31 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
32 <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
33 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
37 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
H A Domap3-cm-t3x30.dtsi10 cpu@0 {
27 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
28 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
34 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
35 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
36 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
37 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
38 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
39 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
40 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
[all …]
H A Domap-zoom-common.dtsi9 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
10 <7 0 0x2c000000 0x01000000>;
17 serial@3,0 {
19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
27 gpmc,mux-add-data = <0>;
48 gpmc,wait-monitoring-ns = <0>;
49 gpmc,clk-activation-ns = <0>;
55 reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
66 reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
77 reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
[all …]
H A Domap4-duovero-parlor.dts31 #size-cells = <0>;
59 pinctrl-0 = <
67 OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
73 OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
79 OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
80 OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
86 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
87 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
93 OMAP4_IOPAD(0x068, PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
94 OMAP4_IOPAD(0x06a, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
[all …]
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
/openbmc/qemu/disas/
H A Dhppa.c50 #define PA_PAGESIZE 0x1000
59 R_HPPA_FSEL = 0x0,
60 R_HPPA_LSSEL = 0x1,
61 R_HPPA_RSSEL = 0x2,
62 R_HPPA_LSEL = 0x3,
63 R_HPPA_RSEL = 0x4,
64 R_HPPA_LDSEL = 0x5,
65 R_HPPA_RDSEL = 0x6,
66 R_HPPA_LRSEL = 0x7,
67 R_HPPA_RRSEL = 0x8,
[all …]
/openbmc/u-boot/include/configs/
H A Ddevkit8000.h23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
27 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
28 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
30 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
31 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
49 #define CONFIG_DM9000_BASE 0x2c000000
51 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
63 #define CONFIG_JFFS2_PART_OFFSET 0x680000
64 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
77 "loadaddr=0x82000000\0" \
[all …]
H A Dvexpress_aemv8a.h23 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
25 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
31 #define V2M_PA_CS0 0x00000000
32 #define V2M_PA_CS1 0x14000000
33 #define V2M_PA_CS2 0x18000000
34 #define V2M_PA_CS3 0x1c000000
35 #define V2M_PA_CS4 0x0c000000
36 #define V2M_PA_CS5 0x10000000
43 #define V2M_BASE 0x80000000
52 #define V2M_UART0 0x7ff80000
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca5s.dts16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
55 reg = <0x80000000 0x40000000>;
63 /* Chipselect 2 is physically at 0x18000000 */
67 reg = <0x18000000 0x00800000>;
74 reg = <0x2a110000 0x1000>;
75 interrupts = <0 85 4>;
[all …]
/openbmc/u-boot/board/gumstix/duovero/
H A Dduovero.c39 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
44 * @return 0
51 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
53 return 0; in board_init()
61 * @return 0
65 int ret = 0; in misc_init_r()
69 val = 0xe1; in misc_init_r()
70 ret = i2c_write(TWL6030_CHIP_PM, 0xbe, 1, &val, 1); in misc_init_r()
76 gpio_direction_output(WIFI_EN, 0); in misc_init_r()
79 gpio_set_value(WIFI_EN, 0); in misc_init_r()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
/openbmc/u-boot/post/lib_powerpc/
H A Dcpu_asm.h9 #define BIT_C 0x00000001
11 #define OP_BLR 0x4e800020
12 #define OP_EXTSB 0x7c000774
13 #define OP_EXTSH 0x7c000734
14 #define OP_NEG 0x7c0000d0
15 #define OP_CNTLZW 0x7c000034
16 #define OP_ADD 0x7c000214
17 #define OP_ADDC 0x7c000014
18 #define OP_ADDME 0x7c0001d4
19 #define OP_ADDZE 0x7c000194
[all …]

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