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/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62-wakeup.dtsi11 reg = <0x00 0x43000000 0x00 0x20000>;
14 ranges = <0x0 0x00 0x43000000 0x20000>;
18 reg = <0x14 0x4>;
24 reg = <0x00 0x2b300000 0x00 0x100>;
27 clocks = <&k3_clks 114 0>;
34 reg = <0x00 0x2b200000 0x00 0x100>;
37 #size-cells = <0>;
46 reg = <0x00 0x2b1f0000 0x00 0x100>;
48 clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
56 reg = <0x00 0x2b000000 0x00 0x100>;
[all …]
H A Dk3-am62a-wakeup.dtsi11 reg = <0x00 0x43000000 0x00 0x20000>;
14 ranges = <0x00 0x00 0x43000000 0x20000>;
18 reg = <0x14 0x4>;
24 reg = <0x00 0x2b300000 0x00 0x100>;
27 clocks = <&k3_clks 114 0>;
34 reg = <0x00 0x2b200000 0x00 0x100>;
37 #size-cells = <0>;
46 reg = <0x00 0x2b1f0000 0x00 0x100>;
48 clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
57 reg = <0x00 0x2b000000 0x00 0x100>;
[all …]
H A Dk3-am65-mcu.dtsi11 reg = <0x0 0x40f00000 0x0 0x20000>;
14 ranges = <0x0 0x0 0x40f00000 0x20000>;
18 reg = <0x4040 0x4>;
26 reg = <0x0 0x40f04200 0x0 0x10>;
29 pinctrl-single,function-mask = <0x00000101>;
35 reg = <0x0 0x40f04280 0x0 0x8>;
38 pinctrl-single,function-mask = <0x00000003>;
43 reg = <0x00 0x40a00000 0x00 0x100>;
53 reg = <0x00 0x41c00000 0x00 0x80000>;
54 ranges = <0x0 0x00 0x41c00000 0x80000>;
[all …]
H A Dk3-j721s2-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
39 reg = <0x00 0x43000014 0x00 0x4>;
46 reg = <0x00 0x43600000 0x00 0x10000>,
47 <0x00 0x44880000 0x00 0x20000>,
48 <0x00 0x44860000 0x00 0x20000>;
59 reg = <0x00 0x41c00000 0x00 0x100000>;
60 ranges = <0x00 0x00 0x41c00000 0x100000>;
67 /* Proxy 0 addressing */
68 reg = <0x00 0x4301c000 0x00 0x034>;
71 pinctrl-single,function-mask = <0xffffffff>;
[all …]
H A Dk3-j7200-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
40 reg = <0x00 0x40400000 0x00 0x400>;
53 reg = <0x00 0x40410000 0x00 0x400>;
57 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 308 0>;
66 reg = <0x00 0x40420000 0x00 0x400>;
79 reg = <0x00 0x40430000 0x00 0x400>;
83 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 309 0>;
92 reg = <0x00 0x40440000 0x00 0x400>;
105 reg = <0x00 0x40450000 0x00 0x400>;
109 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 310 0>;
[all …]
H A Dk3-j784s4-mcu-wakeup.dtsi20 reg = <0x00 0x44083000 0x00 0x1000>;
44 reg = <0x00 0x43000014 0x00 0x4>;
51 reg = <0x00 0x43600000 0x00 0x10000>,
52 <0x00 0x44880000 0x00 0x20000>,
53 <0x00 0x44860000 0x00 0x20000>;
64 reg = <0x00 0x41c00000 0x00 0x100000>;
65 ranges = <0x00 0x00 0x41c00000 0x100000>;
72 /* Proxy 0 addressing */
73 reg = <0x00 0x4301c000 0x00 0x034>;
76 pinctrl-single,function-mask = <0xffffffff>;
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x0 0x1000>;
39 reg = <0x0 0x40f00000 0x0 0x20000>;
42 ranges = <0x0 0x0 0x40f00000 0x20000>;
46 reg = <0x4040 0x4>;
53 reg = <0x0 0x43000014 0x0 0x4>;
58 /* Proxy 0 addressing */
59 reg = <0x00 0x4301c000 0x00 0x178>;
62 pinctrl-single,function-mask = <0xffffffff>;
68 reg = <0x00 0x40f04200 0x00 0x28>;
71 pinctrl-single,function-mask = <0x0000000f>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Darm,hdlcd.yaml64 reg = <0x2b000000 0x1000>;
65 interrupts = <0 85 4>;
78 #size-cells = <0>;
81 reg = <0x70>;
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15-tc1.dts16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
[all …]
H A Dvexpress-v2p-ca15_a7.dts16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0>;
61 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
109 reg = <0 0x80000000 0 0x40000000>;
117 /* Chipselect 2 is physically at 0x18000000 */
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-overo-base.dtsi12 memory@0 {
14 reg = <0 0>;
51 #phy-cells = <0>;
67 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
79 pinctrl-0 = <
85 OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */
86 OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */
87 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */
88 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
94 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
[all …]
/openbmc/u-boot/board/renesas/sh7752evb/
H A Dlowlevel_init.S43 PDCR_A: .long 0xffec0006
44 PGCR_A: .long 0xffec000c
45 PJCR_A: .long 0xffec0012
46 PTCR_A: .long 0xffec0026
47 PSEL1_A: .long 0xffec0072
48 PSEL2_A: .long 0xffec0074
49 PSEL5_A: .long 0xffec007a
51 PDCR_D: .long 0x0000
52 PGCR_D: .long 0x0004
53 PJCR_D: .long 0x0000
[all …]
/openbmc/u-boot/board/renesas/sh7753evb/
H A Dlowlevel_init.S28 mov #0, r14
39 /* If CPU runs on SDRAM (PC=0x5???????) or not. */
40 PC_MASK: .long 0x20000000
66 cmp/eq #0, r0
200 EXPEVT_A: .long 0xff000024
201 EXPEVT_POWER_ON_RESET: .long 0x00000000
204 MRSTCR0_A: .long 0xffd50030
205 MRSTCR0_D: .long 0xfe1ffe7f
206 MRSTCR1_A: .long 0xffd50034
207 MRSTCR1_D: .long 0xfff3ffff
[all …]
/openbmc/u-boot/board/atmark-techno/armadillo-800eva/
H A Darmadillo-800eva.c34 volatile u32 i = 0x10000 * cnt; \
35 while (i > 0) \
39 #define USBCR1 0xE605810A
51 writew(0xA500, &rwdt0->rwtcsra0); in s_init()
52 writew(0xA500, &rwdt1->rwtcsra0); in s_init()
55 writel(0xFF800080, &cpg->rmstpcr4); in s_init()
56 writel(0xFF800080, &cpg->smstpcr4); in s_init()
59 writel(0x00000080, &cpg->usbckcr); in s_init()
63 writew(0x0710, USBCR1); in s_init()
66 writel(0x00000000, &cpg->frqcrb); in s_init()
[all …]
/openbmc/u-boot/board/overo/
H A Dovero.c34 #define TWL4030_I2C_BUS 0
36 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51
38 #define GUMSTIX_EMPTY_EEPROM 0x0
40 #define GUMSTIX_SUMMIT 0x01000200
41 #define GUMSTIX_TOBI 0x02000200
42 #define GUMSTIX_TOBI_DUO 0x03000200
43 #define GUMSTIX_PALO35 0x04000200
44 #define GUMSTIX_PALO43 0x05000200
45 #define GUMSTIX_CHESTNUT43 0x06000200
46 #define GUMSTIX_PINTO 0x07000200
[all …]
/openbmc/u-boot/board/renesas/sh7757lcr/
H A Dlowlevel_init.S73 PGDR_A: .long 0xffec0040
74 PACR_A: .long 0xffec0000
75 PBCR_A: .long 0xffec0002
76 PCCR_A: .long 0xffec0004
77 PDCR_A: .long 0xffec0006
78 PECR_A: .long 0xffec0008
79 PFCR_A: .long 0xffec000a
80 PGCR_A: .long 0xffec000c
81 PHCR_A: .long 0xffec000e
82 PICR_A: .long 0xffec0010
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/openbmc/qemu/hw/arm/
H A Dvexpress.c50 #define VEXPRESS_BOARD_ID 0x8e0
54 /* Number of virtio transports to create (0..8; limited by
98 [VE_NORFLASHALIAS] = 0,
99 /* CS7: 0x10000000 .. 0x10020000 */
100 [VE_SYSREGS] = 0x10000000,
101 [VE_SP810] = 0x10001000,
102 [VE_SERIALPCI] = 0x10002000,
103 [VE_PL041] = 0x10004000,
104 [VE_MMCI] = 0x10005000,
105 [VE_KMI0] = 0x10006000,
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]

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