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/openbmc/u-boot/board/Barix/ipam390/
H A DREADME.ipam39018 If this pin is logical 0 (low level):
51 Load address: 0xc0000000
57 NAND erase.part: device 0 offset 0x20000, size 0x160000
58 Erasing at 0x160000 -- 100% complete.
61 NAND write: device 0 offset 0x20000, size 0x78894
79 $ mono HexAIS_OMAP-L138.exe -entrypoint 0xC1080000 -ini ipam390-ais-uart.cfg \
80 -o ../current/ipam390/uboot-uart-ais.bin ./u-boot.bin@0xC1080000;
92 (AIS Parse): Read magic word 0x41504954.
97 (AIS Parse): Processing command 0: 0x5853590D.
100 (AIS Parse): Processing command 1: 0x5853590D.
[all …]
/openbmc/linux/drivers/media/pci/bt8xx/
H A Dbttv-audio-hook.c30 for (loops = 17; loops >= 0 ; loops--) { in winview_volume()
70 gpio_inout(0x300, 0x300); in gvbctv3pci_audio()
74 con = 0x000; in gvbctv3pci_audio()
77 con = 0x300; in gvbctv3pci_audio()
80 con = 0x200; in gvbctv3pci_audio()
83 gpio_bits(0x300, con); in gvbctv3pci_audio()
97 con = 0x300; in gvbctv5pci_audio()
100 con = 0x100; in gvbctv5pci_audio()
103 con = 0x000; in gvbctv5pci_audio()
106 if (con != (val & 0x300)) { in gvbctv5pci_audio()
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dzoned.out5 start: 0x0, len 0x80000, cap 0x80000, wptr 0x0, zcond:1, [type: 2]
8 start: 0x0, len 0x80000, cap 0x80000, wptr 0x0, zcond:1, [type: 2]
9 start: 0x80000, len 0x80000, cap 0x80000, wptr 0x80000, zcond:1, [type: 2]
10 start: 0x100000, len 0x80000, cap 0x80000, wptr 0x100000, zcond:1, [type: 2]
11 start: 0x180000, len 0x80000, cap 0x80000, wptr 0x180000, zcond:1, [type: 2]
12 start: 0x200000, len 0x80000, cap 0x80000, wptr 0x200000, zcond:1, [type: 2]
13 start: 0x280000, len 0x80000, cap 0x80000, wptr 0x280000, zcond:1, [type: 2]
14 start: 0x300000, len 0x80000, cap 0x80000, wptr 0x300000, zcond:1, [type: 2]
15 start: 0x380000, len 0x80000, cap 0x80000, wptr 0x380000, zcond:1, [type: 2]
16 start: 0x400000, len 0x80000, cap 0x80000, wptr 0x400000, zcond:1, [type: 2]
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-uDPU.dtsi22 memory@0 {
24 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
86 pinctrl-0 = <&spi_quad_pins>;
88 flash@0 {
90 reg = <0>;
98 partition@0 {
100 reg = <0x0 0x180000>;
105 reg = <0x180000 0x10000>;
121 pinctrl-0 = <&i2c2_pins>;
129 reg = <0x48>;
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-netgear_readynas_duo_v2.dts19 reg = <0x00000000 0x10000000>;
78 #clock-cells = <0>;
88 reg = <0x32>;
93 reg = <0x3e>;
95 fan_gear_mode = <0>;
97 pwm_polarity = <0>;
113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity
147 pinctrl-0 = <&pmx_button_power &pmx_button_backup
172 pinctrl-0 = <&pmx_poweroff>;
180 #size-cells = <0>;
[all …]
H A Dkirkwood-netgear_readynas_nv+_v2.dts19 reg = <0x00000000 0x10000000>;
83 #clock-cells = <0>;
93 reg = <0x32>;
98 reg = <0x3e>;
100 fan_gear_mode = <0>;
102 pwm_polarity = <0>;
132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
171 pinctrl-0 = <&pmx_button_power &pmx_button_backup
196 pinctrl-0 = <&pmx_poweroff>;
204 #size-cells = <0>;
[all …]
H A Darmada-370-netgear-rn102.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
64 pinctrl-0 = <&i2c0_pins>;
71 reg = <0x68>;
77 reg = <0x3e>;
79 fan_gear_mode = <0>;
[all …]
H A Darmada-370-netgear-rn104.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
52 pinctrl-0 = <&ge1_rgmii_pins>;
66 pinctrl-0 = <&i2c0_pins>;
73 reg = <0x68>;
79 reg = <0x3e>;
[all …]
H A Darmada-xp-netgear-rn2120.dts22 memory@0 {
24 reg = <0 0x00000000 0 0x80000000>; /* 2GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
31 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
48 reg = <0x3e>;
50 fan_gear_mode = <0>;
52 pwm_polarity = <0>;
58 reg = <0x48>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-moxa-uc-8410a.dts28 #clock-cells = <0>;
164 reg = <0x20>;
169 reg = <0x68>;
178 rgmii_phy0: ethernet-phy@0 {
180 reg = <0x0>;
182 <3 0x11 0 0x4415>, /* Reg 3,17 */
183 <3 0x10 0 0x77>; /* Reg 3,16 */
188 reg = <0x1>;
190 <3 0x11 0 0x4415>, /* Reg 3,17 */
191 <3 0x10 0 0x77>; /* Reg 3,16 */
[all …]
/openbmc/u-boot/drivers/ddr/imx/imx8m/
H A DKconfig22 default 0x180000
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm4708-linksys-ea6300-v1.dts19 memory@0 {
21 reg = <0x00000000 0x08000000>;
26 reg = <0x1c080000 0x180000>;
H A Dbcm4709-linksys-ea9200.dts19 memory@0 {
21 reg = <0x00000000 0x08000000>,
22 <0x88000000 0x08000000>;
27 reg = <0x1c080000 0x180000>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-nor.dtso13 fragment@0 {
17 #size-cells = <0>;
18 flash@0 {
20 reg = <0>;
28 partition@0 {
30 reg = <0x0 0x40000>;
36 reg = <0x40000 0x40000>;
41 reg = <0x80000 0x80000>;
46 reg = <0x100000 0x80000>;
52 reg = <0x180000 0xa80000>;
[all …]
/openbmc/u-boot/configs/
H A Dmccmon6_sd_defconfig3 CONFIG_SYS_TEXT_BASE=0x17800000
280x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor)…
43 CONFIG_SF_DEFAULT_MODE=0
H A Dmccmon6_nor_defconfig3 CONFIG_SYS_TEXT_BASE=0x17800000
270x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor)…
42 CONFIG_SF_DEFAULT_MODE=0
/openbmc/u-boot/board/theobroma-systems/puma_rk3399/
H A Dfit_spl_atf.its22 load = <0x00200000>;
31 load = <0x1000>;
32 entry = <0x1000>;
39 load = <0x180000>;
/openbmc/u-boot/include/configs/
H A Dat91-sama5_common.h41 #define CONFIG_ENV_OFFSET 0x2000
42 #define CONFIG_ENV_SIZE 0x1000
43 #define CONFIG_SYS_MMC_ENV_DEV 0
46 #define CONFIG_ENV_SIZE 0x4000
52 "fatload mmc 0:1 0x21000000 ${dtb_name}; " \
53 "fatload mmc 0:1 0x22000000 zImage; " \
54 "bootz 0x22000000 - 0x21000000"
60 #define CONFIG_ENV_OFFSET 0x140000
61 #define CONFIG_ENV_OFFSET_REDUND 0x100000
62 #define CONFIG_ENV_SIZE 0x20000
[all …]
H A Dmcx.h21 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
76 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
91 #define CONFIG_JFFS2_PART_OFFSET 0x680000
92 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
102 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
103 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
104 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
106 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
109 "${netmask}:${hostname}:eth0:off\0" \
110 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27-apf27.dts18 reg = <0xa0000000 0x04000000>;
23 clock-frequency = <0>;
30 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
31 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
32 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
33 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
34 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
35 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
36 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
37 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A DKconfig62 default 0x180000
/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dsnps,dw-apb-timers-pwm2.yaml64 reg = <0x180000 0x200>;
/openbmc/linux/arch/x86/kernel/
H A Damd_nb.c18 #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
19 #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
20 #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
21 #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
22 #define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
23 #define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
24 #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
25 #define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
26 #define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
27 #define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dwkup_m3_rproc.txt37 ranges = <0 0x44c00000 0x400000>;
43 reg = <0x100000 0x4000>,
44 <0x180000 0x2000>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]

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