Searched +full:0 +full:x12480000 (Results 1 – 7 of 7) sorted by relevance
10 #define DEVICE_NOT_AVAILABLE 013 #define EXYNOS4_ADDR_BASE 0x1000000016 #define EXYNOS4_I2C_SPACING 0x1000018 #define EXYNOS4_GPIO_PART3_BASE 0x0386000019 #define EXYNOS4_PRO_ID 0x1000000020 #define EXYNOS4_SYSREG_BASE 0x1001000021 #define EXYNOS4_POWER_BASE 0x1002000022 #define EXYNOS4_SWRESET 0x1002040023 #define EXYNOS4_CLOCK_BASE 0x1003000024 #define EXYNOS4_SYSTIMER_BASE 0x10050000[all …]
17 output(WDOGINT) will rise when counter is 0. The counter will reload18 the timeout value. And then, if counter decreases to 0 again and WDOGINT65 reg = <0x12480000 0x10000>;
18 #size-cells = <0>;20 U74_0: cpu@0 {22 reg = <0>;110 #clock-cells = <0>;112 clock-frequency = <0>;117 #clock-cells = <0>;119 clock-frequency = <0>;124 #clock-cells = <0>;126 clock-frequency = <0>;131 #clock-cells = <0>;[all …]
23 #size-cells = <0>;25 cpu0: cpu@0 {29 reg = <0>;54 polling-delay-passive = <0>;55 polling-delay = <0>;56 thermal-sensors = <&tsens 0>;74 polling-delay-passive = <0>;75 polling-delay = <0>;94 polling-delay-passive = <0>;95 polling-delay = <0>;[all …]
25 reg = <0x80000000 0x200000>;30 reg = <0x8f000000 0x700000>;37 #size-cells = <0>;39 CPU0: cpu@0 {43 reg = <0>;100 memory@0 {102 reg = <0x0 0x0>;111 coefficients = <1199 0>;132 coefficients = <1132 0>;153 coefficients = <1199 0>;[all …]
199 #size-cells = <0>;212 cpu0: cpu@0 {215 reg = <0>;259 xusbxti: clock-0 {261 clock-frequency = <0>;262 #clock-cells = <0>;268 clock-frequency = <0>;269 #clock-cells = <0>;275 clock-frequency = <0>;276 #clock-cells = <0>;[all …]
68 reg = <0x03810000 0x0c>;79 reg = <0x03830000 0x100>;88 samsung,idma-addr = <0x03000000>;95 reg = <0x10000000 0x100>;100 reg = <0x10500000 0x2000>;105 reg = <0x12570000 0x14>;110 reg = <0x10023c40 0x20>;111 #power-domain-cells = <0>;117 reg = <0x10023c60 0x20>;118 #power-domain-cells = <0>;[all …]