Searched +full:0 +full:x11d00000 (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
H A D | cpu.h | 10 #define DEVICE_NOT_AVAILABLE 0 13 #define EXYNOS4_ADDR_BASE 0x10000000 16 #define EXYNOS4_I2C_SPACING 0x10000 18 #define EXYNOS4_GPIO_PART3_BASE 0x03860000 19 #define EXYNOS4_PRO_ID 0x10000000 20 #define EXYNOS4_SYSREG_BASE 0x10010000 21 #define EXYNOS4_POWER_BASE 0x10020000 22 #define EXYNOS4_SWRESET 0x10020400 23 #define EXYNOS4_CLOCK_BASE 0x10030000 24 #define EXYNOS4_SYSTIMER_BASE 0x10050000 [all …]
|
/openbmc/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos850.dtsi | 52 #clock-cells = <0>; 57 #size-cells = <0>; 91 cpu0: cpu@0 { 94 reg = <0x0>; 100 reg = <0x1>; 106 reg = <0x2>; 112 reg = <0x3>; 118 reg = <0x100>; 124 reg = <0x101>; 130 reg = <0x102>; [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt7981-pinctrl.yaml | 85 "wa_aice1" "wa_aice" 0, 1 86 "wa_aice2" "wa_aice" 0, 1 87 "wm_uart_0" "uart" 0, 1 88 "dfd" "dfd" 0, 1, 4, 5 388 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 396 enum: [0, 1, 2, 3] 400 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' [all …]
|
/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt7986a.dtsi | 21 #size-cells = <0>; 22 cpu0: cpu@0 { 24 reg = <0x0>; 32 reg = <0x1>; 40 reg = <0x2>; 48 reg = <0x3>; 58 #clock-cells = <0>; 73 reg = <0 0x43000000 0 0x30000>; 79 reg = <0 0x4fc00000 0 0x00100000>; 83 reg = <0 0x4fd00000 0 0x40000>; [all …]
|
H A D | mt8192.dtsi | 34 #clock-cells = <0>; 43 #clock-cells = <0>; 50 #clock-cells = <0>; 57 #size-cells = <0>; 59 cpu0: cpu@0 { 62 reg = <0x000>; 73 performance-domains = <&performance 0>; 80 reg = <0x100>; 91 performance-domains = <&performance 0>; 98 reg = <0x200>; [all …]
|
H A D | mt8195.dtsi | 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x000>; 58 performance-domains = <&performance 0>; 75 reg = <0x100>; 77 performance-domains = <&performance 0>; 94 reg = <0x200>; 96 performance-domains = <&performance 0>; 113 reg = <0x300>; 115 performance-domains = <&performance 0>; [all …]
|