Home
last modified time | relevance | path

Searched +full:0 +full:x04a02000 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,am65x-dss.yaml84 port@0:
130 reg = <0x04a00000 0x1000>, /* common */
131 <0x04a02000 0x1000>, /* vidl1 */
132 <0x04a06000 0x1000>, /* vid */
133 <0x04a07000 0x1000>, /* ovr1 */
134 <0x04a08000 0x1000>, /* ovr2 */
135 <0x04a0a000 0x1000>, /* vp1 */
136 <0x04a0b000 0x1000>; /* vp2 */
148 #size-cells = <0>;
149 port@0 {
[all …]
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dumc-sld8.c33 static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x55990b11, 0x66bb0f17};
34 static u32 umc_cmdctla_plus[DRAM_FREQ_NR] = {0x45990b11, 0x46bb0f17};
35 static u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x16958944, 0x18c6ab44};
36 static u32 umc_cmdctlb_plus[DRAM_FREQ_NR] = {0x16958924, 0x18c6ab24};
38 {0x00240512, 0x00350512, 0x00000000}, /* no data for 1333MHz,128MB */
39 {0x002b0617, 0x003f0617, 0x00670617},
41 static u32 umc_spcctlb[DRAM_FREQ_NR] = {0x00ff0006, 0x00ff0008};
42 static u32 umc_rdatactl[DRAM_FREQ_NR] = {0x000a00ac, 0x000c00ac};
51 writel(0x00000000, ssif_base + 0x0000b004); in umc_start_ssif()
52 writel(0xffffffff, ssif_base + 0x0000c004); in umc_start_ssif()
[all …]
H A Dumc-pro4.c27 static u32 umc_spcctla[DRAM_SZ_NR] = {0x002b0617, 0x003f0617, 0x00770617};
31 writel(0x00000000, ssif_base + 0x0000b004); in umc_start_ssif()
32 writel(0xffffffff, ssif_base + 0x0000c004); in umc_start_ssif()
33 writel(0x000fffcf, ssif_base + 0x0000c008); in umc_start_ssif()
34 writel(0x00000001, ssif_base + 0x0000b000); in umc_start_ssif()
35 writel(0x00000001, ssif_base + 0x0000c000); in umc_start_ssif()
37 writel(0x03010100, ssif_base + UMC_HDMCHSEL); in umc_start_ssif()
38 writel(0x03010101, ssif_base + UMC_MDMCHSEL); in umc_start_ssif()
39 writel(0x03010100, ssif_base + UMC_DVCCHSEL); in umc_start_ssif()
40 writel(0x03010100, ssif_base + UMC_DMDCHSEL); in umc_start_ssif()
[all …]
H A Dumc-ld4.c32 static u32 umc_cmdctla_plus[DRAM_FREQ_NR] = {0x45990b11, 0x36bb0f17};
33 static u32 umc_cmdctlb_plus[DRAM_FREQ_NR] = {0x16958924, 0x18c6aa24};
35 {0x00240512, 0x00350512},
36 {0x002b0617, 0x003f0617},
38 static u32 umc_spcctlb[DRAM_FREQ_NR] = {0x00ff0006, 0x00ff0008};
39 static u32 umc_rdatactl[DRAM_FREQ_NR] = {0x000a00ac, 0x000c00ae};
48 writel(0x00000000, ssif_base + 0x0000b004); in umc_start_ssif()
49 writel(0xffffffff, ssif_base + 0x0000c004); in umc_start_ssif()
50 writel(0x000fffcf, ssif_base + 0x0000c008); in umc_start_ssif()
51 writel(0x00000001, ssif_base + 0x0000b000); in umc_start_ssif()
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]