Home
last modified time | relevance | path

Searched +full:0 +full:x01300000 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/arch/mips/include/asm/sn/sn0/
H A Daddrs.h57 #define NASID_BITMASK (0x1ffLL)
62 #define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
63 #define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
70 #define NASID_BITMASK (0xffLL)
76 #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
77 #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
90 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
106 #define BWIN_WIDGET_MASK 0x7
150 #define MISC_PROM_BASE PHYS_TO_K0(0x01300000)
151 #define MISC_PROM_SIZE 0x200000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml162 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
163 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
164 <0 0x01300000 0 0x50000>;
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,qcs404-pinctrl.yaml71 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9])$"
141 reg = <0x01000000 0x200000>,
142 <0x01300000 0x200000>,
143 <0x07b00000 0x200000>;
146 gpio-ranges = <&tlmm 0 0 120>;
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Daldebaran_ip_offset.h35 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C20, 0x02408C00, 0, 0, 0, 0 } },
36 { { 0, 0, 0, 0, 0, 0 } },
37 { { 0, 0, 0, 0, 0, 0 } },
38 { { 0, 0, 0, 0, 0, 0 } },
39 { { 0, 0, 0, 0, 0, 0 } },
40 { { 0, 0, 0, 0, 0, 0 } },
41 { { 0, 0, 0, 0, 0, 0 } } } };
42 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } },
43 { { 0x00016E00, 0x02401C00, 0, 0, 0, 0 } },
44 { { 0x00017000, 0x02402000, 0, 0, 0, 0 } },
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dqcs404.dtsi24 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #size-cells = <0>;
42 reg = <0x100>;
56 reg = <0x101>;
70 reg = <0x102>;
84 reg = <0x103>;
104 CPU_SLEEP_0: cpu-sleep-0 {
107 arm,psci-suspend-param = <0x40000003>;
161 reg = <0 0x80000000 0 0>;
[all …]
H A Dsdm845.dtsi77 #clock-cells = <0>;
84 #clock-cells = <0>;
91 #size-cells = <0>;
93 CPU0: cpu@0 {
96 reg = <0x0 0x0>;
97 clocks = <&cpufreq_hw 0>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
125 reg = <0x0 0x100>;
126 clocks = <&cpufreq_hw 0>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]