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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcsky,apb-intc.txt46 reg = <0x00500000 0x400>;
53 reg = <0x00500000 0x400>;
60 reg = <0x00500000 0x400>;
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-382-rd-ac3x-48g4x2xl.dts29 reg = <0x00000000 0x20000000>; /* 512MB */
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
40 pinctrl-0 = <&i2c0_pins>;
45 reg = <0x53>;
48 /* CPLD device present at 0x3c. Function unknown */
53 pinctrl-0 = <&uart0_pins>;
65 pinctrl-0 = <&mdio_pins>;
67 phy0: ethernet-phy@0 {
68 reg = <0>;
[all …]
H A Dkirkwood-guruplug-server-plus.dts13 reg = <0x00000000 0x20000000>;
58 pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
84 partition@0 {
86 reg = <0x00000000 0x00100000>;
92 reg = <0x00100000 0x00400000>;
97 reg = <0x00500000 0x1fb00000>;
104 ethphy0: ethernet-phy@0 {
106 compatible = "ethernet-phy-id0141.0cb0",
108 reg = <0>;
113 compatible = "ethernet-phy-id0141.0cb0",
[all …]
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91sam9x5.h17 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
23 #define ATMEL_ID_USART0 5 /* USART 0 */
27 #define ATMEL_ID_TWI0 9 /* Two-Wire Interface 0 */
30 #define ATMEL_ID_HSMCI0 12 /* High Speed Multimedia Card Interface 0 */
31 #define ATMEL_ID_SPI0 13 /* Serial Peripheral Interface 0 */
33 #define ATMEL_ID_UART0 15 /* UART 0 */
35 #define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
38 #define ATMEL_ID_DMAC0 20 /* DMA Controller 0 */
53 #define ATMEL_BASE_SPI0 0xf0000000
54 #define ATMEL_BASE_SPI1 0xf0004000
[all …]
/openbmc/u-boot/include/configs/
H A Drk3368_common.h16 #define CONFIG_SYS_SDRAM_BASE 0
17 #define SDRAM_MAX_SIZE 0xff000000
27 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
28 #define CONFIG_SYS_LOAD_ADDR 0x00280000
30 #define CONFIG_SPL_TEXT_BASE 0x00000000
31 #define CONFIG_SPL_MAX_SIZE 0x40000
32 #define CONFIG_SPL_BSS_START_ADDR 0x400000
33 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000
37 "scriptaddr=0x00500000\0" \
38 "pxefile_addr_r=0x00600000\0" \
[all …]
H A Drk3328_common.h17 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
18 #define CONFIG_SYS_LOAD_ADDR 0x00800800
26 #define CONFIG_SYS_SDRAM_BASE 0
27 #define SDRAM_MAX_SIZE 0xff000000
32 "scriptaddr=0x00500000\0" \
33 "pxefile_addr_r=0x00600000\0" \
34 "fdt_addr_r=0x01f00000\0" \
35 "kernel_addr_r=0x02080000\0" \
36 "ramdisk_addr_r=0x04000000\0"
41 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
H A Drk3399_common.h19 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
20 #define CONFIG_SYS_LOAD_ADDR 0x00800800
21 #define CONFIG_SPL_STACK 0xff8effff
22 #define CONFIG_SPL_TEXT_BASE 0xff8c2000
23 #define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000
25 #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000
26 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000
38 #define CONFIG_SYS_SDRAM_BASE 0
39 #define SDRAM_MAX_SIZE 0xf8000000
44 "scriptaddr=0x00500000\0" \
[all …]
H A Dthunderx_88xx.h15 #define MEM_BASE 0x00500000
20 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
23 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
26 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
39 #define GICD_BASE (0x801000000000)
40 #define GICR_BASE (0x801000002000)
41 #define CONFIG_SYS_SERIAL0 0x87e024000000
42 #define CONFIG_SYS_SERIAL1 0x87e025000000
52 #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
56 #define UBOOT_IMG_HEAD_SIZE 0x40
[all …]
H A Dat91sam9261ek.h54 #define CONFIG_SYS_SDRAM_BASE 0x20000000
55 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
62 #define CONFIG_SYS_NAND_BASE 0x40000000
75 #define CONFIG_DM9000_BASE 0x30000000
88 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
96 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
99 #define CONFIG_SYS_MEMTEST_END 0x23e00000
104 #define CONFIG_ENV_OFFSET 0x4200
105 #define CONFIG_ENV_SIZE 0x4200
106 #define CONFIG_ENV_SECT_SIZE 0x210
[all …]
/openbmc/u-boot/configs/
H A Dthunderx_88xx_defconfig3 CONFIG_SYS_TEXT_BASE=0x00500000
4 CONFIG_DEBUG_UART_BASE=0x87e024000000
11 CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait r…
/openbmc/linux/arch/parisc/mm/
H A Dioremap.c22 if ((phys_addr >= 0x00080000 && end < 0x000fffff) || in ioremap_prot()
23 (phys_addr >= 0x00500000 && end < 0x03bfffff)) in ioremap_prot()
24 phys_addr |= F_EXTEND(0xfc000000); in ioremap_prot()
/openbmc/linux/arch/sh/configs/
H A Dpolaris_defconfig15 CONFIG_MEMORY_START=0x0C000000
28 …ck2 rootfstype=jffs2 mem=63M mtdparts=physmap-flash.0:0x00100000(bootloader)ro,0x00500000(Kernel)r…
46 CONFIG_MTD_PHYSMAP_START=0x00000000
47 CONFIG_MTD_PHYSMAP_LEN=0x01000000
/openbmc/linux/arch/arm/mach-s3c/
H A Dmap-base.h13 /* Fit all our registers in at 0xF6000000 upwards, trying to use as
21 #define S3C_ADDR_BASE 0xF6000000
29 #define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
30 #define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
31 #define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
32 #define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
33 #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
34 #define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
46 #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
/openbmc/linux/arch/sh/include/mach-se/mach/
H A Dse7721.h16 #define PA_ROM 0xa0000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
18 #define PA_FROM 0xa1000000 /* Flash-ROM */
19 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
20 #define PA_EXT1 0xa4000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
23 #define PA_SDRAM_SIZE 0x04000000
25 #define PA_EXT4 0xb0000000
26 #define PA_EXT4_SIZE 0x04000000
[all …]
H A Dse7722.h17 #define PA_ROM 0xa0000000 /* EPROM */
18 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
19 #define PA_FROM 0xa1000000 /* Flash-ROM */
20 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
21 #define PA_EXT1 0xa4000000
22 #define PA_EXT1_SIZE 0x04000000
23 #define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */
24 #define PA_SDRAM_SIZE 0x04000000
26 #define PA_EXT4 0xb0000000
27 #define PA_EXT4_SIZE 0x04000000
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/images/firmware-image-juno/
H A Dimages-r0.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r2.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r1.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
/openbmc/u-boot/doc/
H A DREADME.lynxkdi42 #define CONFIG_SYS_IMMR 0xFA200000
43 #define CONFIG_SYS_BCSR 0xFA100000
44 #define CONFIG_SYS_BR1_PRELIM 0xFA101801
50 LynxOS: -a 0x00004000 -e 0x00004020
51 BlueCat: -a 0x00500000 -e 0x00507000
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dp1021mds.dts23 reg = <0x0 0xffe05000 0x0 0x1000>;
26 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
27 0x1 0x0 0x0 0xf8000000 0x00008000
28 0x2 0x0 0x0 0xf8010000 0x00020000
29 0x3 0x0 0x0 0xf8020000 0x00020000>;
31 nand@0,0 {
36 reg = <0x0 0x0 0x40000>;
38 partition@0 {
41 reg = <0x0 0x00100000>;
48 reg = <0x00100000 0x00100000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dkirkwood-guruplug-server-plus.dts13 reg = <0x00000000 0x20000000>;
58 pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
84 partition@0 {
86 reg = <0x00000000 0x00100000>;
92 reg = <0x00100000 0x00400000>;
97 reg = <0x00500000 0x1fb00000>;
104 ethphy0: ethernet-phy@0 {
106 compatible = "ethernet-phy-id0141.0cb0",
108 reg = <0>;
113 compatible = "ethernet-phy-id0141.0cb0",
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Datmel,lcdc.txt31 reg = <0x00500000 0x1000>;
32 interrupts = <23 3 0>;
34 pinctrl-0 = <&pinctrl_fb>;
45 reg = <0x00700000 0x1000 0x70000000 0x200000>;
68 atmel,dmacon = <0x1>;
69 atmel,lcdcon2 = <0x80008002>;
/openbmc/linux/arch/powerpc/boot/dts/
H A Da3m071.dts26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
41 reg = <0x2000 0x100>;
42 interrupts = <2 1 0>;
63 reg = <0x2c00 0x100>;
64 interrupts = <2 4 0>;
73 reg = <0x03>;
94 ranges = <0 0 0xfc000000 0x02000000
[all …]
H A Duc101.dts75 phy0: ethernet-phy@0 {
77 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
105 ranges = <0 0 0xff800000 0x00800000
106 1 0 0x80000000 0x00800000
107 3 0 0x80000000 0x00800000>;
109 flash@0,0 {
111 reg = <0 0 0x00800000>;
117 partition@0 {
[all …]
/openbmc/linux/arch/nios2/
H A DKconfig126 default "0x00500000"
152 default "0x80000000"
166 default "0xc0000000"
178 default "0xe0000000"

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