Searched defs:sunxi_mctl_phy_reg (Results 1 – 4 of 4) sorted by relevance
162 struct sunxi_mctl_phy_reg { struct163 u8 res0[0x04]; /* 0x00 */164 u32 pir; /* 0x04 */165 u32 pgcr0; /* 0x08 phy general configuration register */166 u32 pgcr1; /* 0x0c phy general configuration register */167 u32 pgsr0; /* 0x10 */168 u32 pgsr1; /* 0x14 */169 u32 dllgcr; /* 0x18 */170 u32 ptr0; /* 0x1c */171 u32 ptr1; /* 0x20 */[all …]
140 struct sunxi_mctl_phy_reg { struct141 u32 ver; /* 0x000 guess based on similar PHYs */142 u32 pir; /* 0x004 */143 u8 reserved_0x008[8]; /* 0x008 */148 u32 pgcr[8]; /* 0x010 */153 u8 reserved_0x030[4]; /* 0x030 */154 u32 pgsr[3]; /* 0x034 */155 u32 ptr[7]; /* 0x040 */163 u8 reserved_0x05c[36]; /* 0x05c */164 u32 unk_0x080; /* 0x080 */[all …]
156 struct sunxi_mctl_phy_reg { struct157 u8 res0[0x04]; /* 0x00 */158 u32 pir; /* 0x04 */159 u32 pgcr; /* 0x08 phy general configuration register */160 u32 pgsr; /* 0x0c */161 u32 dllgcr; /* 0x10 */162 u32 acdllcr; /* 0x14 */163 u32 ptr0; /* 0x18 */164 u32 ptr1; /* 0x1c */165 u32 ptr2; /* 0x20 */[all …]
92 struct sunxi_mctl_phy_reg { struct93 u8 res0[0x04]; /* 0x00 revision id ??? */94 u32 pir; /* 0x04 PHY initialisation register */95 u32 pgcr[4]; /* 0x08 PHY general configuration register */96 u32 pgsr[2]; /* 0x18 PHY general status register */97 u32 pllcr; /* 0x20 PLL control register */98 u32 ptr[5]; /* 0x24 PHY timing register */99 u32 acmdlr; /* 0x38 AC master delay line register */100 u32 aclcdlr; /* 0x3c AC local calibrated delay line reg */101 u32 acbdlr[10]; /* 0x40 AC bit delay line register */[all …]