1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/soundwire/sdw_registers.h>
15
16 #include "rt722-sdca.h"
17 #include "rt722-sdca-sdw.h"
18
rt722_sdca_readable_register(struct device * dev,unsigned int reg)19 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
20 {
21 switch (reg) {
22 case 0x2f01 ... 0x2f0a:
23 case 0x2f35 ... 0x2f36:
24 case 0x2f50:
25 case 0x2f54:
26 case 0x2f58 ... 0x2f5d:
27 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE,
28 0):
29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
30 0):
31 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE,
32 0):
33 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
34 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
35 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
36 RT722_SDCA_CTL_FU_MUTE, CH_R):
37 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D,
38 RT722_SDCA_CTL_SELECTED_MODE, 0):
39 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
40 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
41 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
42 RT722_SDCA_CTL_FU_MUTE, CH_R):
43 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
44 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
45 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
46 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
47 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01,
48 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
49 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11,
50 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
51 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
52 RT722_SDCA_CTL_FU_MUTE, CH_01) ...
53 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
54 RT722_SDCA_CTL_FU_MUTE, CH_04):
55 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26,
56 RT722_SDCA_CTL_VENDOR_DEF, 0):
57 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
58 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
59 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F,
60 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
61 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
62 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
63 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
64 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
65 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
66 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
67 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
68 RT722_SDCA_CTL_FU_MUTE, CH_R):
69 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23,
70 RT722_SDCA_CTL_VENDOR_DEF, CH_08):
71 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
72 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
73 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
74 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
75 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
76 return true;
77 default:
78 return false;
79 }
80 }
81
rt722_sdca_volatile_register(struct device * dev,unsigned int reg)82 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
83 {
84 switch (reg) {
85 case 0x2f01:
86 case 0x2f54:
87 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
88 0):
89 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
90 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
91 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
92 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
93 return true;
94 default:
95 return false;
96 }
97 }
98
rt722_sdca_mbq_readable_register(struct device * dev,unsigned int reg)99 static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
100 {
101 switch (reg) {
102 case 0x2000000 ... 0x2000024:
103 case 0x2000029 ... 0x200004a:
104 case 0x2000051 ... 0x2000052:
105 case 0x200005a ... 0x200005b:
106 case 0x2000061 ... 0x2000069:
107 case 0x200006b:
108 case 0x2000070:
109 case 0x200007f:
110 case 0x2000082 ... 0x200008e:
111 case 0x2000090 ... 0x2000094:
112 case 0x3110000:
113 case 0x5300000 ... 0x5300002:
114 case 0x5400002:
115 case 0x5600000 ... 0x5600007:
116 case 0x5700000 ... 0x5700004:
117 case 0x5800000 ... 0x5800004:
118 case 0x5810000:
119 case 0x5b00003:
120 case 0x5c00011:
121 case 0x5d00006:
122 case 0x5f00000 ... 0x5f0000d:
123 case 0x5f00030:
124 case 0x6100000 ... 0x6100051:
125 case 0x6100055 ... 0x6100057:
126 case 0x6100060:
127 case 0x6100062:
128 case 0x6100064 ... 0x6100065:
129 case 0x6100067:
130 case 0x6100070 ... 0x610007c:
131 case 0x6100080:
132 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
133 CH_01) ...
134 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
135 CH_04):
136 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
137 CH_01):
138 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
139 CH_02):
140 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
141 CH_03):
142 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
143 CH_04):
144 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L):
145 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R):
146 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
147 CH_L):
148 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
149 CH_R):
150 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
151 CH_L):
152 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
153 CH_R):
154 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
155 RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
156 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
157 RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
158 return true;
159 default:
160 return false;
161 }
162 }
163
rt722_sdca_mbq_volatile_register(struct device * dev,unsigned int reg)164 static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
165 {
166 switch (reg) {
167 case 0x2000000:
168 case 0x200000d:
169 case 0x2000019:
170 case 0x2000020:
171 case 0x2000030:
172 case 0x2000046:
173 case 0x2000067:
174 case 0x2000084:
175 case 0x2000086:
176 case 0x3110000:
177 return true;
178 default:
179 return false;
180 }
181 }
182
183 static const struct regmap_config rt722_sdca_regmap = {
184 .reg_bits = 32,
185 .val_bits = 8,
186 .readable_reg = rt722_sdca_readable_register,
187 .volatile_reg = rt722_sdca_volatile_register,
188 .max_register = 0x44ffffff,
189 .reg_defaults = rt722_sdca_reg_defaults,
190 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults),
191 .cache_type = REGCACHE_MAPLE,
192 .use_single_read = true,
193 .use_single_write = true,
194 };
195
196 static const struct regmap_config rt722_sdca_mbq_regmap = {
197 .name = "sdw-mbq",
198 .reg_bits = 32,
199 .val_bits = 16,
200 .readable_reg = rt722_sdca_mbq_readable_register,
201 .volatile_reg = rt722_sdca_mbq_volatile_register,
202 .max_register = 0x41000312,
203 .reg_defaults = rt722_sdca_mbq_defaults,
204 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_mbq_defaults),
205 .cache_type = REGCACHE_MAPLE,
206 .use_single_read = true,
207 .use_single_write = true,
208 };
209
rt722_sdca_update_status(struct sdw_slave * slave,enum sdw_slave_status status)210 static int rt722_sdca_update_status(struct sdw_slave *slave,
211 enum sdw_slave_status status)
212 {
213 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
214
215 if (status == SDW_SLAVE_UNATTACHED)
216 rt722->hw_init = false;
217
218 if (status == SDW_SLAVE_ATTACHED) {
219 if (rt722->hs_jack) {
220 /*
221 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
222 * if the device attached again, we will need to set the setting back.
223 * It could avoid losing the jack detection interrupt.
224 * This also could sync with the cache value as the rt722_sdca_jack_init set.
225 */
226 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
227 SDW_SCP_SDCA_INTMASK_SDCA_6);
228 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
229 SDW_SCP_SDCA_INTMASK_SDCA_8);
230 }
231 }
232
233 /*
234 * Perform initialization only if slave status is present and
235 * hw_init flag is false
236 */
237 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED)
238 return 0;
239
240 /* perform I/O transfers required for Slave initialization */
241 return rt722_sdca_io_init(&slave->dev, slave);
242 }
243
rt722_sdca_read_prop(struct sdw_slave * slave)244 static int rt722_sdca_read_prop(struct sdw_slave *slave)
245 {
246 struct sdw_slave_prop *prop = &slave->prop;
247 int nval;
248 int i, j;
249 u32 bit;
250 unsigned long addr;
251 struct sdw_dpn_prop *dpn;
252
253 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
254 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
255
256 prop->paging_support = true;
257
258 /*
259 * port = 1 for headphone playback
260 * port = 2 for headset-mic capture
261 * port = 3 for speaker playback
262 * port = 6 for digital-mic capture
263 */
264 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */
265 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */
266
267 nval = hweight32(prop->source_ports);
268 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
269 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
270 if (!prop->src_dpn_prop)
271 return -ENOMEM;
272
273 i = 0;
274 dpn = prop->src_dpn_prop;
275 addr = prop->source_ports;
276 for_each_set_bit(bit, &addr, 32) {
277 dpn[i].num = bit;
278 dpn[i].type = SDW_DPN_FULL;
279 dpn[i].simple_ch_prep_sm = true;
280 dpn[i].ch_prep_timeout = 10;
281 i++;
282 }
283
284 /* do this again for sink now */
285 nval = hweight32(prop->sink_ports);
286 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
287 sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
288 if (!prop->sink_dpn_prop)
289 return -ENOMEM;
290
291 j = 0;
292 dpn = prop->sink_dpn_prop;
293 addr = prop->sink_ports;
294 for_each_set_bit(bit, &addr, 32) {
295 dpn[j].num = bit;
296 dpn[j].type = SDW_DPN_FULL;
297 dpn[j].simple_ch_prep_sm = true;
298 dpn[j].ch_prep_timeout = 10;
299 j++;
300 }
301
302 /* set the timeout values */
303 prop->clk_stop_timeout = 900;
304
305 /* wake-up event */
306 prop->wake_capable = 1;
307
308 return 0;
309 }
310
rt722_sdca_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)311 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave,
312 struct sdw_slave_intr_status *status)
313 {
314 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
315 int ret, stat;
316 int count = 0, retry = 3;
317 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
318
319 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) {
320 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
321 /* avoid the HID owner doesn't change to device */
322 if (rt722->scp_sdca_stat2)
323 scp_sdca_stat2 = rt722->scp_sdca_stat2;
324 }
325
326 /*
327 * The critical section below intentionally protects a rather large piece of code.
328 * We don't want to allow the system suspend to disable an interrupt while we are
329 * processing it, which could be problematic given the quirky SoundWire interrupt
330 * scheme. We do want however to prevent new workqueues from being scheduled if
331 * the disable_irq flag was set during system suspend.
332 */
333 mutex_lock(&rt722->disable_irq_lock);
334
335 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
336 if (ret < 0)
337 goto io_error;
338 rt722->scp_sdca_stat1 = ret;
339 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
340 if (ret < 0)
341 goto io_error;
342 rt722->scp_sdca_stat2 = ret;
343 if (scp_sdca_stat2)
344 rt722->scp_sdca_stat2 |= scp_sdca_stat2;
345 do {
346 /* clear flag */
347 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
348 if (ret < 0)
349 goto io_error;
350 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
351 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
352 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0);
353 if (ret < 0)
354 goto io_error;
355 } else if (ret & SDW_SCP_SDCA_INTMASK_SDCA_6) {
356 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
357 SDW_SCP_SDCA_INT_SDCA_6, SDW_SCP_SDCA_INT_SDCA_6);
358 if (ret < 0)
359 goto io_error;
360 }
361 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
362 if (ret < 0)
363 goto io_error;
364 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
365 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2,
366 SDW_SCP_SDCA_INTMASK_SDCA_8);
367 if (ret < 0)
368 goto io_error;
369 }
370
371 /* check if flag clear or not */
372 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT);
373 if (ret < 0)
374 goto io_error;
375 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
376
377 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
378 if (ret < 0)
379 goto io_error;
380 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
381
382 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
383 if (ret < 0)
384 goto io_error;
385 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
386
387 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
388
389 count++;
390 } while (stat != 0 && count < retry);
391
392 if (stat)
393 dev_warn(&slave->dev,
394 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
395 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
396
397 if (status->sdca_cascade && !rt722->disable_irq)
398 mod_delayed_work(system_power_efficient_wq,
399 &rt722->jack_detect_work, msecs_to_jiffies(280));
400
401 mutex_unlock(&rt722->disable_irq_lock);
402
403 return 0;
404
405 io_error:
406 mutex_unlock(&rt722->disable_irq_lock);
407 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
408 return ret;
409 }
410
411 static struct sdw_slave_ops rt722_sdca_slave_ops = {
412 .read_prop = rt722_sdca_read_prop,
413 .interrupt_callback = rt722_sdca_interrupt_callback,
414 .update_status = rt722_sdca_update_status,
415 };
416
rt722_sdca_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)417 static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
418 const struct sdw_device_id *id)
419 {
420 struct regmap *regmap, *mbq_regmap;
421
422 /* Regmap Initialization */
423 mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt722_sdca_mbq_regmap);
424 if (IS_ERR(mbq_regmap))
425 return PTR_ERR(mbq_regmap);
426
427 regmap = devm_regmap_init_sdw(slave, &rt722_sdca_regmap);
428 if (IS_ERR(regmap))
429 return PTR_ERR(regmap);
430
431 return rt722_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
432 }
433
rt722_sdca_sdw_remove(struct sdw_slave * slave)434 static int rt722_sdca_sdw_remove(struct sdw_slave *slave)
435 {
436 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
437
438 if (rt722->hw_init) {
439 cancel_delayed_work_sync(&rt722->jack_detect_work);
440 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
441 }
442
443 if (rt722->first_hw_init)
444 pm_runtime_disable(&slave->dev);
445
446 mutex_destroy(&rt722->calibrate_mutex);
447 mutex_destroy(&rt722->disable_irq_lock);
448
449 return 0;
450 }
451
452 static const struct sdw_device_id rt722_sdca_id[] = {
453 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0),
454 {},
455 };
456 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id);
457
rt722_sdca_dev_suspend(struct device * dev)458 static int __maybe_unused rt722_sdca_dev_suspend(struct device *dev)
459 {
460 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
461
462 if (!rt722->hw_init)
463 return 0;
464
465 cancel_delayed_work_sync(&rt722->jack_detect_work);
466 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
467
468 regcache_cache_only(rt722->regmap, true);
469 regcache_cache_only(rt722->mbq_regmap, true);
470
471 return 0;
472 }
473
rt722_sdca_dev_system_suspend(struct device * dev)474 static int __maybe_unused rt722_sdca_dev_system_suspend(struct device *dev)
475 {
476 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev);
477 struct sdw_slave *slave = dev_to_sdw_dev(dev);
478 int ret1, ret2;
479
480 if (!rt722_sdca->hw_init)
481 return 0;
482
483 /*
484 * prevent new interrupts from being handled after the
485 * deferred work completes and before the parent disables
486 * interrupts on the link
487 */
488 mutex_lock(&rt722_sdca->disable_irq_lock);
489 rt722_sdca->disable_irq = true;
490 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
491 SDW_SCP_SDCA_INTMASK_SDCA_0 | SDW_SCP_SDCA_INTMASK_SDCA_6, 0);
492 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
493 SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
494 mutex_unlock(&rt722_sdca->disable_irq_lock);
495
496 if (ret1 < 0 || ret2 < 0) {
497 /* log but don't prevent suspend from happening */
498 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
499 }
500
501 return rt722_sdca_dev_suspend(dev);
502 }
503
504 #define RT722_PROBE_TIMEOUT 5000
505
rt722_sdca_dev_resume(struct device * dev)506 static int __maybe_unused rt722_sdca_dev_resume(struct device *dev)
507 {
508 struct sdw_slave *slave = dev_to_sdw_dev(dev);
509 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
510 unsigned long time;
511
512 if (!rt722->first_hw_init)
513 return 0;
514
515 if (!slave->unattach_request) {
516 mutex_lock(&rt722->disable_irq_lock);
517 if (rt722->disable_irq == true) {
518 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_6);
519 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8);
520 rt722->disable_irq = false;
521 }
522 mutex_unlock(&rt722->disable_irq_lock);
523 goto regmap_sync;
524 }
525
526 time = wait_for_completion_timeout(&slave->initialization_complete,
527 msecs_to_jiffies(RT722_PROBE_TIMEOUT));
528 if (!time) {
529 dev_err(&slave->dev, "Initialization not complete, timed out\n");
530 sdw_show_ping_status(slave->bus, true);
531
532 return -ETIMEDOUT;
533 }
534
535 regmap_sync:
536 slave->unattach_request = 0;
537 regcache_cache_only(rt722->regmap, false);
538 regcache_sync(rt722->regmap);
539 regcache_cache_only(rt722->mbq_regmap, false);
540 regcache_sync(rt722->mbq_regmap);
541 return 0;
542 }
543
544 static const struct dev_pm_ops rt722_sdca_pm = {
545 SET_SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume)
546 SET_RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL)
547 };
548
549 static struct sdw_driver rt722_sdca_sdw_driver = {
550 .driver = {
551 .name = "rt722-sdca",
552 .owner = THIS_MODULE,
553 .pm = &rt722_sdca_pm,
554 },
555 .probe = rt722_sdca_sdw_probe,
556 .remove = rt722_sdca_sdw_remove,
557 .ops = &rt722_sdca_slave_ops,
558 .id_table = rt722_sdca_id,
559 };
560 module_sdw_driver(rt722_sdca_sdw_driver);
561
562 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
563 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
564 MODULE_LICENSE("GPL");
565