1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/soundwire/sdw_registers.h>
15
16 #include "rt722-sdca.h"
17 #include "rt722-sdca-sdw.h"
18
rt722_sdca_readable_register(struct device * dev,unsigned int reg)19 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
20 {
21 switch (reg) {
22 case 0x2f01 ... 0x2f0a:
23 case 0x2f35 ... 0x2f36:
24 case 0x2f50:
25 case 0x2f54:
26 case 0x2f58 ... 0x2f5d:
27 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE,
28 0):
29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
30 0):
31 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
32 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
33 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
34 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
35 return true;
36 default:
37 return false;
38 }
39 }
40
rt722_sdca_volatile_register(struct device * dev,unsigned int reg)41 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
42 {
43 switch (reg) {
44 case 0x2f01:
45 case 0x2f54:
46 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
47 0):
48 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
49 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
50 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
51 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
52 return true;
53 default:
54 return false;
55 }
56 }
57
rt722_sdca_mbq_readable_register(struct device * dev,unsigned int reg)58 static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
59 {
60 switch (reg) {
61 case 0x2000000 ... 0x2000024:
62 case 0x2000029 ... 0x200004a:
63 case 0x2000051 ... 0x2000052:
64 case 0x200005a ... 0x200005b:
65 case 0x2000061 ... 0x2000069:
66 case 0x200006b:
67 case 0x2000070:
68 case 0x200007f:
69 case 0x2000082 ... 0x200008e:
70 case 0x2000090 ... 0x2000094:
71 case 0x3110000:
72 case 0x5300000 ... 0x5300002:
73 case 0x5400002:
74 case 0x5600000 ... 0x5600007:
75 case 0x5700000 ... 0x5700004:
76 case 0x5800000 ... 0x5800004:
77 case 0x5b00003:
78 case 0x5c00011:
79 case 0x5d00006:
80 case 0x5f00000 ... 0x5f0000d:
81 case 0x5f00030:
82 case 0x6100000 ... 0x6100051:
83 case 0x6100055 ... 0x6100057:
84 case 0x6100062:
85 case 0x6100064 ... 0x6100065:
86 case 0x6100067:
87 case 0x6100070 ... 0x610007c:
88 case 0x6100080:
89 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
90 CH_01) ...
91 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
92 CH_04):
93 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
94 CH_01):
95 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
96 CH_02):
97 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
98 CH_03):
99 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
100 CH_04):
101 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L):
102 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R):
103 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
104 CH_L):
105 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
106 CH_R):
107 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
108 CH_L):
109 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
110 CH_R):
111 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
112 RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
113 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
114 RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
115 return true;
116 default:
117 return false;
118 }
119 }
120
rt722_sdca_mbq_volatile_register(struct device * dev,unsigned int reg)121 static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
122 {
123 switch (reg) {
124 case 0x2000000:
125 case 0x200000d:
126 case 0x2000019:
127 case 0x2000020:
128 case 0x2000030:
129 case 0x2000046:
130 case 0x2000067:
131 case 0x2000084:
132 case 0x2000086:
133 case 0x3110000:
134 return true;
135 default:
136 return false;
137 }
138 }
139
140 static const struct regmap_config rt722_sdca_regmap = {
141 .reg_bits = 32,
142 .val_bits = 8,
143 .readable_reg = rt722_sdca_readable_register,
144 .volatile_reg = rt722_sdca_volatile_register,
145 .max_register = 0x44ffffff,
146 .reg_defaults = rt722_sdca_reg_defaults,
147 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults),
148 .cache_type = REGCACHE_MAPLE,
149 .use_single_read = true,
150 .use_single_write = true,
151 };
152
153 static const struct regmap_config rt722_sdca_mbq_regmap = {
154 .name = "sdw-mbq",
155 .reg_bits = 32,
156 .val_bits = 16,
157 .readable_reg = rt722_sdca_mbq_readable_register,
158 .volatile_reg = rt722_sdca_mbq_volatile_register,
159 .max_register = 0x41000312,
160 .reg_defaults = rt722_sdca_mbq_defaults,
161 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_mbq_defaults),
162 .cache_type = REGCACHE_MAPLE,
163 .use_single_read = true,
164 .use_single_write = true,
165 };
166
rt722_sdca_update_status(struct sdw_slave * slave,enum sdw_slave_status status)167 static int rt722_sdca_update_status(struct sdw_slave *slave,
168 enum sdw_slave_status status)
169 {
170 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
171
172 if (status == SDW_SLAVE_UNATTACHED)
173 rt722->hw_init = false;
174
175 if (status == SDW_SLAVE_ATTACHED) {
176 if (rt722->hs_jack) {
177 /*
178 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
179 * if the device attached again, we will need to set the setting back.
180 * It could avoid losing the jack detection interrupt.
181 * This also could sync with the cache value as the rt722_sdca_jack_init set.
182 */
183 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
184 SDW_SCP_SDCA_INTMASK_SDCA_6);
185 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
186 SDW_SCP_SDCA_INTMASK_SDCA_8);
187 }
188 }
189
190 /*
191 * Perform initialization only if slave status is present and
192 * hw_init flag is false
193 */
194 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED)
195 return 0;
196
197 /* perform I/O transfers required for Slave initialization */
198 return rt722_sdca_io_init(&slave->dev, slave);
199 }
200
rt722_sdca_read_prop(struct sdw_slave * slave)201 static int rt722_sdca_read_prop(struct sdw_slave *slave)
202 {
203 struct sdw_slave_prop *prop = &slave->prop;
204 int nval;
205 int i, j;
206 u32 bit;
207 unsigned long addr;
208 struct sdw_dpn_prop *dpn;
209
210 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
211 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
212
213 prop->paging_support = true;
214
215 /*
216 * port = 1 for headphone playback
217 * port = 2 for headset-mic capture
218 * port = 3 for speaker playback
219 * port = 6 for digital-mic capture
220 */
221 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */
222 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */
223
224 nval = hweight32(prop->source_ports);
225 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
226 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
227 if (!prop->src_dpn_prop)
228 return -ENOMEM;
229
230 i = 0;
231 dpn = prop->src_dpn_prop;
232 addr = prop->source_ports;
233 for_each_set_bit(bit, &addr, 32) {
234 dpn[i].num = bit;
235 dpn[i].type = SDW_DPN_FULL;
236 dpn[i].simple_ch_prep_sm = true;
237 dpn[i].ch_prep_timeout = 10;
238 i++;
239 }
240
241 /* do this again for sink now */
242 nval = hweight32(prop->sink_ports);
243 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
244 sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
245 if (!prop->sink_dpn_prop)
246 return -ENOMEM;
247
248 j = 0;
249 dpn = prop->sink_dpn_prop;
250 addr = prop->sink_ports;
251 for_each_set_bit(bit, &addr, 32) {
252 dpn[j].num = bit;
253 dpn[j].type = SDW_DPN_FULL;
254 dpn[j].simple_ch_prep_sm = true;
255 dpn[j].ch_prep_timeout = 10;
256 j++;
257 }
258
259 /* set the timeout values */
260 prop->clk_stop_timeout = 900;
261
262 /* wake-up event */
263 prop->wake_capable = 1;
264
265 return 0;
266 }
267
rt722_sdca_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)268 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave,
269 struct sdw_slave_intr_status *status)
270 {
271 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
272 int ret, stat;
273 int count = 0, retry = 3;
274 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
275
276 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) {
277 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
278 /* avoid the HID owner doesn't change to device */
279 if (rt722->scp_sdca_stat2)
280 scp_sdca_stat2 = rt722->scp_sdca_stat2;
281 }
282
283 /*
284 * The critical section below intentionally protects a rather large piece of code.
285 * We don't want to allow the system suspend to disable an interrupt while we are
286 * processing it, which could be problematic given the quirky SoundWire interrupt
287 * scheme. We do want however to prevent new workqueues from being scheduled if
288 * the disable_irq flag was set during system suspend.
289 */
290 mutex_lock(&rt722->disable_irq_lock);
291
292 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
293 if (ret < 0)
294 goto io_error;
295 rt722->scp_sdca_stat1 = ret;
296 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
297 if (ret < 0)
298 goto io_error;
299 rt722->scp_sdca_stat2 = ret;
300 if (scp_sdca_stat2)
301 rt722->scp_sdca_stat2 |= scp_sdca_stat2;
302 do {
303 /* clear flag */
304 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
305 if (ret < 0)
306 goto io_error;
307 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
308 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
309 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0);
310 if (ret < 0)
311 goto io_error;
312 } else if (ret & SDW_SCP_SDCA_INTMASK_SDCA_6) {
313 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
314 SDW_SCP_SDCA_INT_SDCA_6, SDW_SCP_SDCA_INT_SDCA_6);
315 if (ret < 0)
316 goto io_error;
317 }
318 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
319 if (ret < 0)
320 goto io_error;
321 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
322 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2,
323 SDW_SCP_SDCA_INTMASK_SDCA_8);
324 if (ret < 0)
325 goto io_error;
326 }
327
328 /* check if flag clear or not */
329 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT);
330 if (ret < 0)
331 goto io_error;
332 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
333
334 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
335 if (ret < 0)
336 goto io_error;
337 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
338
339 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
340 if (ret < 0)
341 goto io_error;
342 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
343
344 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
345
346 count++;
347 } while (stat != 0 && count < retry);
348
349 if (stat)
350 dev_warn(&slave->dev,
351 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
352 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
353
354 if (status->sdca_cascade && !rt722->disable_irq)
355 mod_delayed_work(system_power_efficient_wq,
356 &rt722->jack_detect_work, msecs_to_jiffies(280));
357
358 mutex_unlock(&rt722->disable_irq_lock);
359
360 return 0;
361
362 io_error:
363 mutex_unlock(&rt722->disable_irq_lock);
364 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
365 return ret;
366 }
367
368 static struct sdw_slave_ops rt722_sdca_slave_ops = {
369 .read_prop = rt722_sdca_read_prop,
370 .interrupt_callback = rt722_sdca_interrupt_callback,
371 .update_status = rt722_sdca_update_status,
372 };
373
rt722_sdca_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)374 static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
375 const struct sdw_device_id *id)
376 {
377 struct regmap *regmap, *mbq_regmap;
378
379 /* Regmap Initialization */
380 mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt722_sdca_mbq_regmap);
381 if (IS_ERR(mbq_regmap))
382 return PTR_ERR(mbq_regmap);
383
384 regmap = devm_regmap_init_sdw(slave, &rt722_sdca_regmap);
385 if (IS_ERR(regmap))
386 return PTR_ERR(regmap);
387
388 return rt722_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
389 }
390
rt722_sdca_sdw_remove(struct sdw_slave * slave)391 static int rt722_sdca_sdw_remove(struct sdw_slave *slave)
392 {
393 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
394
395 if (rt722->hw_init) {
396 cancel_delayed_work_sync(&rt722->jack_detect_work);
397 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
398 }
399
400 if (rt722->first_hw_init)
401 pm_runtime_disable(&slave->dev);
402
403 mutex_destroy(&rt722->calibrate_mutex);
404 mutex_destroy(&rt722->disable_irq_lock);
405
406 return 0;
407 }
408
409 static const struct sdw_device_id rt722_sdca_id[] = {
410 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0),
411 {},
412 };
413 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id);
414
rt722_sdca_dev_suspend(struct device * dev)415 static int __maybe_unused rt722_sdca_dev_suspend(struct device *dev)
416 {
417 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
418
419 if (!rt722->hw_init)
420 return 0;
421
422 cancel_delayed_work_sync(&rt722->jack_detect_work);
423 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
424
425 regcache_cache_only(rt722->regmap, true);
426 regcache_cache_only(rt722->mbq_regmap, true);
427
428 return 0;
429 }
430
rt722_sdca_dev_system_suspend(struct device * dev)431 static int __maybe_unused rt722_sdca_dev_system_suspend(struct device *dev)
432 {
433 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev);
434 struct sdw_slave *slave = dev_to_sdw_dev(dev);
435 int ret1, ret2;
436
437 if (!rt722_sdca->hw_init)
438 return 0;
439
440 /*
441 * prevent new interrupts from being handled after the
442 * deferred work completes and before the parent disables
443 * interrupts on the link
444 */
445 mutex_lock(&rt722_sdca->disable_irq_lock);
446 rt722_sdca->disable_irq = true;
447 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
448 SDW_SCP_SDCA_INTMASK_SDCA_0 | SDW_SCP_SDCA_INTMASK_SDCA_6, 0);
449 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
450 SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
451 mutex_unlock(&rt722_sdca->disable_irq_lock);
452
453 if (ret1 < 0 || ret2 < 0) {
454 /* log but don't prevent suspend from happening */
455 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
456 }
457
458 return rt722_sdca_dev_suspend(dev);
459 }
460
461 #define RT722_PROBE_TIMEOUT 5000
462
rt722_sdca_dev_resume(struct device * dev)463 static int __maybe_unused rt722_sdca_dev_resume(struct device *dev)
464 {
465 struct sdw_slave *slave = dev_to_sdw_dev(dev);
466 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
467 unsigned long time;
468
469 if (!rt722->first_hw_init)
470 return 0;
471
472 if (!slave->unattach_request) {
473 mutex_lock(&rt722->disable_irq_lock);
474 if (rt722->disable_irq == true) {
475 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_6);
476 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8);
477 rt722->disable_irq = false;
478 }
479 mutex_unlock(&rt722->disable_irq_lock);
480 goto regmap_sync;
481 }
482
483 time = wait_for_completion_timeout(&slave->initialization_complete,
484 msecs_to_jiffies(RT722_PROBE_TIMEOUT));
485 if (!time) {
486 dev_err(&slave->dev, "Initialization not complete, timed out\n");
487 sdw_show_ping_status(slave->bus, true);
488
489 return -ETIMEDOUT;
490 }
491
492 regmap_sync:
493 slave->unattach_request = 0;
494 regcache_cache_only(rt722->regmap, false);
495 regcache_sync(rt722->regmap);
496 regcache_cache_only(rt722->mbq_regmap, false);
497 regcache_sync(rt722->mbq_regmap);
498 return 0;
499 }
500
501 static const struct dev_pm_ops rt722_sdca_pm = {
502 SET_SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume)
503 SET_RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL)
504 };
505
506 static struct sdw_driver rt722_sdca_sdw_driver = {
507 .driver = {
508 .name = "rt722-sdca",
509 .owner = THIS_MODULE,
510 .pm = &rt722_sdca_pm,
511 },
512 .probe = rt722_sdca_sdw_probe,
513 .remove = rt722_sdca_sdw_remove,
514 .ops = &rt722_sdca_slave_ops,
515 .id_table = rt722_sdca_id,
516 };
517 module_sdw_driver(rt722_sdca_sdw_driver);
518
519 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
520 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
521 MODULE_LICENSE("GPL");
522