1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/bitops.h>
10 #include <sound/core.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <sound/initval.h>
14 #include <sound/jack.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <sound/pcm.h>
19 #include <linux/pm_runtime.h>
20 #include <sound/pcm_params.h>
21 #include <linux/soundwire/sdw_registers.h>
22 #include <linux/slab.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/tlv.h>
25
26 #include "rt722-sdca.h"
27
rt722_sdca_index_write(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int value)28 int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
29 unsigned int nid, unsigned int reg, unsigned int value)
30 {
31 struct regmap *regmap = rt722->mbq_regmap;
32 unsigned int addr = (nid << 20) | reg;
33 int ret;
34
35 ret = regmap_write(regmap, addr, value);
36 if (ret < 0)
37 dev_err(&rt722->slave->dev,
38 "Failed to set private value: %06x <= %04x ret=%d\n",
39 addr, value, ret);
40
41 return ret;
42 }
43
rt722_sdca_index_read(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int * value)44 int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,
45 unsigned int nid, unsigned int reg, unsigned int *value)
46 {
47 int ret;
48 struct regmap *regmap = rt722->mbq_regmap;
49 unsigned int addr = (nid << 20) | reg;
50
51 ret = regmap_read(regmap, addr, value);
52 if (ret < 0)
53 dev_err(&rt722->slave->dev,
54 "Failed to get private value: %06x => %04x ret=%d\n",
55 addr, *value, ret);
56
57 return ret;
58 }
59
rt722_sdca_index_update_bits(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)60 static int rt722_sdca_index_update_bits(struct rt722_sdca_priv *rt722,
61 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
62 {
63 unsigned int tmp;
64 int ret;
65
66 ret = rt722_sdca_index_read(rt722, nid, reg, &tmp);
67 if (ret < 0)
68 return ret;
69
70 set_mask_bits(&tmp, mask, val);
71 return rt722_sdca_index_write(rt722, nid, reg, tmp);
72 }
73
rt722_sdca_btn_type(unsigned char * buffer)74 static int rt722_sdca_btn_type(unsigned char *buffer)
75 {
76 if ((*buffer & 0xf0) == 0x10 || (*buffer & 0x0f) == 0x01 || (*(buffer + 1) == 0x01) ||
77 (*(buffer + 1) == 0x10))
78 return SND_JACK_BTN_2;
79 else if ((*buffer & 0xf0) == 0x20 || (*buffer & 0x0f) == 0x02 || (*(buffer + 1) == 0x02) ||
80 (*(buffer + 1) == 0x20))
81 return SND_JACK_BTN_3;
82 else if ((*buffer & 0xf0) == 0x40 || (*buffer & 0x0f) == 0x04 || (*(buffer + 1) == 0x04) ||
83 (*(buffer + 1) == 0x40))
84 return SND_JACK_BTN_0;
85 else if ((*buffer & 0xf0) == 0x80 || (*buffer & 0x0f) == 0x08 || (*(buffer + 1) == 0x08) ||
86 (*(buffer + 1) == 0x80))
87 return SND_JACK_BTN_1;
88
89 return 0;
90 }
91
rt722_sdca_button_detect(struct rt722_sdca_priv * rt722)92 static unsigned int rt722_sdca_button_detect(struct rt722_sdca_priv *rt722)
93 {
94 unsigned int btn_type = 0, offset, idx, val, owner;
95 int ret;
96 unsigned char buf[3];
97
98 /* get current UMP message owner */
99 ret = regmap_read(rt722->regmap,
100 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
101 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), &owner);
102 if (ret < 0)
103 return 0;
104
105 /* if owner is device then there is no button event from device */
106 if (owner == 1)
107 return 0;
108
109 /* read UMP message offset */
110 ret = regmap_read(rt722->regmap,
111 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
112 RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
113 if (ret < 0)
114 goto _end_btn_det_;
115
116 for (idx = 0; idx < sizeof(buf); idx++) {
117 ret = regmap_read(rt722->regmap,
118 RT722_BUF_ADDR_HID1 + offset + idx, &val);
119 if (ret < 0)
120 goto _end_btn_det_;
121 buf[idx] = val & 0xff;
122 }
123
124 if (buf[0] == 0x11)
125 btn_type = rt722_sdca_btn_type(&buf[1]);
126
127 _end_btn_det_:
128 /* Host is owner, so set back to device */
129 if (owner == 0)
130 /* set owner to device */
131 regmap_write(rt722->regmap,
132 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
133 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), 0x01);
134
135 return btn_type;
136 }
137
rt722_sdca_headset_detect(struct rt722_sdca_priv * rt722)138 static int rt722_sdca_headset_detect(struct rt722_sdca_priv *rt722)
139 {
140 unsigned int det_mode;
141 int ret;
142
143 /* get detected_mode */
144 ret = regmap_read(rt722->regmap,
145 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
146 RT722_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
147 if (ret < 0)
148 goto io_error;
149
150 switch (det_mode) {
151 case 0x00:
152 rt722->jack_type = 0;
153 break;
154 case 0x03:
155 rt722->jack_type = SND_JACK_HEADPHONE;
156 break;
157 case 0x05:
158 rt722->jack_type = SND_JACK_HEADSET;
159 break;
160 }
161
162 /* write selected_mode */
163 if (det_mode) {
164 ret = regmap_write(rt722->regmap,
165 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
166 RT722_SDCA_CTL_SELECTED_MODE, 0), det_mode);
167 if (ret < 0)
168 goto io_error;
169 }
170
171 dev_dbg(&rt722->slave->dev,
172 "%s, detected_mode=0x%x\n", __func__, det_mode);
173
174 return 0;
175
176 io_error:
177 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
178 return ret;
179 }
180
rt722_sdca_jack_detect_handler(struct work_struct * work)181 static void rt722_sdca_jack_detect_handler(struct work_struct *work)
182 {
183 struct rt722_sdca_priv *rt722 =
184 container_of(work, struct rt722_sdca_priv, jack_detect_work.work);
185 int btn_type = 0, ret;
186
187 if (!rt722->hs_jack)
188 return;
189
190 if (!rt722->component->card || !rt722->component->card->instantiated)
191 return;
192
193 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */
194 if (rt722->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_6) {
195 ret = rt722_sdca_headset_detect(rt722);
196 if (ret < 0)
197 return;
198 }
199
200 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */
201 if (rt722->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8)
202 btn_type = rt722_sdca_button_detect(rt722);
203
204 if (rt722->jack_type == 0)
205 btn_type = 0;
206
207 dev_dbg(&rt722->slave->dev,
208 "in %s, jack_type=%d\n", __func__, rt722->jack_type);
209 dev_dbg(&rt722->slave->dev,
210 "in %s, btn_type=0x%x\n", __func__, btn_type);
211 dev_dbg(&rt722->slave->dev,
212 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
213 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
214
215 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type | btn_type,
216 SND_JACK_HEADSET |
217 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
218 SND_JACK_BTN_2 | SND_JACK_BTN_3);
219
220 if (btn_type) {
221 /* button released */
222 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type,
223 SND_JACK_HEADSET |
224 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
225 SND_JACK_BTN_2 | SND_JACK_BTN_3);
226
227 mod_delayed_work(system_power_efficient_wq,
228 &rt722->jack_btn_check_work, msecs_to_jiffies(200));
229 }
230 }
231
rt722_sdca_btn_check_handler(struct work_struct * work)232 static void rt722_sdca_btn_check_handler(struct work_struct *work)
233 {
234 struct rt722_sdca_priv *rt722 =
235 container_of(work, struct rt722_sdca_priv, jack_btn_check_work.work);
236 int btn_type = 0, ret, idx;
237 unsigned int det_mode, offset, val;
238 unsigned char buf[3];
239
240 ret = regmap_read(rt722->regmap,
241 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
242 RT722_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
243 if (ret < 0)
244 goto io_error;
245
246 /* pin attached */
247 if (det_mode) {
248 /* read UMP message offset */
249 ret = regmap_read(rt722->regmap,
250 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
251 RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
252 if (ret < 0)
253 goto io_error;
254
255 for (idx = 0; idx < sizeof(buf); idx++) {
256 ret = regmap_read(rt722->regmap,
257 RT722_BUF_ADDR_HID1 + offset + idx, &val);
258 if (ret < 0)
259 goto io_error;
260 buf[idx] = val & 0xff;
261 }
262
263 if (buf[0] == 0x11)
264 btn_type = rt722_sdca_btn_type(&buf[1]);
265 } else
266 rt722->jack_type = 0;
267
268 dev_dbg(&rt722->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type);
269 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type | btn_type,
270 SND_JACK_HEADSET |
271 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
272 SND_JACK_BTN_2 | SND_JACK_BTN_3);
273
274 if (btn_type) {
275 /* button released */
276 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type,
277 SND_JACK_HEADSET |
278 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
279 SND_JACK_BTN_2 | SND_JACK_BTN_3);
280
281 mod_delayed_work(system_power_efficient_wq,
282 &rt722->jack_btn_check_work, msecs_to_jiffies(200));
283 }
284
285 return;
286
287 io_error:
288 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
289 }
290
rt722_sdca_jack_init(struct rt722_sdca_priv * rt722)291 static void rt722_sdca_jack_init(struct rt722_sdca_priv *rt722)
292 {
293 mutex_lock(&rt722->calibrate_mutex);
294 if (rt722->hs_jack) {
295 /* set SCP_SDCA_IntMask1[0]=1 */
296 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
297 SDW_SCP_SDCA_INTMASK_SDCA_0 | SDW_SCP_SDCA_INTMASK_SDCA_6);
298 /* set SCP_SDCA_IntMask2[0]=1 */
299 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
300 SDW_SCP_SDCA_INTMASK_SDCA_8);
301 dev_dbg(&rt722->slave->dev, "in %s enable\n", __func__);
302 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
303 RT722_HDA_LEGACY_UNSOL_CTL, 0x016E);
304 /* set XU(et03h) & XU(et0Dh) to Not bypassed */
305 regmap_write(rt722->regmap,
306 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03,
307 RT722_SDCA_CTL_SELECTED_MODE, 0), 0);
308 regmap_write(rt722->regmap,
309 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D,
310 RT722_SDCA_CTL_SELECTED_MODE, 0), 0);
311 /* trigger GE interrupt */
312 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
313 RT722_GE_RELATED_CTL2, 0x4000, 0x4000);
314 }
315 mutex_unlock(&rt722->calibrate_mutex);
316 }
317
rt722_sdca_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * hs_jack,void * data)318 static int rt722_sdca_set_jack_detect(struct snd_soc_component *component,
319 struct snd_soc_jack *hs_jack, void *data)
320 {
321 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
322 int ret;
323
324 rt722->hs_jack = hs_jack;
325
326 ret = pm_runtime_resume_and_get(component->dev);
327 if (ret < 0) {
328 if (ret != -EACCES) {
329 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret);
330 return ret;
331 }
332 /* pm_runtime not enabled yet */
333 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__);
334 return 0;
335 }
336
337 rt722_sdca_jack_init(rt722);
338
339 pm_runtime_mark_last_busy(component->dev);
340 pm_runtime_put_autosuspend(component->dev);
341
342 return 0;
343 }
344
345 /* For SDCA control DAC/ADC Gain */
rt722_sdca_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)346 static int rt722_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
348 {
349 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
350 struct soc_mixer_control *mc =
351 (struct soc_mixer_control *)kcontrol->private_value;
352 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
353 unsigned int read_l, read_r, gain_l_val, gain_r_val;
354 unsigned int adc_vol_flag = 0, changed = 0;
355 unsigned int lvalue, rvalue;
356 const unsigned int interval_offset = 0xc0;
357 const unsigned int tendB = 0xa00;
358
359 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
360 strstr(ucontrol->id.name, "FU0F Capture Volume"))
361 adc_vol_flag = 1;
362
363 regmap_read(rt722->mbq_regmap, mc->reg, &lvalue);
364 regmap_read(rt722->mbq_regmap, mc->rreg, &rvalue);
365
366 /* L Channel */
367 gain_l_val = ucontrol->value.integer.value[0];
368 if (gain_l_val > mc->max)
369 gain_l_val = mc->max;
370
371 if (mc->shift == 8) /* boost gain */
372 gain_l_val = gain_l_val * tendB;
373 else {
374 /* ADC/DAC gain */
375 if (adc_vol_flag)
376 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset);
377 else
378 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset);
379 gain_l_val &= 0xffff;
380 }
381
382 /* R Channel */
383 gain_r_val = ucontrol->value.integer.value[1];
384 if (gain_r_val > mc->max)
385 gain_r_val = mc->max;
386
387 if (mc->shift == 8) /* boost gain */
388 gain_r_val = gain_r_val * tendB;
389 else {
390 /* ADC/DAC gain */
391 if (adc_vol_flag)
392 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset);
393 else
394 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset);
395 gain_r_val &= 0xffff;
396 }
397
398 if (lvalue != gain_l_val || rvalue != gain_r_val)
399 changed = 1;
400 else
401 return 0;
402
403 /* Lch*/
404 regmap_write(rt722->mbq_regmap, mc->reg, gain_l_val);
405
406 /* Rch */
407 regmap_write(rt722->mbq_regmap, mc->rreg, gain_r_val);
408
409 regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
410 regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
411 if (read_r == gain_r_val && read_l == gain_l_val)
412 return changed;
413
414 return -EIO;
415 }
416
rt722_sdca_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)417 static int rt722_sdca_set_gain_get(struct snd_kcontrol *kcontrol,
418 struct snd_ctl_elem_value *ucontrol)
419 {
420 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
421 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
422 struct soc_mixer_control *mc =
423 (struct soc_mixer_control *)kcontrol->private_value;
424 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0;
425 unsigned int adc_vol_flag = 0;
426 const unsigned int interval_offset = 0xc0;
427 const unsigned int tendB = 0xa00;
428
429 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
430 strstr(ucontrol->id.name, "FU0F Capture Volume"))
431 adc_vol_flag = 1;
432
433 regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
434 regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
435
436 if (mc->shift == 8) /* boost gain */
437 ctl_l = read_l / tendB;
438 else {
439 if (adc_vol_flag)
440 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset);
441 else
442 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset);
443 }
444
445 if (read_l != read_r) {
446 if (mc->shift == 8) /* boost gain */
447 ctl_r = read_r / tendB;
448 else { /* ADC/DAC gain */
449 if (adc_vol_flag)
450 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset);
451 else
452 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset);
453 }
454 } else {
455 ctl_r = ctl_l;
456 }
457
458 ucontrol->value.integer.value[0] = ctl_l;
459 ucontrol->value.integer.value[1] = ctl_r;
460
461 return 0;
462 }
463
rt722_sdca_set_fu1e_capture_ctl(struct rt722_sdca_priv * rt722)464 static int rt722_sdca_set_fu1e_capture_ctl(struct rt722_sdca_priv *rt722)
465 {
466 int err, i;
467 unsigned int ch_mute;
468
469 for (i = 0; i < ARRAY_SIZE(rt722->fu1e_mixer_mute); i++) {
470 ch_mute = rt722->fu1e_dapm_mute || rt722->fu1e_mixer_mute[i];
471 err = regmap_write(rt722->regmap,
472 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
473 RT722_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
474 if (err < 0)
475 return err;
476 }
477
478 return 0;
479 }
480
rt722_sdca_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)481 static int rt722_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol)
483 {
484 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
485 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
486 struct rt722_sdca_dmic_kctrl_priv *p =
487 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
488 unsigned int i;
489
490 for (i = 0; i < p->count; i++)
491 ucontrol->value.integer.value[i] = !rt722->fu1e_mixer_mute[i];
492
493 return 0;
494 }
495
rt722_sdca_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)496 static int rt722_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_value *ucontrol)
498 {
499 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
500 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
501 struct rt722_sdca_dmic_kctrl_priv *p =
502 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
503 int err, changed = 0, i;
504
505 for (i = 0; i < p->count; i++) {
506 if (rt722->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
507 changed = 1;
508 rt722->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
509 }
510
511 err = rt722_sdca_set_fu1e_capture_ctl(rt722);
512 if (err < 0)
513 return err;
514
515 return changed;
516 }
517
rt722_sdca_set_fu0f_capture_ctl(struct rt722_sdca_priv * rt722)518 static int rt722_sdca_set_fu0f_capture_ctl(struct rt722_sdca_priv *rt722)
519 {
520 int err;
521 unsigned int ch_l, ch_r;
522
523 ch_l = (rt722->fu0f_dapm_mute || rt722->fu0f_mixer_l_mute) ? 0x01 : 0x00;
524 ch_r = (rt722->fu0f_dapm_mute || rt722->fu0f_mixer_r_mute) ? 0x01 : 0x00;
525
526 err = regmap_write(rt722->regmap,
527 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
528 RT722_SDCA_CTL_FU_MUTE, CH_L), ch_l);
529 if (err < 0)
530 return err;
531
532 err = regmap_write(rt722->regmap,
533 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
534 RT722_SDCA_CTL_FU_MUTE, CH_R), ch_r);
535 if (err < 0)
536 return err;
537
538 return 0;
539 }
540
rt722_sdca_fu0f_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)541 static int rt722_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol)
543 {
544 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
545 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
546
547 ucontrol->value.integer.value[0] = !rt722->fu0f_mixer_l_mute;
548 ucontrol->value.integer.value[1] = !rt722->fu0f_mixer_r_mute;
549 return 0;
550 }
551
rt722_sdca_fu0f_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)552 static int rt722_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol,
553 struct snd_ctl_elem_value *ucontrol)
554 {
555 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
556 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
557 int err, changed = 0;
558
559 if (rt722->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] ||
560 rt722->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1])
561 changed = 1;
562
563 rt722->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0];
564 rt722->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1];
565 err = rt722_sdca_set_fu0f_capture_ctl(rt722);
566 if (err < 0)
567 return err;
568
569 return changed;
570 }
571
rt722_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)572 static int rt722_sdca_fu_info(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_info *uinfo)
574 {
575 struct rt722_sdca_dmic_kctrl_priv *p =
576 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
577
578 if (p->max == 1)
579 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
580 else
581 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
582 uinfo->count = p->count;
583 uinfo->value.integer.min = 0;
584 uinfo->value.integer.max = p->max;
585 return 0;
586 }
587
rt722_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)588 static int rt722_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
589 struct snd_ctl_elem_value *ucontrol)
590 {
591 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
592 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
593 struct rt722_sdca_dmic_kctrl_priv *p =
594 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
595 unsigned int boost_step = 0x0a00;
596 unsigned int vol_max = 0x1e00;
597 unsigned int regvalue, ctl, i;
598 unsigned int adc_vol_flag = 0;
599 const unsigned int interval_offset = 0xc0;
600
601 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
602 adc_vol_flag = 1;
603
604 /* check all channels */
605 for (i = 0; i < p->count; i++) {
606 regmap_read(rt722->mbq_regmap, p->reg_base + i, ®value);
607
608 if (!adc_vol_flag) /* boost gain */
609 ctl = regvalue / boost_step;
610 else /* ADC gain */
611 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset);
612
613 ucontrol->value.integer.value[i] = ctl;
614 }
615
616 return 0;
617 }
618
rt722_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)619 static int rt722_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
620 struct snd_ctl_elem_value *ucontrol)
621 {
622 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
623 struct rt722_sdca_dmic_kctrl_priv *p =
624 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
625 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
626 unsigned int boost_step = 0x0a00;
627 unsigned int vol_max = 0x1e00;
628 unsigned int gain_val[4];
629 unsigned int i, adc_vol_flag = 0, changed = 0;
630 unsigned int regvalue[4];
631 const unsigned int interval_offset = 0xc0;
632 int err;
633
634 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
635 adc_vol_flag = 1;
636
637 /* check all channels */
638 for (i = 0; i < p->count; i++) {
639 regmap_read(rt722->mbq_regmap, p->reg_base + i, ®value[i]);
640
641 gain_val[i] = ucontrol->value.integer.value[i];
642 if (gain_val[i] > p->max)
643 gain_val[i] = p->max;
644
645 if (!adc_vol_flag) /* boost gain */
646 gain_val[i] = gain_val[i] * boost_step;
647 else { /* ADC gain */
648 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset);
649 gain_val[i] &= 0xffff;
650 }
651
652 if (regvalue[i] != gain_val[i])
653 changed = 1;
654 }
655
656 if (!changed)
657 return 0;
658
659 for (i = 0; i < p->count; i++) {
660 err = regmap_write(rt722->mbq_regmap, p->reg_base + i, gain_val[i]);
661 if (err < 0)
662 dev_err(&rt722->slave->dev, "%#08x can't be set\n", p->reg_base + i);
663 }
664
665 return changed;
666 }
667
668 #define RT722_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
669 ((unsigned long)&(struct rt722_sdca_dmic_kctrl_priv) \
670 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
671 .invert = xinvert})
672
673 #define RT722_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
674 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
675 .info = rt722_sdca_fu_info, \
676 .get = rt722_sdca_fu1e_capture_get, \
677 .put = rt722_sdca_fu1e_capture_put, \
678 .private_value = RT722_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
679
680 #define RT722_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
681 xhandler_put, xcount, xmax, tlv_array) \
682 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
683 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
684 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
685 .tlv.p = (tlv_array), \
686 .info = rt722_sdca_fu_info, \
687 .get = xhandler_get, .put = xhandler_put, \
688 .private_value = RT722_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
689
690 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
691 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0);
692 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0);
693
694 static const struct snd_kcontrol_new rt722_sdca_controls[] = {
695 /* Headphone playback settings */
696 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume",
697 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
698 RT722_SDCA_CTL_FU_VOLUME, CH_L),
699 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
700 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
701 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, out_vol_tlv),
702 /* Headset mic capture settings */
703 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0,
704 rt722_sdca_fu0f_capture_get, rt722_sdca_fu0f_capture_put),
705 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume",
706 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
707 RT722_SDCA_CTL_FU_VOLUME, CH_L),
708 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
709 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0,
710 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, mic_vol_tlv),
711 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume",
712 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
713 RT722_SDCA_CTL_FU_CH_GAIN, CH_L),
714 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
715 RT722_SDCA_CTL_FU_CH_GAIN, CH_R), 8, 3, 0,
716 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, boost_vol_tlv),
717 /* AMP playback settings */
718 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume",
719 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
720 RT722_SDCA_CTL_FU_VOLUME, CH_L),
721 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
722 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
723 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, out_vol_tlv),
724 /* DMIC capture settings */
725 RT722_SDCA_FU_CTRL("FU1E Capture Switch",
726 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
727 RT722_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4),
728 RT722_SDCA_EXT_TLV("FU1E Capture Volume",
729 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
730 RT722_SDCA_CTL_FU_VOLUME, CH_01),
731 rt722_sdca_dmic_set_gain_get, rt722_sdca_dmic_set_gain_put,
732 4, 0x3f, mic_vol_tlv),
733 RT722_SDCA_EXT_TLV("FU15 Boost Volume",
734 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15,
735 RT722_SDCA_CTL_FU_CH_GAIN, CH_01),
736 rt722_sdca_dmic_set_gain_get, rt722_sdca_dmic_set_gain_put,
737 4, 3, boost_vol_tlv),
738 };
739
rt722_sdca_adc_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)740 static int rt722_sdca_adc_mux_get(struct snd_kcontrol *kcontrol,
741 struct snd_ctl_elem_value *ucontrol)
742 {
743 struct snd_soc_component *component =
744 snd_soc_dapm_kcontrol_component(kcontrol);
745 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
746 unsigned int val = 0, mask_sft;
747
748 if (strstr(ucontrol->id.name, "ADC 22 Mux"))
749 mask_sft = 12;
750 else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
751 mask_sft = 4;
752 else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
753 mask_sft = 0;
754 else
755 return -EINVAL;
756
757 rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
758 RT722_HDA_LEGACY_MUX_CTL0, &val);
759
760 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
761
762 return 0;
763 }
764
rt722_sdca_adc_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)765 static int rt722_sdca_adc_mux_put(struct snd_kcontrol *kcontrol,
766 struct snd_ctl_elem_value *ucontrol)
767 {
768 struct snd_soc_component *component =
769 snd_soc_dapm_kcontrol_component(kcontrol);
770 struct snd_soc_dapm_context *dapm =
771 snd_soc_dapm_kcontrol_dapm(kcontrol);
772 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
773 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
774 unsigned int *item = ucontrol->value.enumerated.item;
775 unsigned int val, val2 = 0, change, mask_sft;
776
777 if (item[0] >= e->items)
778 return -EINVAL;
779
780 if (strstr(ucontrol->id.name, "ADC 22 Mux"))
781 mask_sft = 12;
782 else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
783 mask_sft = 4;
784 else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
785 mask_sft = 0;
786 else
787 return -EINVAL;
788
789 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
790
791 rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
792 RT722_HDA_LEGACY_MUX_CTL0, &val2);
793 val2 = (0x7 << mask_sft) & val2;
794
795 if (val == val2)
796 change = 0;
797 else
798 change = 1;
799
800 if (change)
801 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
802 RT722_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
803 val << mask_sft);
804
805 snd_soc_dapm_mux_update_power(dapm, kcontrol,
806 item[0], e, NULL);
807
808 return change;
809 }
810
811 static const char * const adc22_mux_text[] = {
812 "MIC2",
813 "LINE1",
814 "LINE2",
815 };
816
817 static const char * const adc07_10_mux_text[] = {
818 "DMIC1",
819 "DMIC2",
820 };
821
822 static SOC_ENUM_SINGLE_DECL(
823 rt722_adc22_enum, SND_SOC_NOPM, 0, adc22_mux_text);
824
825 static SOC_ENUM_SINGLE_DECL(
826 rt722_adc24_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
827
828 static SOC_ENUM_SINGLE_DECL(
829 rt722_adc25_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
830
831 static const struct snd_kcontrol_new rt722_sdca_adc22_mux =
832 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt722_adc22_enum,
833 rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
834
835 static const struct snd_kcontrol_new rt722_sdca_adc24_mux =
836 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt722_adc24_enum,
837 rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
838
839 static const struct snd_kcontrol_new rt722_sdca_adc25_mux =
840 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt722_adc25_enum,
841 rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
842
rt722_sdca_fu42_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)843 static int rt722_sdca_fu42_event(struct snd_soc_dapm_widget *w,
844 struct snd_kcontrol *kcontrol, int event)
845 {
846 struct snd_soc_component *component =
847 snd_soc_dapm_to_component(w->dapm);
848 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
849 unsigned char unmute = 0x0, mute = 0x1;
850
851 switch (event) {
852 case SND_SOC_DAPM_POST_PMU:
853 regmap_write(rt722->regmap,
854 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
855 RT722_SDCA_CTL_FU_MUTE, CH_L), unmute);
856 regmap_write(rt722->regmap,
857 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
858 RT722_SDCA_CTL_FU_MUTE, CH_R), unmute);
859 break;
860 case SND_SOC_DAPM_PRE_PMD:
861 regmap_write(rt722->regmap,
862 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
863 RT722_SDCA_CTL_FU_MUTE, CH_L), mute);
864 regmap_write(rt722->regmap,
865 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
866 RT722_SDCA_CTL_FU_MUTE, CH_R), mute);
867 break;
868 }
869 return 0;
870 }
871
rt722_sdca_fu21_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)872 static int rt722_sdca_fu21_event(struct snd_soc_dapm_widget *w,
873 struct snd_kcontrol *kcontrol, int event)
874 {
875 struct snd_soc_component *component =
876 snd_soc_dapm_to_component(w->dapm);
877 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
878 unsigned char unmute = 0x0, mute = 0x1;
879
880 switch (event) {
881 case SND_SOC_DAPM_POST_PMU:
882 regmap_write(rt722->regmap,
883 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
884 RT722_SDCA_CTL_FU_MUTE, CH_L), unmute);
885 regmap_write(rt722->regmap,
886 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
887 RT722_SDCA_CTL_FU_MUTE, CH_R), unmute);
888 break;
889 case SND_SOC_DAPM_PRE_PMD:
890 regmap_write(rt722->regmap,
891 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
892 RT722_SDCA_CTL_FU_MUTE, CH_L), mute);
893 regmap_write(rt722->regmap,
894 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
895 RT722_SDCA_CTL_FU_MUTE, CH_R), mute);
896 break;
897 }
898 return 0;
899 }
900
rt722_sdca_fu113_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)901 static int rt722_sdca_fu113_event(struct snd_soc_dapm_widget *w,
902 struct snd_kcontrol *kcontrol, int event)
903 {
904 struct snd_soc_component *component =
905 snd_soc_dapm_to_component(w->dapm);
906 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
907
908 switch (event) {
909 case SND_SOC_DAPM_POST_PMU:
910 rt722->fu1e_dapm_mute = false;
911 rt722_sdca_set_fu1e_capture_ctl(rt722);
912 break;
913 case SND_SOC_DAPM_PRE_PMD:
914 rt722->fu1e_dapm_mute = true;
915 rt722_sdca_set_fu1e_capture_ctl(rt722);
916 break;
917 }
918 return 0;
919 }
920
rt722_sdca_fu36_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)921 static int rt722_sdca_fu36_event(struct snd_soc_dapm_widget *w,
922 struct snd_kcontrol *kcontrol, int event)
923 {
924 struct snd_soc_component *component =
925 snd_soc_dapm_to_component(w->dapm);
926 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
927
928 switch (event) {
929 case SND_SOC_DAPM_POST_PMU:
930 rt722->fu0f_dapm_mute = false;
931 rt722_sdca_set_fu0f_capture_ctl(rt722);
932 break;
933 case SND_SOC_DAPM_PRE_PMD:
934 rt722->fu0f_dapm_mute = true;
935 rt722_sdca_set_fu0f_capture_ctl(rt722);
936 break;
937 }
938 return 0;
939 }
940
rt722_sdca_pde47_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)941 static int rt722_sdca_pde47_event(struct snd_soc_dapm_widget *w,
942 struct snd_kcontrol *kcontrol, int event)
943 {
944 struct snd_soc_component *component =
945 snd_soc_dapm_to_component(w->dapm);
946 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
947 unsigned char ps0 = 0x0, ps3 = 0x3;
948
949 switch (event) {
950 case SND_SOC_DAPM_POST_PMU:
951 regmap_write(rt722->regmap,
952 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
953 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
954 break;
955 case SND_SOC_DAPM_PRE_PMD:
956 regmap_write(rt722->regmap,
957 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
958 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
959 break;
960 }
961 return 0;
962 }
963
rt722_sdca_pde23_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)964 static int rt722_sdca_pde23_event(struct snd_soc_dapm_widget *w,
965 struct snd_kcontrol *kcontrol, int event)
966 {
967 struct snd_soc_component *component =
968 snd_soc_dapm_to_component(w->dapm);
969 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
970 unsigned char ps0 = 0x0, ps3 = 0x3;
971
972 switch (event) {
973 case SND_SOC_DAPM_POST_PMU:
974 regmap_write(rt722->regmap,
975 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
976 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
977 break;
978 case SND_SOC_DAPM_PRE_PMD:
979 regmap_write(rt722->regmap,
980 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
981 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
982 break;
983 }
984 return 0;
985 }
986
rt722_sdca_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)987 static int rt722_sdca_pde11_event(struct snd_soc_dapm_widget *w,
988 struct snd_kcontrol *kcontrol, int event)
989 {
990 struct snd_soc_component *component =
991 snd_soc_dapm_to_component(w->dapm);
992 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
993 unsigned char ps0 = 0x0, ps3 = 0x3;
994
995 switch (event) {
996 case SND_SOC_DAPM_POST_PMU:
997 regmap_write(rt722->regmap,
998 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
999 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1000 break;
1001 case SND_SOC_DAPM_PRE_PMD:
1002 regmap_write(rt722->regmap,
1003 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
1004 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1005 break;
1006 }
1007 return 0;
1008 }
1009
rt722_sdca_pde12_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1010 static int rt722_sdca_pde12_event(struct snd_soc_dapm_widget *w,
1011 struct snd_kcontrol *kcontrol, int event)
1012 {
1013 struct snd_soc_component *component =
1014 snd_soc_dapm_to_component(w->dapm);
1015 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1016 unsigned char ps0 = 0x0, ps3 = 0x3;
1017
1018 switch (event) {
1019 case SND_SOC_DAPM_POST_PMU:
1020 regmap_write(rt722->regmap,
1021 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
1022 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1023 break;
1024 case SND_SOC_DAPM_PRE_PMD:
1025 regmap_write(rt722->regmap,
1026 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
1027 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1028 break;
1029 }
1030 return 0;
1031 }
1032
1033 static const struct snd_soc_dapm_widget rt722_sdca_dapm_widgets[] = {
1034 SND_SOC_DAPM_OUTPUT("HP"),
1035 SND_SOC_DAPM_OUTPUT("SPK"),
1036 SND_SOC_DAPM_INPUT("MIC2"),
1037 SND_SOC_DAPM_INPUT("LINE1"),
1038 SND_SOC_DAPM_INPUT("LINE2"),
1039 SND_SOC_DAPM_INPUT("DMIC1_2"),
1040 SND_SOC_DAPM_INPUT("DMIC3_4"),
1041
1042 SND_SOC_DAPM_SUPPLY("PDE 23", SND_SOC_NOPM, 0, 0,
1043 rt722_sdca_pde23_event,
1044 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1045 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0,
1046 rt722_sdca_pde47_event,
1047 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1048 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1049 rt722_sdca_pde11_event,
1050 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1051 SND_SOC_DAPM_SUPPLY("PDE 12", SND_SOC_NOPM, 0, 0,
1052 rt722_sdca_pde12_event,
1053 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1054
1055 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0,
1056 rt722_sdca_fu21_event,
1057 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1058 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0,
1059 rt722_sdca_fu42_event,
1060 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1061 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0,
1062 rt722_sdca_fu36_event,
1063 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1064 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0,
1065 rt722_sdca_fu113_event,
1066 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1067 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
1068 &rt722_sdca_adc22_mux),
1069 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
1070 &rt722_sdca_adc24_mux),
1071 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
1072 &rt722_sdca_adc25_mux),
1073
1074 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0),
1075 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0),
1076 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0),
1077 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0),
1078 };
1079
1080 static const struct snd_soc_dapm_route rt722_sdca_audio_map[] = {
1081 {"FU 42", NULL, "DP1RX"},
1082 {"FU 21", NULL, "DP3RX"},
1083
1084 {"ADC 22 Mux", "MIC2", "MIC2"},
1085 {"ADC 22 Mux", "LINE1", "LINE1"},
1086 {"ADC 22 Mux", "LINE2", "LINE2"},
1087 {"ADC 24 Mux", "DMIC1", "DMIC1_2"},
1088 {"ADC 24 Mux", "DMIC2", "DMIC3_4"},
1089 {"ADC 25 Mux", "DMIC1", "DMIC1_2"},
1090 {"ADC 25 Mux", "DMIC2", "DMIC3_4"},
1091 {"FU 36", NULL, "PDE 12"},
1092 {"FU 36", NULL, "ADC 22 Mux"},
1093 {"FU 113", NULL, "PDE 11"},
1094 {"FU 113", NULL, "ADC 24 Mux"},
1095 {"FU 113", NULL, "ADC 25 Mux"},
1096 {"DP2TX", NULL, "FU 36"},
1097 {"DP6TX", NULL, "FU 113"},
1098
1099 {"HP", NULL, "PDE 47"},
1100 {"HP", NULL, "FU 42"},
1101 {"SPK", NULL, "PDE 23"},
1102 {"SPK", NULL, "FU 21"},
1103 };
1104
rt722_sdca_parse_dt(struct rt722_sdca_priv * rt722,struct device * dev)1105 static int rt722_sdca_parse_dt(struct rt722_sdca_priv *rt722, struct device *dev)
1106 {
1107 device_property_read_u32(dev, "realtek,jd-src", &rt722->jd_src);
1108
1109 return 0;
1110 }
1111
rt722_sdca_probe(struct snd_soc_component * component)1112 static int rt722_sdca_probe(struct snd_soc_component *component)
1113 {
1114 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1115 int ret;
1116
1117 rt722_sdca_parse_dt(rt722, &rt722->slave->dev);
1118 rt722->component = component;
1119
1120 ret = pm_runtime_resume(component->dev);
1121 if (ret < 0 && ret != -EACCES)
1122 return ret;
1123
1124 return 0;
1125 }
1126
1127 static const struct snd_soc_component_driver soc_sdca_dev_rt722 = {
1128 .probe = rt722_sdca_probe,
1129 .controls = rt722_sdca_controls,
1130 .num_controls = ARRAY_SIZE(rt722_sdca_controls),
1131 .dapm_widgets = rt722_sdca_dapm_widgets,
1132 .num_dapm_widgets = ARRAY_SIZE(rt722_sdca_dapm_widgets),
1133 .dapm_routes = rt722_sdca_audio_map,
1134 .num_dapm_routes = ARRAY_SIZE(rt722_sdca_audio_map),
1135 .set_jack = rt722_sdca_set_jack_detect,
1136 .endianness = 1,
1137 };
1138
rt722_sdca_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)1139 static int rt722_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
1140 int direction)
1141 {
1142 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
1143
1144 return 0;
1145 }
1146
rt722_sdca_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1147 static void rt722_sdca_shutdown(struct snd_pcm_substream *substream,
1148 struct snd_soc_dai *dai)
1149 {
1150 snd_soc_dai_set_dma_data(dai, substream, NULL);
1151 }
1152
rt722_sdca_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1153 static int rt722_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
1154 struct snd_pcm_hw_params *params,
1155 struct snd_soc_dai *dai)
1156 {
1157 struct snd_soc_component *component = dai->component;
1158 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1159 struct sdw_stream_config stream_config;
1160 struct sdw_port_config port_config;
1161 enum sdw_data_direction direction;
1162 struct sdw_stream_runtime *sdw_stream;
1163 int retval, port, num_channels;
1164 unsigned int sampling_rate;
1165
1166 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1167 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
1168
1169 if (!sdw_stream)
1170 return -EINVAL;
1171
1172 if (!rt722->slave)
1173 return -EINVAL;
1174
1175 /*
1176 * RT722_AIF1 with port = 1 for headphone playback
1177 * RT722_AIF1 with port = 2 for headset-mic capture
1178 * RT722_AIF2 with port = 3 for speaker playback
1179 * RT722_AIF3 with port = 6 for digital-mic capture
1180 */
1181 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1182 direction = SDW_DATA_DIR_RX;
1183 if (dai->id == RT722_AIF1)
1184 port = 1;
1185 else if (dai->id == RT722_AIF2)
1186 port = 3;
1187 else
1188 return -EINVAL;
1189 } else {
1190 direction = SDW_DATA_DIR_TX;
1191 if (dai->id == RT722_AIF1)
1192 port = 2;
1193 else if (dai->id == RT722_AIF3)
1194 port = 6;
1195 else
1196 return -EINVAL;
1197 }
1198 stream_config.frame_rate = params_rate(params);
1199 stream_config.ch_count = params_channels(params);
1200 stream_config.bps = snd_pcm_format_width(params_format(params));
1201 stream_config.direction = direction;
1202
1203 num_channels = params_channels(params);
1204 port_config.ch_mask = GENMASK(num_channels - 1, 0);
1205 port_config.num = port;
1206
1207 retval = sdw_stream_add_slave(rt722->slave, &stream_config,
1208 &port_config, 1, sdw_stream);
1209 if (retval) {
1210 dev_err(dai->dev, "Unable to configure port\n");
1211 return retval;
1212 }
1213
1214 if (params_channels(params) > 16) {
1215 dev_err(component->dev, "Unsupported channels %d\n",
1216 params_channels(params));
1217 return -EINVAL;
1218 }
1219
1220 /* sampling rate configuration */
1221 switch (params_rate(params)) {
1222 case 44100:
1223 sampling_rate = RT722_SDCA_RATE_44100HZ;
1224 break;
1225 case 48000:
1226 sampling_rate = RT722_SDCA_RATE_48000HZ;
1227 break;
1228 case 96000:
1229 sampling_rate = RT722_SDCA_RATE_96000HZ;
1230 break;
1231 case 192000:
1232 sampling_rate = RT722_SDCA_RATE_192000HZ;
1233 break;
1234 default:
1235 dev_err(component->dev, "Rate %d is not supported\n",
1236 params_rate(params));
1237 return -EINVAL;
1238 }
1239
1240 /* set sampling frequency */
1241 if (dai->id == RT722_AIF1) {
1242 regmap_write(rt722->regmap,
1243 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01,
1244 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1245 regmap_write(rt722->regmap,
1246 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11,
1247 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1248 }
1249
1250 if (dai->id == RT722_AIF2)
1251 regmap_write(rt722->regmap,
1252 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
1253 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1254
1255 if (dai->id == RT722_AIF3)
1256 regmap_write(rt722->regmap,
1257 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F,
1258 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1259
1260 return 0;
1261 }
1262
rt722_sdca_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1263 static int rt722_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
1264 struct snd_soc_dai *dai)
1265 {
1266 struct snd_soc_component *component = dai->component;
1267 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1268 struct sdw_stream_runtime *sdw_stream =
1269 snd_soc_dai_get_dma_data(dai, substream);
1270
1271 if (!rt722->slave)
1272 return -EINVAL;
1273
1274 sdw_stream_remove_slave(rt722->slave, sdw_stream);
1275 return 0;
1276 }
1277
1278 #define RT722_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
1279 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
1280 #define RT722_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1281 SNDRV_PCM_FMTBIT_S24_LE)
1282
1283 static const struct snd_soc_dai_ops rt722_sdca_ops = {
1284 .hw_params = rt722_sdca_pcm_hw_params,
1285 .hw_free = rt722_sdca_pcm_hw_free,
1286 .set_stream = rt722_sdca_set_sdw_stream,
1287 .shutdown = rt722_sdca_shutdown,
1288 };
1289
1290 static struct snd_soc_dai_driver rt722_sdca_dai[] = {
1291 {
1292 .name = "rt722-sdca-aif1",
1293 .id = RT722_AIF1,
1294 .playback = {
1295 .stream_name = "DP1 Headphone Playback",
1296 .channels_min = 1,
1297 .channels_max = 2,
1298 .rates = RT722_STEREO_RATES,
1299 .formats = RT722_FORMATS,
1300 },
1301 .capture = {
1302 .stream_name = "DP2 Headset Capture",
1303 .channels_min = 1,
1304 .channels_max = 2,
1305 .rates = RT722_STEREO_RATES,
1306 .formats = RT722_FORMATS,
1307 },
1308 .ops = &rt722_sdca_ops,
1309 },
1310 {
1311 .name = "rt722-sdca-aif2",
1312 .id = RT722_AIF2,
1313 .playback = {
1314 .stream_name = "DP3 Speaker Playback",
1315 .channels_min = 1,
1316 .channels_max = 2,
1317 .rates = RT722_STEREO_RATES,
1318 .formats = RT722_FORMATS,
1319 },
1320 .ops = &rt722_sdca_ops,
1321 },
1322 {
1323 .name = "rt722-sdca-aif3",
1324 .id = RT722_AIF3,
1325 .capture = {
1326 .stream_name = "DP6 DMic Capture",
1327 .channels_min = 1,
1328 .channels_max = 4,
1329 .rates = RT722_STEREO_RATES,
1330 .formats = RT722_FORMATS,
1331 },
1332 .ops = &rt722_sdca_ops,
1333 }
1334 };
1335
rt722_sdca_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)1336 int rt722_sdca_init(struct device *dev, struct regmap *regmap,
1337 struct regmap *mbq_regmap, struct sdw_slave *slave)
1338 {
1339 struct rt722_sdca_priv *rt722;
1340
1341 rt722 = devm_kzalloc(dev, sizeof(*rt722), GFP_KERNEL);
1342 if (!rt722)
1343 return -ENOMEM;
1344
1345 dev_set_drvdata(dev, rt722);
1346 rt722->slave = slave;
1347 rt722->regmap = regmap;
1348 rt722->mbq_regmap = mbq_regmap;
1349
1350 mutex_init(&rt722->calibrate_mutex);
1351 mutex_init(&rt722->disable_irq_lock);
1352
1353 INIT_DELAYED_WORK(&rt722->jack_detect_work, rt722_sdca_jack_detect_handler);
1354 INIT_DELAYED_WORK(&rt722->jack_btn_check_work, rt722_sdca_btn_check_handler);
1355
1356 /*
1357 * Mark hw_init to false
1358 * HW init will be performed when device reports present
1359 */
1360 rt722->hw_init = false;
1361 rt722->first_hw_init = false;
1362 rt722->fu1e_dapm_mute = true;
1363 rt722->fu0f_dapm_mute = true;
1364 rt722->fu0f_mixer_l_mute = rt722->fu0f_mixer_r_mute = true;
1365 rt722->fu1e_mixer_mute[0] = rt722->fu1e_mixer_mute[1] =
1366 rt722->fu1e_mixer_mute[2] = rt722->fu1e_mixer_mute[3] = true;
1367
1368 return devm_snd_soc_register_component(dev,
1369 &soc_sdca_dev_rt722, rt722_sdca_dai, ARRAY_SIZE(rt722_sdca_dai));
1370 }
1371
rt722_sdca_dmic_preset(struct rt722_sdca_priv * rt722)1372 static void rt722_sdca_dmic_preset(struct rt722_sdca_priv *rt722)
1373 {
1374 /* Set AD07 power entity floating control */
1375 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1376 RT722_ADC0A_08_PDE_FLOAT_CTL, 0x2a29);
1377 /* Set AD10 power entity floating control */
1378 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1379 RT722_ADC10_PDE_FLOAT_CTL, 0x2a00);
1380 /* Set DMIC1/DMIC2 power entity floating control */
1381 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1382 RT722_DMIC1_2_PDE_FLOAT_CTL, 0x2a2a);
1383 /* Set DMIC2 IT entity floating control */
1384 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1385 RT722_DMIC_ENT_FLOAT_CTL, 0x2626);
1386 /* Set AD10 FU entity floating control */
1387 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1388 RT722_ADC_ENT_FLOAT_CTL, 0x1e00);
1389 /* Set DMIC2 FU entity floating control */
1390 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1391 RT722_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
1392 /* Set AD10 FU channel floating control */
1393 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1394 RT722_ADC_VOL_CH_FLOAT_CTL, 0x0304);
1395 /* Set DMIC2 FU channel floating control */
1396 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1397 RT722_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
1398 /* vf71f_r12_07_06 and vf71f_r13_07_06 = 2’b00 */
1399 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1400 RT722_HDA_LEGACY_CONFIG_CTL0, 0x0000);
1401 /* Enable vf707_r12_05/vf707_r13_05 */
1402 regmap_write(rt722->regmap,
1403 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26,
1404 RT722_SDCA_CTL_VENDOR_DEF, 0), 0x01);
1405 /* Fine tune PDE2A latency */
1406 regmap_write(rt722->regmap, 0x2f5c, 0x25);
1407 }
1408
rt722_sdca_amp_preset(struct rt722_sdca_priv * rt722)1409 static void rt722_sdca_amp_preset(struct rt722_sdca_priv *rt722)
1410 {
1411 /* Set DVQ=01 */
1412 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_CLSD_CTRL6,
1413 0xc215);
1414 /* Reset dc_cal_top */
1415 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DC_CALIB_CTRL,
1416 0x702c);
1417 /* W1C Trigger Calibration */
1418 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DC_CALIB_CTRL,
1419 0xf02d);
1420 /* Set DAC02/ClassD power entity floating control */
1421 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_AMP_PDE_FLOAT_CTL,
1422 0x2323);
1423 /* Set EAPD high */
1424 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_EAPD_CTL,
1425 0x0002);
1426 /* Enable vf707_r14 */
1427 regmap_write(rt722->regmap,
1428 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23,
1429 RT722_SDCA_CTL_VENDOR_DEF, CH_08), 0x04);
1430 }
1431
rt722_sdca_jack_preset(struct rt722_sdca_priv * rt722)1432 static void rt722_sdca_jack_preset(struct rt722_sdca_priv *rt722)
1433 {
1434 int loop_check, chk_cnt = 100, ret;
1435 unsigned int calib_status = 0;
1436
1437 /* Config analog bias */
1438 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_ANALOG_BIAS_CTL3,
1439 0xa081);
1440 /* GE related settings */
1441 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_GE_RELATED_CTL2,
1442 0xa009);
1443 /* Button A, B, C, D bypass mode */
1444 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL4,
1445 0xcf00);
1446 /* HID1 slot enable */
1447 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL5,
1448 0x000f);
1449 /* Report ID for HID1 */
1450 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL0,
1451 0x1100);
1452 /* OSC/OOC for slot 2, 3 */
1453 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL7,
1454 0x0c12);
1455 /* Set JD de-bounce clock control */
1456 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_JD_CTRL1,
1457 0x7002);
1458 /* Set DVQ=01 */
1459 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_CLSD_CTRL6,
1460 0xc215);
1461 /* FSM switch to calibration manual mode */
1462 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_FSM_CTL,
1463 0x4100);
1464 /* W1C Trigger DC calibration (HP) */
1465 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DAC_DC_CALI_CTL3,
1466 0x008d);
1467 /* check HP calibration FSM status */
1468 for (loop_check = 0; loop_check < chk_cnt; loop_check++) {
1469 ret = rt722_sdca_index_read(rt722, RT722_VENDOR_CALI,
1470 RT722_DAC_DC_CALI_CTL3, &calib_status);
1471 if (ret < 0 || loop_check == chk_cnt)
1472 dev_dbg(&rt722->slave->dev, "calibration failed!, ret=%d\n", ret);
1473 if ((calib_status & 0x0040) == 0x0)
1474 break;
1475 }
1476 /* Set ADC09 power entity floating control */
1477 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ADC0A_08_PDE_FLOAT_CTL,
1478 0x2a12);
1479 /* Set MIC2 and LINE1 power entity floating control */
1480 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_MIC2_LINE2_PDE_FLOAT_CTL,
1481 0x3429);
1482 /* Set ET41h and LINE2 power entity floating control */
1483 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ET41_LINE2_PDE_FLOAT_CTL,
1484 0x4112);
1485 /* Set DAC03 and HP power entity floating control */
1486 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_DAC03_HP_PDE_FLOAT_CTL,
1487 0x4040);
1488 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ENT_FLOAT_CTRL_1,
1489 0x4141);
1490 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_FLOAT_CTRL_1,
1491 0x0101);
1492 /* Fine tune PDE40 latency */
1493 regmap_write(rt722->regmap, 0x2f58, 0x07);
1494 regmap_write(rt722->regmap, 0x2f03, 0x06);
1495 /* MIC VRefo */
1496 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1497 RT722_COMBO_JACK_AUTO_CTL1, 0x0200, 0x0200);
1498 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1499 RT722_VREFO_GAT, 0x4000, 0x4000);
1500 /* Release HP-JD, EN_CBJ_TIE_GL/R open, en_osw gating auto done bit */
1501 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_DIGITAL_MISC_CTRL4,
1502 0x0010);
1503 }
1504
rt722_sdca_io_init(struct device * dev,struct sdw_slave * slave)1505 int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1506 {
1507 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
1508
1509 rt722->disable_irq = false;
1510
1511 if (rt722->hw_init)
1512 return 0;
1513
1514 if (rt722->first_hw_init) {
1515 regcache_cache_only(rt722->regmap, false);
1516 regcache_cache_bypass(rt722->regmap, true);
1517 regcache_cache_only(rt722->mbq_regmap, false);
1518 regcache_cache_bypass(rt722->mbq_regmap, true);
1519 } else {
1520 /*
1521 * PM runtime is only enabled when a Slave reports as Attached
1522 */
1523
1524 /* set autosuspend parameters */
1525 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1526 pm_runtime_use_autosuspend(&slave->dev);
1527
1528 /* update count of parent 'active' children */
1529 pm_runtime_set_active(&slave->dev);
1530
1531 /* make sure the device does not suspend immediately */
1532 pm_runtime_mark_last_busy(&slave->dev);
1533
1534 pm_runtime_enable(&slave->dev);
1535 }
1536
1537 pm_runtime_get_noresume(&slave->dev);
1538
1539 rt722_sdca_dmic_preset(rt722);
1540 rt722_sdca_amp_preset(rt722);
1541 rt722_sdca_jack_preset(rt722);
1542
1543 if (rt722->first_hw_init) {
1544 regcache_cache_bypass(rt722->regmap, false);
1545 regcache_mark_dirty(rt722->regmap);
1546 regcache_cache_bypass(rt722->mbq_regmap, false);
1547 regcache_mark_dirty(rt722->mbq_regmap);
1548 } else
1549 rt722->first_hw_init = true;
1550
1551 /* Mark Slave initialization complete */
1552 rt722->hw_init = true;
1553
1554 pm_runtime_mark_last_busy(&slave->dev);
1555 pm_runtime_put_autosuspend(&slave->dev);
1556
1557 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
1558 return 0;
1559 }
1560
1561 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
1562 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1563 MODULE_LICENSE("GPL");
1564