| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-madera.c | 28 unsigned int reg_offset = 2 * offset; in madera_gpio_get_direction() local
47 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_in() local
58 unsigned int reg_offset = 2 * offset; in madera_gpio_get() local
75 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_out() local
95 unsigned int reg_offset = 2 * offset; in madera_gpio_set() local
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| /openbmc/qemu/tests/qtest/ |
| H A D | riscv-iommu-test.c | 18 static uint32_t riscv_iommu_read_reg32(QRISCVIOMMU *r_iommu, int reg_offset) in riscv_iommu_read_reg32()
23 static uint64_t riscv_iommu_read_reg64(QRISCVIOMMU *r_iommu, int reg_offset) in riscv_iommu_read_reg64()
28 static void riscv_iommu_write_reg32(QRISCVIOMMU *r_iommu, int reg_offset, in riscv_iommu_write_reg32()
34 static void riscv_iommu_write_reg64(QRISCVIOMMU *r_iommu, int reg_offset, in riscv_iommu_write_reg64()
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v4_4.c | 167 uint32_t reg_offset, in sdma_v4_4_get_ras_error_count()
202 uint32_t reg_offset = 0; in sdma_v4_4_query_ras_error_count_by_instance() local
239 uint32_t reg_offset; in sdma_v4_4_reset_ras_error_count() local
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| H A D | mmsch_v1_0.h | 61 uint32_t reg_offset : 28; member
66 uint32_t reg_offset : 20; member
99 uint32_t reg_offset, in mmsch_v1_0_insert_direct_wt()
109 uint32_t reg_offset, in mmsch_v1_0_insert_direct_rd_mod_wt()
121 uint32_t reg_offset, in mmsch_v1_0_insert_direct_poll()
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| H A D | soc15.h | 56 uint32_t reg_offset; member
63 uint32_t reg_offset; member
73 uint32_t reg_offset; member
82 uint32_t reg_offset; member
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| H A D | jpeg_v1_0.c | 42 …_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t v… in jpeg_v1_0_decode_ring_patch_wreg()
61 uint32_t reg, reg_offset, val, mask, i; in jpeg_v1_0_decode_ring_set_patch_ring() local
358 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_reg_wait() local
402 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_wreg() local
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| H A D | jpeg_v4_0_3.c | 506 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_start() local
822 uint32_t reg_offset = (reg << 2); in jpeg_v4_0_3_dec_ring_emit_reg_wait() local
863 uint32_t reg_offset = (reg << 2); in jpeg_v4_0_3_dec_ring_emit_wreg() local
899 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_is_idle() local
921 unsigned int reg_offset = (j?(0x40 * j - 0xc80):0); in jpeg_v4_0_3_wait_for_idle() local
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| H A D | mmsch_v3_0.h | 56 uint32_t reg_offset : 28; member
61 uint32_t reg_offset : 20; member
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| /openbmc/linux/drivers/net/wireless/ath/ath9k/ |
| H A D | htc_drv_init.c | 234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) in ath9k_regread()
302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_single()
323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_buffer()
346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite()
384 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_buffer()
467 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_single()
489 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
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| H A D | ar9003_hw.c | 1102 unsigned int dbg_reg, reg_offset; in ath9k_hw_verify_hang() local
1136 unsigned int reg_offset; in ar9003_hw_detect_mac_hang() local
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| H A D | init.c | 173 static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) in ath9k_iowrite32()
188 static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset) in ath9k_ioread32()
215 static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset, in __ath9k_reg_rmw()
228 static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
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| /openbmc/linux/drivers/staging/vt6655/ |
| H A D | mac.c | 40 void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) in vt6655_mac_reg_bits_on()
48 void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) in vt6655_mac_word_reg_bits_on()
56 void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) in vt6655_mac_reg_bits_off()
64 void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) in vt6655_mac_word_reg_bits_off()
97 unsigned char reg_offset, in vt6655_mac_is_reg_bits_off()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | common_baco.h | 38 uint32_t reg_offset; member
50 uint32_t reg_offset; member
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| /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-socfpga.c | 50 u32 reg_offset; member
107 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local
276 u32 reg_offset = dwmac->reg_offset; in socfpga_gen5_set_phy_mode() local
334 u32 reg_offset = dwmac->reg_offset; in socfpga_gen10_set_phy_mode() local
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| /openbmc/u-boot/drivers/pinctrl/mvebu/ |
| H A D | pinctrl-mvebu.c | 98 int reg_offset; in mvebu_pinctrl_set_state() local
155 int reg_offset; in mvebu_pinctrl_set_state_all() local
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | cik_sdma.c | 251 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local
305 uint32_t reg_offset, value; in cik_sdma_ctx_switch_enable() local
332 u32 me_cntl, reg_offset; in cik_sdma_enable() local
369 u32 reg_offset, wb_offset; in cik_sdma_gfx_resume() local
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| /openbmc/linux/drivers/reset/ |
| H A D | reset-simple.c | 117 u32 reg_offset; member
164 u32 reg_offset = 0; in reset_simple_probe() local
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| H A D | reset-socfpga.c | 28 u32 reg_offset = 0x10; in a10_reset_init() local
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| /openbmc/linux/drivers/net/mdio/ |
| H A D | mdio-ipq8064.c | 53 ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset) in ipq8064_mdio_read()
75 ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) in ipq8064_mdio_write()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | tsi108.h | 103 static inline u32 tsi108_read_reg(u32 reg_offset) in tsi108_read_reg()
108 static inline void tsi108_write_reg(u32 reg_offset, u32 val) in tsi108_write_reg()
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| /openbmc/u-boot/arch/arm/include/asm/arch-am33xx/ |
| H A D | mux.h | 33 short reg_offset; member
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| /openbmc/linux/drivers/media/platform/nxp/imx-jpeg/ |
| H A D | mxc-jpeg-hw.c | 12 #define print_wrapper_reg(dev, base_address, reg_offset)\ argument
15 #define internal_print_wrapper_reg(dev, base_address, reg_name, reg_offset) {\ argument
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| /openbmc/linux/drivers/fpga/ |
| H A D | socfpga.c | 134 static u32 socfpga_fpga_readl(struct socfpga_fpga_priv *priv, u32 reg_offset) in socfpga_fpga_readl()
139 static void socfpga_fpga_writel(struct socfpga_fpga_priv *priv, u32 reg_offset, in socfpga_fpga_writel()
146 u32 reg_offset) in socfpga_fpga_raw_readl()
152 u32 reg_offset, u32 value) in socfpga_fpga_raw_writel()
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-atmel-pit.c | 59 static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset) in pit_read()
64 static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value) in pit_write()
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| /openbmc/linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx1-core.c | 89 u32 value, u32 reg_offset) in imx1_write_2bit()
116 u32 value, u32 reg_offset) in imx1_write_bit()
136 u32 reg_offset) in imx1_read_2bit()
149 u32 reg_offset) in imx1_read_bit()
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