xref: /openbmc/linux/drivers/nvme/host/core.c (revision 36db6e8484ed455bbb320d89a119378897ae991c)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <asm/unaligned.h>
24 
25 #include "nvme.h"
26 #include "fabrics.h"
27 #include <linux/nvme-auth.h>
28 
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31 
32 #define NVME_MINORS		(1U << MINORBITS)
33 
34 struct nvme_ns_info {
35 	struct nvme_ns_ids ids;
36 	u32 nsid;
37 	__le32 anagrpid;
38 	bool is_shared;
39 	bool is_readonly;
40 	bool is_ready;
41 	bool is_removed;
42 };
43 
44 unsigned int admin_timeout = 60;
45 module_param(admin_timeout, uint, 0644);
46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
47 EXPORT_SYMBOL_GPL(admin_timeout);
48 
49 unsigned int nvme_io_timeout = 30;
50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
52 EXPORT_SYMBOL_GPL(nvme_io_timeout);
53 
54 static unsigned char shutdown_timeout = 5;
55 module_param(shutdown_timeout, byte, 0644);
56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
57 
58 static u8 nvme_max_retries = 5;
59 module_param_named(max_retries, nvme_max_retries, byte, 0644);
60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
61 
62 static unsigned long default_ps_max_latency_us = 100000;
63 module_param(default_ps_max_latency_us, ulong, 0644);
64 MODULE_PARM_DESC(default_ps_max_latency_us,
65 		 "max power saving latency for new devices; use PM QOS to change per device");
66 
67 static bool force_apst;
68 module_param(force_apst, bool, 0644);
69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
70 
71 static unsigned long apst_primary_timeout_ms = 100;
72 module_param(apst_primary_timeout_ms, ulong, 0644);
73 MODULE_PARM_DESC(apst_primary_timeout_ms,
74 	"primary APST timeout in ms");
75 
76 static unsigned long apst_secondary_timeout_ms = 2000;
77 module_param(apst_secondary_timeout_ms, ulong, 0644);
78 MODULE_PARM_DESC(apst_secondary_timeout_ms,
79 	"secondary APST timeout in ms");
80 
81 static unsigned long apst_primary_latency_tol_us = 15000;
82 module_param(apst_primary_latency_tol_us, ulong, 0644);
83 MODULE_PARM_DESC(apst_primary_latency_tol_us,
84 	"primary APST latency tolerance in us");
85 
86 static unsigned long apst_secondary_latency_tol_us = 100000;
87 module_param(apst_secondary_latency_tol_us, ulong, 0644);
88 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
89 	"secondary APST latency tolerance in us");
90 
91 /*
92  * nvme_wq - hosts nvme related works that are not reset or delete
93  * nvme_reset_wq - hosts nvme reset works
94  * nvme_delete_wq - hosts nvme delete works
95  *
96  * nvme_wq will host works such as scan, aen handling, fw activation,
97  * keep-alive, periodic reconnects etc. nvme_reset_wq
98  * runs reset works which also flush works hosted on nvme_wq for
99  * serialization purposes. nvme_delete_wq host controller deletion
100  * works which flush reset works for serialization.
101  */
102 struct workqueue_struct *nvme_wq;
103 EXPORT_SYMBOL_GPL(nvme_wq);
104 
105 struct workqueue_struct *nvme_reset_wq;
106 EXPORT_SYMBOL_GPL(nvme_reset_wq);
107 
108 struct workqueue_struct *nvme_delete_wq;
109 EXPORT_SYMBOL_GPL(nvme_delete_wq);
110 
111 static LIST_HEAD(nvme_subsystems);
112 DEFINE_MUTEX(nvme_subsystems_lock);
113 
114 static DEFINE_IDA(nvme_instance_ida);
115 static dev_t nvme_ctrl_base_chr_devt;
116 static struct class *nvme_class;
117 static struct class *nvme_subsys_class;
118 
119 static DEFINE_IDA(nvme_ns_chr_minor_ida);
120 static dev_t nvme_ns_chr_devt;
121 static struct class *nvme_ns_chr_class;
122 
123 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
125 					   unsigned nsid);
126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
127 				   struct nvme_command *cmd);
128 
nvme_queue_scan(struct nvme_ctrl * ctrl)129 void nvme_queue_scan(struct nvme_ctrl *ctrl)
130 {
131 	/*
132 	 * Only new queue scan work when admin and IO queues are both alive
133 	 */
134 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
135 		queue_work(nvme_wq, &ctrl->scan_work);
136 }
137 
138 /*
139  * Use this function to proceed with scheduling reset_work for a controller
140  * that had previously been set to the resetting state. This is intended for
141  * code paths that can't be interrupted by other reset attempts. A hot removal
142  * may prevent this from succeeding.
143  */
nvme_try_sched_reset(struct nvme_ctrl * ctrl)144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
145 {
146 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
147 		return -EBUSY;
148 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
149 		return -EBUSY;
150 	return 0;
151 }
152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
153 
nvme_failfast_work(struct work_struct * work)154 static void nvme_failfast_work(struct work_struct *work)
155 {
156 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
157 			struct nvme_ctrl, failfast_work);
158 
159 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
160 		return;
161 
162 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
163 	dev_info(ctrl->device, "failfast expired\n");
164 	nvme_kick_requeue_lists(ctrl);
165 }
166 
nvme_start_failfast_work(struct nvme_ctrl * ctrl)167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
168 {
169 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
170 		return;
171 
172 	schedule_delayed_work(&ctrl->failfast_work,
173 			      ctrl->opts->fast_io_fail_tmo * HZ);
174 }
175 
nvme_stop_failfast_work(struct nvme_ctrl * ctrl)176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
177 {
178 	if (!ctrl->opts)
179 		return;
180 
181 	cancel_delayed_work_sync(&ctrl->failfast_work);
182 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
183 }
184 
185 
nvme_reset_ctrl(struct nvme_ctrl * ctrl)186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
187 {
188 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
189 		return -EBUSY;
190 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
191 		return -EBUSY;
192 	return 0;
193 }
194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
195 
nvme_reset_ctrl_sync(struct nvme_ctrl * ctrl)196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
197 {
198 	int ret;
199 
200 	ret = nvme_reset_ctrl(ctrl);
201 	if (!ret) {
202 		flush_work(&ctrl->reset_work);
203 		if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
204 			ret = -ENETRESET;
205 	}
206 
207 	return ret;
208 }
209 
nvme_do_delete_ctrl(struct nvme_ctrl * ctrl)210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
211 {
212 	dev_info(ctrl->device,
213 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
214 
215 	flush_work(&ctrl->reset_work);
216 	nvme_stop_ctrl(ctrl);
217 	nvme_remove_namespaces(ctrl);
218 	ctrl->ops->delete_ctrl(ctrl);
219 	nvme_uninit_ctrl(ctrl);
220 }
221 
nvme_delete_ctrl_work(struct work_struct * work)222 static void nvme_delete_ctrl_work(struct work_struct *work)
223 {
224 	struct nvme_ctrl *ctrl =
225 		container_of(work, struct nvme_ctrl, delete_work);
226 
227 	nvme_do_delete_ctrl(ctrl);
228 }
229 
nvme_delete_ctrl(struct nvme_ctrl * ctrl)230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
231 {
232 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
233 		return -EBUSY;
234 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
235 		return -EBUSY;
236 	return 0;
237 }
238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
239 
nvme_delete_ctrl_sync(struct nvme_ctrl * ctrl)240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
241 {
242 	/*
243 	 * Keep a reference until nvme_do_delete_ctrl() complete,
244 	 * since ->delete_ctrl can free the controller.
245 	 */
246 	nvme_get_ctrl(ctrl);
247 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
248 		nvme_do_delete_ctrl(ctrl);
249 	nvme_put_ctrl(ctrl);
250 }
251 
nvme_error_status(u16 status)252 static blk_status_t nvme_error_status(u16 status)
253 {
254 	switch (status & 0x7ff) {
255 	case NVME_SC_SUCCESS:
256 		return BLK_STS_OK;
257 	case NVME_SC_CAP_EXCEEDED:
258 		return BLK_STS_NOSPC;
259 	case NVME_SC_LBA_RANGE:
260 	case NVME_SC_CMD_INTERRUPTED:
261 	case NVME_SC_NS_NOT_READY:
262 		return BLK_STS_TARGET;
263 	case NVME_SC_BAD_ATTRIBUTES:
264 	case NVME_SC_ONCS_NOT_SUPPORTED:
265 	case NVME_SC_INVALID_OPCODE:
266 	case NVME_SC_INVALID_FIELD:
267 	case NVME_SC_INVALID_NS:
268 		return BLK_STS_NOTSUPP;
269 	case NVME_SC_WRITE_FAULT:
270 	case NVME_SC_READ_ERROR:
271 	case NVME_SC_UNWRITTEN_BLOCK:
272 	case NVME_SC_ACCESS_DENIED:
273 	case NVME_SC_READ_ONLY:
274 	case NVME_SC_COMPARE_FAILED:
275 		return BLK_STS_MEDIUM;
276 	case NVME_SC_GUARD_CHECK:
277 	case NVME_SC_APPTAG_CHECK:
278 	case NVME_SC_REFTAG_CHECK:
279 	case NVME_SC_INVALID_PI:
280 		return BLK_STS_PROTECTION;
281 	case NVME_SC_RESERVATION_CONFLICT:
282 		return BLK_STS_RESV_CONFLICT;
283 	case NVME_SC_HOST_PATH_ERROR:
284 		return BLK_STS_TRANSPORT;
285 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
286 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
287 	case NVME_SC_ZONE_TOO_MANY_OPEN:
288 		return BLK_STS_ZONE_OPEN_RESOURCE;
289 	default:
290 		return BLK_STS_IOERR;
291 	}
292 }
293 
nvme_retry_req(struct request * req)294 static void nvme_retry_req(struct request *req)
295 {
296 	unsigned long delay = 0;
297 	u16 crd;
298 
299 	/* The mask and shift result must be <= 3 */
300 	crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
301 	if (crd)
302 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
303 
304 	nvme_req(req)->retries++;
305 	blk_mq_requeue_request(req, false);
306 	blk_mq_delay_kick_requeue_list(req->q, delay);
307 }
308 
nvme_log_error(struct request * req)309 static void nvme_log_error(struct request *req)
310 {
311 	struct nvme_ns *ns = req->q->queuedata;
312 	struct nvme_request *nr = nvme_req(req);
313 
314 	if (ns) {
315 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
316 		       ns->disk ? ns->disk->disk_name : "?",
317 		       nvme_get_opcode_str(nr->cmd->common.opcode),
318 		       nr->cmd->common.opcode,
319 		       (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)),
320 		       (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift,
321 		       nvme_get_error_status_str(nr->status),
322 		       nr->status >> 8 & 7,	/* Status Code Type */
323 		       nr->status & 0xff,	/* Status Code */
324 		       nr->status & NVME_SC_MORE ? "MORE " : "",
325 		       nr->status & NVME_SC_DNR  ? "DNR "  : "");
326 		return;
327 	}
328 
329 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
330 			   dev_name(nr->ctrl->device),
331 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
332 			   nr->cmd->common.opcode,
333 			   nvme_get_error_status_str(nr->status),
334 			   nr->status >> 8 & 7,	/* Status Code Type */
335 			   nr->status & 0xff,	/* Status Code */
336 			   nr->status & NVME_SC_MORE ? "MORE " : "",
337 			   nr->status & NVME_SC_DNR  ? "DNR "  : "");
338 }
339 
340 enum nvme_disposition {
341 	COMPLETE,
342 	RETRY,
343 	FAILOVER,
344 	AUTHENTICATE,
345 };
346 
nvme_decide_disposition(struct request * req)347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
348 {
349 	if (likely(nvme_req(req)->status == 0))
350 		return COMPLETE;
351 
352 	if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
353 		return AUTHENTICATE;
354 
355 	if (blk_noretry_request(req) ||
356 	    (nvme_req(req)->status & NVME_SC_DNR) ||
357 	    nvme_req(req)->retries >= nvme_max_retries)
358 		return COMPLETE;
359 
360 	if (req->cmd_flags & REQ_NVME_MPATH) {
361 		if (nvme_is_path_error(nvme_req(req)->status) ||
362 		    blk_queue_dying(req->q))
363 			return FAILOVER;
364 	} else {
365 		if (blk_queue_dying(req->q))
366 			return COMPLETE;
367 	}
368 
369 	return RETRY;
370 }
371 
nvme_end_req_zoned(struct request * req)372 static inline void nvme_end_req_zoned(struct request *req)
373 {
374 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
375 	    req_op(req) == REQ_OP_ZONE_APPEND)
376 		req->__sector = nvme_lba_to_sect(req->q->queuedata,
377 			le64_to_cpu(nvme_req(req)->result.u64));
378 }
379 
nvme_end_req(struct request * req)380 void nvme_end_req(struct request *req)
381 {
382 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
383 
384 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
385 		nvme_log_error(req);
386 	nvme_end_req_zoned(req);
387 	nvme_trace_bio_complete(req);
388 	if (req->cmd_flags & REQ_NVME_MPATH)
389 		nvme_mpath_end_request(req);
390 	blk_mq_end_request(req, status);
391 }
392 
nvme_complete_rq(struct request * req)393 void nvme_complete_rq(struct request *req)
394 {
395 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
396 
397 	trace_nvme_complete_rq(req);
398 	nvme_cleanup_cmd(req);
399 
400 	/*
401 	 * Completions of long-running commands should not be able to
402 	 * defer sending of periodic keep alives, since the controller
403 	 * may have completed processing such commands a long time ago
404 	 * (arbitrarily close to command submission time).
405 	 * req->deadline - req->timeout is the command submission time
406 	 * in jiffies.
407 	 */
408 	if (ctrl->kas &&
409 	    req->deadline - req->timeout >= ctrl->ka_last_check_time)
410 		ctrl->comp_seen = true;
411 
412 	switch (nvme_decide_disposition(req)) {
413 	case COMPLETE:
414 		nvme_end_req(req);
415 		return;
416 	case RETRY:
417 		nvme_retry_req(req);
418 		return;
419 	case FAILOVER:
420 		nvme_failover_req(req);
421 		return;
422 	case AUTHENTICATE:
423 #ifdef CONFIG_NVME_AUTH
424 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
425 		nvme_retry_req(req);
426 #else
427 		nvme_end_req(req);
428 #endif
429 		return;
430 	}
431 }
432 EXPORT_SYMBOL_GPL(nvme_complete_rq);
433 
nvme_complete_batch_req(struct request * req)434 void nvme_complete_batch_req(struct request *req)
435 {
436 	trace_nvme_complete_rq(req);
437 	nvme_cleanup_cmd(req);
438 	nvme_end_req_zoned(req);
439 }
440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
441 
442 /*
443  * Called to unwind from ->queue_rq on a failed command submission so that the
444  * multipathing code gets called to potentially failover to another path.
445  * The caller needs to unwind all transport specific resource allocations and
446  * must return propagate the return value.
447  */
nvme_host_path_error(struct request * req)448 blk_status_t nvme_host_path_error(struct request *req)
449 {
450 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
451 	blk_mq_set_request_complete(req);
452 	nvme_complete_rq(req);
453 	return BLK_STS_OK;
454 }
455 EXPORT_SYMBOL_GPL(nvme_host_path_error);
456 
nvme_cancel_request(struct request * req,void * data)457 bool nvme_cancel_request(struct request *req, void *data)
458 {
459 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
460 				"Cancelling I/O %d", req->tag);
461 
462 	/* don't abort one completed or idle request */
463 	if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
464 		return true;
465 
466 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
467 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
468 	blk_mq_complete_request(req);
469 	return true;
470 }
471 EXPORT_SYMBOL_GPL(nvme_cancel_request);
472 
nvme_cancel_tagset(struct nvme_ctrl * ctrl)473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
474 {
475 	if (ctrl->tagset) {
476 		blk_mq_tagset_busy_iter(ctrl->tagset,
477 				nvme_cancel_request, ctrl);
478 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
479 	}
480 }
481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
482 
nvme_cancel_admin_tagset(struct nvme_ctrl * ctrl)483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
484 {
485 	if (ctrl->admin_tagset) {
486 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
487 				nvme_cancel_request, ctrl);
488 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
489 	}
490 }
491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
492 
nvme_change_ctrl_state(struct nvme_ctrl * ctrl,enum nvme_ctrl_state new_state)493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
494 		enum nvme_ctrl_state new_state)
495 {
496 	enum nvme_ctrl_state old_state;
497 	unsigned long flags;
498 	bool changed = false;
499 
500 	spin_lock_irqsave(&ctrl->lock, flags);
501 
502 	old_state = nvme_ctrl_state(ctrl);
503 	switch (new_state) {
504 	case NVME_CTRL_LIVE:
505 		switch (old_state) {
506 		case NVME_CTRL_CONNECTING:
507 			changed = true;
508 			fallthrough;
509 		default:
510 			break;
511 		}
512 		break;
513 	case NVME_CTRL_RESETTING:
514 		switch (old_state) {
515 		case NVME_CTRL_NEW:
516 		case NVME_CTRL_LIVE:
517 			changed = true;
518 			fallthrough;
519 		default:
520 			break;
521 		}
522 		break;
523 	case NVME_CTRL_CONNECTING:
524 		switch (old_state) {
525 		case NVME_CTRL_NEW:
526 		case NVME_CTRL_RESETTING:
527 			changed = true;
528 			fallthrough;
529 		default:
530 			break;
531 		}
532 		break;
533 	case NVME_CTRL_DELETING:
534 		switch (old_state) {
535 		case NVME_CTRL_LIVE:
536 		case NVME_CTRL_RESETTING:
537 		case NVME_CTRL_CONNECTING:
538 			changed = true;
539 			fallthrough;
540 		default:
541 			break;
542 		}
543 		break;
544 	case NVME_CTRL_DELETING_NOIO:
545 		switch (old_state) {
546 		case NVME_CTRL_DELETING:
547 		case NVME_CTRL_DEAD:
548 			changed = true;
549 			fallthrough;
550 		default:
551 			break;
552 		}
553 		break;
554 	case NVME_CTRL_DEAD:
555 		switch (old_state) {
556 		case NVME_CTRL_DELETING:
557 			changed = true;
558 			fallthrough;
559 		default:
560 			break;
561 		}
562 		break;
563 	default:
564 		break;
565 	}
566 
567 	if (changed) {
568 		WRITE_ONCE(ctrl->state, new_state);
569 		wake_up_all(&ctrl->state_wq);
570 	}
571 
572 	spin_unlock_irqrestore(&ctrl->lock, flags);
573 	if (!changed)
574 		return false;
575 
576 	if (new_state == NVME_CTRL_LIVE) {
577 		if (old_state == NVME_CTRL_CONNECTING)
578 			nvme_stop_failfast_work(ctrl);
579 		nvme_kick_requeue_lists(ctrl);
580 	} else if (new_state == NVME_CTRL_CONNECTING &&
581 		old_state == NVME_CTRL_RESETTING) {
582 		nvme_start_failfast_work(ctrl);
583 	}
584 	return changed;
585 }
586 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
587 
588 /*
589  * Waits for the controller state to be resetting, or returns false if it is
590  * not possible to ever transition to that state.
591  */
nvme_wait_reset(struct nvme_ctrl * ctrl)592 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
593 {
594 	wait_event(ctrl->state_wq,
595 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
596 		   nvme_state_terminal(ctrl));
597 	return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
598 }
599 EXPORT_SYMBOL_GPL(nvme_wait_reset);
600 
nvme_free_ns_head(struct kref * ref)601 static void nvme_free_ns_head(struct kref *ref)
602 {
603 	struct nvme_ns_head *head =
604 		container_of(ref, struct nvme_ns_head, ref);
605 
606 	nvme_mpath_remove_disk(head);
607 	ida_free(&head->subsys->ns_ida, head->instance);
608 	cleanup_srcu_struct(&head->srcu);
609 	nvme_put_subsystem(head->subsys);
610 	kfree(head);
611 }
612 
nvme_tryget_ns_head(struct nvme_ns_head * head)613 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
614 {
615 	return kref_get_unless_zero(&head->ref);
616 }
617 
nvme_put_ns_head(struct nvme_ns_head * head)618 void nvme_put_ns_head(struct nvme_ns_head *head)
619 {
620 	kref_put(&head->ref, nvme_free_ns_head);
621 }
622 
nvme_free_ns(struct kref * kref)623 static void nvme_free_ns(struct kref *kref)
624 {
625 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
626 
627 	put_disk(ns->disk);
628 	nvme_put_ns_head(ns->head);
629 	nvme_put_ctrl(ns->ctrl);
630 	kfree(ns);
631 }
632 
nvme_get_ns(struct nvme_ns * ns)633 bool nvme_get_ns(struct nvme_ns *ns)
634 {
635 	return kref_get_unless_zero(&ns->kref);
636 }
637 
nvme_put_ns(struct nvme_ns * ns)638 void nvme_put_ns(struct nvme_ns *ns)
639 {
640 	kref_put(&ns->kref, nvme_free_ns);
641 }
642 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
643 
nvme_clear_nvme_request(struct request * req)644 static inline void nvme_clear_nvme_request(struct request *req)
645 {
646 	nvme_req(req)->status = 0;
647 	nvme_req(req)->retries = 0;
648 	nvme_req(req)->flags = 0;
649 	req->rq_flags |= RQF_DONTPREP;
650 }
651 
652 /* initialize a passthrough request */
nvme_init_request(struct request * req,struct nvme_command * cmd)653 void nvme_init_request(struct request *req, struct nvme_command *cmd)
654 {
655 	if (req->q->queuedata)
656 		req->timeout = NVME_IO_TIMEOUT;
657 	else /* no queuedata implies admin queue */
658 		req->timeout = NVME_ADMIN_TIMEOUT;
659 
660 	/* passthru commands should let the driver set the SGL flags */
661 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
662 
663 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
664 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
665 		req->cmd_flags |= REQ_POLLED;
666 	nvme_clear_nvme_request(req);
667 	req->rq_flags |= RQF_QUIET;
668 	memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
669 }
670 EXPORT_SYMBOL_GPL(nvme_init_request);
671 
672 /*
673  * For something we're not in a state to send to the device the default action
674  * is to busy it and retry it after the controller state is recovered.  However,
675  * if the controller is deleting or if anything is marked for failfast or
676  * nvme multipath it is immediately failed.
677  *
678  * Note: commands used to initialize the controller will be marked for failfast.
679  * Note: nvme cli/ioctl commands are marked for failfast.
680  */
nvme_fail_nonready_command(struct nvme_ctrl * ctrl,struct request * rq)681 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
682 		struct request *rq)
683 {
684 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
685 
686 	if (state != NVME_CTRL_DELETING_NOIO &&
687 	    state != NVME_CTRL_DELETING &&
688 	    state != NVME_CTRL_DEAD &&
689 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
690 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
691 		return BLK_STS_RESOURCE;
692 	return nvme_host_path_error(rq);
693 }
694 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
695 
__nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)696 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
697 		bool queue_live)
698 {
699 	struct nvme_request *req = nvme_req(rq);
700 
701 	/*
702 	 * currently we have a problem sending passthru commands
703 	 * on the admin_q if the controller is not LIVE because we can't
704 	 * make sure that they are going out after the admin connect,
705 	 * controller enable and/or other commands in the initialization
706 	 * sequence. until the controller will be LIVE, fail with
707 	 * BLK_STS_RESOURCE so that they will be rescheduled.
708 	 */
709 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
710 		return false;
711 
712 	if (ctrl->ops->flags & NVME_F_FABRICS) {
713 		/*
714 		 * Only allow commands on a live queue, except for the connect
715 		 * command, which is require to set the queue live in the
716 		 * appropinquate states.
717 		 */
718 		switch (nvme_ctrl_state(ctrl)) {
719 		case NVME_CTRL_CONNECTING:
720 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
721 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
722 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
723 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
724 				return true;
725 			break;
726 		default:
727 			break;
728 		case NVME_CTRL_DEAD:
729 			return false;
730 		}
731 	}
732 
733 	return queue_live;
734 }
735 EXPORT_SYMBOL_GPL(__nvme_check_ready);
736 
nvme_setup_flush(struct nvme_ns * ns,struct nvme_command * cmnd)737 static inline void nvme_setup_flush(struct nvme_ns *ns,
738 		struct nvme_command *cmnd)
739 {
740 	memset(cmnd, 0, sizeof(*cmnd));
741 	cmnd->common.opcode = nvme_cmd_flush;
742 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
743 }
744 
nvme_setup_discard(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)745 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
746 		struct nvme_command *cmnd)
747 {
748 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
749 	struct nvme_dsm_range *range;
750 	struct bio *bio;
751 
752 	/*
753 	 * Some devices do not consider the DSM 'Number of Ranges' field when
754 	 * determining how much data to DMA. Always allocate memory for maximum
755 	 * number of segments to prevent device reading beyond end of buffer.
756 	 */
757 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
758 
759 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
760 	if (!range) {
761 		/*
762 		 * If we fail allocation our range, fallback to the controller
763 		 * discard page. If that's also busy, it's safe to return
764 		 * busy, as we know we can make progress once that's freed.
765 		 */
766 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
767 			return BLK_STS_RESOURCE;
768 
769 		range = page_address(ns->ctrl->discard_page);
770 	}
771 
772 	if (queue_max_discard_segments(req->q) == 1) {
773 		u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req));
774 		u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9);
775 
776 		range[0].cattr = cpu_to_le32(0);
777 		range[0].nlb = cpu_to_le32(nlb);
778 		range[0].slba = cpu_to_le64(slba);
779 		n = 1;
780 	} else {
781 		__rq_for_each_bio(bio, req) {
782 			u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector);
783 			u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
784 
785 			if (n < segments) {
786 				range[n].cattr = cpu_to_le32(0);
787 				range[n].nlb = cpu_to_le32(nlb);
788 				range[n].slba = cpu_to_le64(slba);
789 			}
790 			n++;
791 		}
792 	}
793 
794 	if (WARN_ON_ONCE(n != segments)) {
795 		if (virt_to_page(range) == ns->ctrl->discard_page)
796 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
797 		else
798 			kfree(range);
799 		return BLK_STS_IOERR;
800 	}
801 
802 	memset(cmnd, 0, sizeof(*cmnd));
803 	cmnd->dsm.opcode = nvme_cmd_dsm;
804 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
805 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
806 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
807 
808 	bvec_set_virt(&req->special_vec, range, alloc_size);
809 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
810 
811 	return BLK_STS_OK;
812 }
813 
nvme_set_ref_tag(struct nvme_ns * ns,struct nvme_command * cmnd,struct request * req)814 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
815 			      struct request *req)
816 {
817 	u32 upper, lower;
818 	u64 ref48;
819 
820 	/* both rw and write zeroes share the same reftag format */
821 	switch (ns->guard_type) {
822 	case NVME_NVM_NS_16B_GUARD:
823 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
824 		break;
825 	case NVME_NVM_NS_64B_GUARD:
826 		ref48 = ext_pi_ref_tag(req);
827 		lower = lower_32_bits(ref48);
828 		upper = upper_32_bits(ref48);
829 
830 		cmnd->rw.reftag = cpu_to_le32(lower);
831 		cmnd->rw.cdw3 = cpu_to_le32(upper);
832 		break;
833 	default:
834 		break;
835 	}
836 }
837 
nvme_setup_write_zeroes(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)838 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
839 		struct request *req, struct nvme_command *cmnd)
840 {
841 	memset(cmnd, 0, sizeof(*cmnd));
842 
843 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
844 		return nvme_setup_discard(ns, req, cmnd);
845 
846 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
847 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
848 	cmnd->write_zeroes.slba =
849 		cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
850 	cmnd->write_zeroes.length =
851 		cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
852 
853 	if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC))
854 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
855 
856 	if (nvme_ns_has_pi(ns)) {
857 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
858 
859 		switch (ns->pi_type) {
860 		case NVME_NS_DPS_PI_TYPE1:
861 		case NVME_NS_DPS_PI_TYPE2:
862 			nvme_set_ref_tag(ns, cmnd, req);
863 			break;
864 		}
865 	}
866 
867 	return BLK_STS_OK;
868 }
869 
nvme_setup_rw(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_opcode op)870 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
871 		struct request *req, struct nvme_command *cmnd,
872 		enum nvme_opcode op)
873 {
874 	u16 control = 0;
875 	u32 dsmgmt = 0;
876 
877 	if (req->cmd_flags & REQ_FUA)
878 		control |= NVME_RW_FUA;
879 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
880 		control |= NVME_RW_LR;
881 
882 	if (req->cmd_flags & REQ_RAHEAD)
883 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
884 
885 	cmnd->rw.opcode = op;
886 	cmnd->rw.flags = 0;
887 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
888 	cmnd->rw.cdw2 = 0;
889 	cmnd->rw.cdw3 = 0;
890 	cmnd->rw.metadata = 0;
891 	cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
892 	cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
893 	cmnd->rw.reftag = 0;
894 	cmnd->rw.apptag = 0;
895 	cmnd->rw.appmask = 0;
896 
897 	if (ns->ms) {
898 		/*
899 		 * If formated with metadata, the block layer always provides a
900 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
901 		 * we enable the PRACT bit for protection information or set the
902 		 * namespace capacity to zero to prevent any I/O.
903 		 */
904 		if (!blk_integrity_rq(req)) {
905 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
906 				return BLK_STS_NOTSUPP;
907 			control |= NVME_RW_PRINFO_PRACT;
908 		}
909 
910 		switch (ns->pi_type) {
911 		case NVME_NS_DPS_PI_TYPE3:
912 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
913 			break;
914 		case NVME_NS_DPS_PI_TYPE1:
915 		case NVME_NS_DPS_PI_TYPE2:
916 			control |= NVME_RW_PRINFO_PRCHK_GUARD |
917 					NVME_RW_PRINFO_PRCHK_REF;
918 			if (op == nvme_cmd_zone_append)
919 				control |= NVME_RW_APPEND_PIREMAP;
920 			nvme_set_ref_tag(ns, cmnd, req);
921 			break;
922 		}
923 	}
924 
925 	cmnd->rw.control = cpu_to_le16(control);
926 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
927 	return 0;
928 }
929 
nvme_cleanup_cmd(struct request * req)930 void nvme_cleanup_cmd(struct request *req)
931 {
932 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
933 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
934 
935 		if (req->special_vec.bv_page == ctrl->discard_page)
936 			clear_bit_unlock(0, &ctrl->discard_page_busy);
937 		else
938 			kfree(bvec_virt(&req->special_vec));
939 		req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
940 	}
941 }
942 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
943 
nvme_setup_cmd(struct nvme_ns * ns,struct request * req)944 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
945 {
946 	struct nvme_command *cmd = nvme_req(req)->cmd;
947 	blk_status_t ret = BLK_STS_OK;
948 
949 	if (!(req->rq_flags & RQF_DONTPREP))
950 		nvme_clear_nvme_request(req);
951 
952 	switch (req_op(req)) {
953 	case REQ_OP_DRV_IN:
954 	case REQ_OP_DRV_OUT:
955 		/* these are setup prior to execution in nvme_init_request() */
956 		break;
957 	case REQ_OP_FLUSH:
958 		nvme_setup_flush(ns, cmd);
959 		break;
960 	case REQ_OP_ZONE_RESET_ALL:
961 	case REQ_OP_ZONE_RESET:
962 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
963 		break;
964 	case REQ_OP_ZONE_OPEN:
965 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
966 		break;
967 	case REQ_OP_ZONE_CLOSE:
968 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
969 		break;
970 	case REQ_OP_ZONE_FINISH:
971 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
972 		break;
973 	case REQ_OP_WRITE_ZEROES:
974 		ret = nvme_setup_write_zeroes(ns, req, cmd);
975 		break;
976 	case REQ_OP_DISCARD:
977 		ret = nvme_setup_discard(ns, req, cmd);
978 		break;
979 	case REQ_OP_READ:
980 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
981 		break;
982 	case REQ_OP_WRITE:
983 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
984 		break;
985 	case REQ_OP_ZONE_APPEND:
986 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
987 		break;
988 	default:
989 		WARN_ON_ONCE(1);
990 		return BLK_STS_IOERR;
991 	}
992 
993 	cmd->common.command_id = nvme_cid(req);
994 	trace_nvme_setup_cmd(req, cmd);
995 	return ret;
996 }
997 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
998 
999 /*
1000  * Return values:
1001  * 0:  success
1002  * >0: nvme controller's cqe status response
1003  * <0: kernel error in lieu of controller response
1004  */
nvme_execute_rq(struct request * rq,bool at_head)1005 int nvme_execute_rq(struct request *rq, bool at_head)
1006 {
1007 	blk_status_t status;
1008 
1009 	status = blk_execute_rq(rq, at_head);
1010 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1011 		return -EINTR;
1012 	if (nvme_req(rq)->status)
1013 		return nvme_req(rq)->status;
1014 	return blk_status_to_errno(status);
1015 }
1016 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1017 
1018 /*
1019  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1020  * if the result is positive, it's an NVM Express status code
1021  */
__nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,union nvme_result * result,void * buffer,unsigned bufflen,int qid,int at_head,blk_mq_req_flags_t flags)1022 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1023 		union nvme_result *result, void *buffer, unsigned bufflen,
1024 		int qid, int at_head, blk_mq_req_flags_t flags)
1025 {
1026 	struct request *req;
1027 	int ret;
1028 
1029 	if (qid == NVME_QID_ANY)
1030 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1031 	else
1032 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1033 						qid - 1);
1034 
1035 	if (IS_ERR(req))
1036 		return PTR_ERR(req);
1037 	nvme_init_request(req, cmd);
1038 
1039 	if (buffer && bufflen) {
1040 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1041 		if (ret)
1042 			goto out;
1043 	}
1044 
1045 	ret = nvme_execute_rq(req, at_head);
1046 	if (result && ret >= 0)
1047 		*result = nvme_req(req)->result;
1048  out:
1049 	blk_mq_free_request(req);
1050 	return ret;
1051 }
1052 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1053 
nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,void * buffer,unsigned bufflen)1054 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1055 		void *buffer, unsigned bufflen)
1056 {
1057 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1058 			NVME_QID_ANY, 0, 0);
1059 }
1060 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1061 
nvme_command_effects(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1062 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1063 {
1064 	u32 effects = 0;
1065 
1066 	if (ns) {
1067 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1068 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1069 			dev_warn_once(ctrl->device,
1070 				"IO command:%02x has unusual effects:%08x\n",
1071 				opcode, effects);
1072 
1073 		/*
1074 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1075 		 * which would deadlock when done on an I/O command.  Note that
1076 		 * We already warn about an unusual effect above.
1077 		 */
1078 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1079 	} else {
1080 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1081 	}
1082 
1083 	return effects;
1084 }
1085 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1086 
nvme_passthru_start(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1087 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1088 {
1089 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1090 
1091 	/*
1092 	 * For simplicity, IO to all namespaces is quiesced even if the command
1093 	 * effects say only one namespace is affected.
1094 	 */
1095 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1096 		mutex_lock(&ctrl->scan_lock);
1097 		mutex_lock(&ctrl->subsys->lock);
1098 		nvme_mpath_start_freeze(ctrl->subsys);
1099 		nvme_mpath_wait_freeze(ctrl->subsys);
1100 		nvme_start_freeze(ctrl);
1101 		nvme_wait_freeze(ctrl);
1102 	}
1103 	return effects;
1104 }
1105 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1106 
nvme_passthru_end(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u32 effects,struct nvme_command * cmd,int status)1107 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1108 		       struct nvme_command *cmd, int status)
1109 {
1110 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1111 		nvme_unfreeze(ctrl);
1112 		nvme_mpath_unfreeze(ctrl->subsys);
1113 		mutex_unlock(&ctrl->subsys->lock);
1114 		mutex_unlock(&ctrl->scan_lock);
1115 	}
1116 	if (effects & NVME_CMD_EFFECTS_CCC) {
1117 		if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1118 				      &ctrl->flags)) {
1119 			dev_info(ctrl->device,
1120 "controller capabilities changed, reset may be required to take effect.\n");
1121 		}
1122 	}
1123 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1124 		nvme_queue_scan(ctrl);
1125 		flush_work(&ctrl->scan_work);
1126 	}
1127 	if (ns)
1128 		return;
1129 
1130 	switch (cmd->common.opcode) {
1131 	case nvme_admin_set_features:
1132 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1133 		case NVME_FEAT_KATO:
1134 			/*
1135 			 * Keep alive commands interval on the host should be
1136 			 * updated when KATO is modified by Set Features
1137 			 * commands.
1138 			 */
1139 			if (!status)
1140 				nvme_update_keep_alive(ctrl, cmd);
1141 			break;
1142 		default:
1143 			break;
1144 		}
1145 		break;
1146 	default:
1147 		break;
1148 	}
1149 }
1150 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1151 
1152 /*
1153  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1154  *
1155  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1156  *   accounting for transport roundtrip times [..].
1157  */
nvme_keep_alive_work_period(struct nvme_ctrl * ctrl)1158 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1159 {
1160 	unsigned long delay = ctrl->kato * HZ / 2;
1161 
1162 	/*
1163 	 * When using Traffic Based Keep Alive, we need to run
1164 	 * nvme_keep_alive_work at twice the normal frequency, as one
1165 	 * command completion can postpone sending a keep alive command
1166 	 * by up to twice the delay between runs.
1167 	 */
1168 	if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1169 		delay /= 2;
1170 	return delay;
1171 }
1172 
nvme_queue_keep_alive_work(struct nvme_ctrl * ctrl)1173 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1174 {
1175 	queue_delayed_work(nvme_wq, &ctrl->ka_work,
1176 			   nvme_keep_alive_work_period(ctrl));
1177 }
1178 
nvme_keep_alive_end_io(struct request * rq,blk_status_t status)1179 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1180 						 blk_status_t status)
1181 {
1182 	struct nvme_ctrl *ctrl = rq->end_io_data;
1183 	unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1184 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1185 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1186 
1187 	/*
1188 	 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1189 	 * at the desired frequency.
1190 	 */
1191 	if (rtt <= delay) {
1192 		delay -= rtt;
1193 	} else {
1194 		dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1195 			 jiffies_to_msecs(rtt));
1196 		delay = 0;
1197 	}
1198 
1199 	blk_mq_free_request(rq);
1200 
1201 	if (status) {
1202 		dev_err(ctrl->device,
1203 			"failed nvme_keep_alive_end_io error=%d\n",
1204 				status);
1205 		return RQ_END_IO_NONE;
1206 	}
1207 
1208 	ctrl->ka_last_check_time = jiffies;
1209 	ctrl->comp_seen = false;
1210 	if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1211 		queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1212 	return RQ_END_IO_NONE;
1213 }
1214 
nvme_keep_alive_work(struct work_struct * work)1215 static void nvme_keep_alive_work(struct work_struct *work)
1216 {
1217 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1218 			struct nvme_ctrl, ka_work);
1219 	bool comp_seen = ctrl->comp_seen;
1220 	struct request *rq;
1221 
1222 	ctrl->ka_last_check_time = jiffies;
1223 
1224 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1225 		dev_dbg(ctrl->device,
1226 			"reschedule traffic based keep-alive timer\n");
1227 		ctrl->comp_seen = false;
1228 		nvme_queue_keep_alive_work(ctrl);
1229 		return;
1230 	}
1231 
1232 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1233 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1234 	if (IS_ERR(rq)) {
1235 		/* allocation failure, reset the controller */
1236 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1237 		nvme_reset_ctrl(ctrl);
1238 		return;
1239 	}
1240 	nvme_init_request(rq, &ctrl->ka_cmd);
1241 
1242 	rq->timeout = ctrl->kato * HZ;
1243 	rq->end_io = nvme_keep_alive_end_io;
1244 	rq->end_io_data = ctrl;
1245 	blk_execute_rq_nowait(rq, false);
1246 }
1247 
nvme_start_keep_alive(struct nvme_ctrl * ctrl)1248 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1249 {
1250 	if (unlikely(ctrl->kato == 0))
1251 		return;
1252 
1253 	nvme_queue_keep_alive_work(ctrl);
1254 }
1255 
nvme_stop_keep_alive(struct nvme_ctrl * ctrl)1256 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1257 {
1258 	if (unlikely(ctrl->kato == 0))
1259 		return;
1260 
1261 	cancel_delayed_work_sync(&ctrl->ka_work);
1262 }
1263 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1264 
nvme_update_keep_alive(struct nvme_ctrl * ctrl,struct nvme_command * cmd)1265 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1266 				   struct nvme_command *cmd)
1267 {
1268 	unsigned int new_kato =
1269 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1270 
1271 	dev_info(ctrl->device,
1272 		 "keep alive interval updated from %u ms to %u ms\n",
1273 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1274 
1275 	nvme_stop_keep_alive(ctrl);
1276 	ctrl->kato = new_kato;
1277 	nvme_start_keep_alive(ctrl);
1278 }
1279 
1280 /*
1281  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1282  * flag, thus sending any new CNS opcodes has a big chance of not working.
1283  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1284  * (but not for any later version).
1285  */
nvme_ctrl_limited_cns(struct nvme_ctrl * ctrl)1286 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1287 {
1288 	if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1289 		return ctrl->vs < NVME_VS(1, 2, 0);
1290 	return ctrl->vs < NVME_VS(1, 1, 0);
1291 }
1292 
nvme_identify_ctrl(struct nvme_ctrl * dev,struct nvme_id_ctrl ** id)1293 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1294 {
1295 	struct nvme_command c = { };
1296 	int error;
1297 
1298 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1299 	c.identify.opcode = nvme_admin_identify;
1300 	c.identify.cns = NVME_ID_CNS_CTRL;
1301 
1302 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1303 	if (!*id)
1304 		return -ENOMEM;
1305 
1306 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1307 			sizeof(struct nvme_id_ctrl));
1308 	if (error) {
1309 		kfree(*id);
1310 		*id = NULL;
1311 	}
1312 	return error;
1313 }
1314 
nvme_process_ns_desc(struct nvme_ctrl * ctrl,struct nvme_ns_ids * ids,struct nvme_ns_id_desc * cur,bool * csi_seen)1315 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1316 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1317 {
1318 	const char *warn_str = "ctrl returned bogus length:";
1319 	void *data = cur;
1320 
1321 	switch (cur->nidt) {
1322 	case NVME_NIDT_EUI64:
1323 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1324 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1325 				 warn_str, cur->nidl);
1326 			return -1;
1327 		}
1328 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1329 			return NVME_NIDT_EUI64_LEN;
1330 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1331 		return NVME_NIDT_EUI64_LEN;
1332 	case NVME_NIDT_NGUID:
1333 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1334 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1335 				 warn_str, cur->nidl);
1336 			return -1;
1337 		}
1338 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1339 			return NVME_NIDT_NGUID_LEN;
1340 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1341 		return NVME_NIDT_NGUID_LEN;
1342 	case NVME_NIDT_UUID:
1343 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1344 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1345 				 warn_str, cur->nidl);
1346 			return -1;
1347 		}
1348 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1349 			return NVME_NIDT_UUID_LEN;
1350 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1351 		return NVME_NIDT_UUID_LEN;
1352 	case NVME_NIDT_CSI:
1353 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1354 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1355 				 warn_str, cur->nidl);
1356 			return -1;
1357 		}
1358 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1359 		*csi_seen = true;
1360 		return NVME_NIDT_CSI_LEN;
1361 	default:
1362 		/* Skip unknown types */
1363 		return cur->nidl;
1364 	}
1365 }
1366 
nvme_identify_ns_descs(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1367 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1368 		struct nvme_ns_info *info)
1369 {
1370 	struct nvme_command c = { };
1371 	bool csi_seen = false;
1372 	int status, pos, len;
1373 	void *data;
1374 
1375 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1376 		return 0;
1377 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1378 		return 0;
1379 
1380 	c.identify.opcode = nvme_admin_identify;
1381 	c.identify.nsid = cpu_to_le32(info->nsid);
1382 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1383 
1384 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1385 	if (!data)
1386 		return -ENOMEM;
1387 
1388 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1389 				      NVME_IDENTIFY_DATA_SIZE);
1390 	if (status) {
1391 		dev_warn(ctrl->device,
1392 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1393 			info->nsid, status);
1394 		goto free_data;
1395 	}
1396 
1397 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1398 		struct nvme_ns_id_desc *cur = data + pos;
1399 
1400 		if (cur->nidl == 0)
1401 			break;
1402 
1403 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1404 		if (len < 0)
1405 			break;
1406 
1407 		len += sizeof(*cur);
1408 	}
1409 
1410 	if (nvme_multi_css(ctrl) && !csi_seen) {
1411 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1412 			 info->nsid);
1413 		status = -EINVAL;
1414 	}
1415 
1416 free_data:
1417 	kfree(data);
1418 	return status;
1419 }
1420 
nvme_identify_ns(struct nvme_ctrl * ctrl,unsigned nsid,struct nvme_id_ns ** id)1421 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1422 			struct nvme_id_ns **id)
1423 {
1424 	struct nvme_command c = { };
1425 	int error;
1426 
1427 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1428 	c.identify.opcode = nvme_admin_identify;
1429 	c.identify.nsid = cpu_to_le32(nsid);
1430 	c.identify.cns = NVME_ID_CNS_NS;
1431 
1432 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1433 	if (!*id)
1434 		return -ENOMEM;
1435 
1436 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1437 	if (error) {
1438 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1439 		kfree(*id);
1440 		*id = NULL;
1441 	}
1442 	return error;
1443 }
1444 
nvme_ns_info_from_identify(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1445 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1446 		struct nvme_ns_info *info)
1447 {
1448 	struct nvme_ns_ids *ids = &info->ids;
1449 	struct nvme_id_ns *id;
1450 	int ret;
1451 
1452 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1453 	if (ret)
1454 		return ret;
1455 
1456 	if (id->ncap == 0) {
1457 		/* namespace not allocated or attached */
1458 		info->is_removed = true;
1459 		ret = -ENODEV;
1460 		goto error;
1461 	}
1462 
1463 	info->anagrpid = id->anagrpid;
1464 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1465 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1466 	info->is_ready = true;
1467 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1468 		dev_info(ctrl->device,
1469 			 "Ignoring bogus Namespace Identifiers\n");
1470 	} else {
1471 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1472 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1473 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1474 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1475 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1476 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1477 	}
1478 
1479 error:
1480 	kfree(id);
1481 	return ret;
1482 }
1483 
nvme_ns_info_from_id_cs_indep(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1484 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1485 		struct nvme_ns_info *info)
1486 {
1487 	struct nvme_id_ns_cs_indep *id;
1488 	struct nvme_command c = {
1489 		.identify.opcode	= nvme_admin_identify,
1490 		.identify.nsid		= cpu_to_le32(info->nsid),
1491 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1492 	};
1493 	int ret;
1494 
1495 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1496 	if (!id)
1497 		return -ENOMEM;
1498 
1499 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1500 	if (!ret) {
1501 		info->anagrpid = id->anagrpid;
1502 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1503 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1504 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1505 	}
1506 	kfree(id);
1507 	return ret;
1508 }
1509 
nvme_features(struct nvme_ctrl * dev,u8 op,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1510 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1511 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1512 {
1513 	union nvme_result res = { 0 };
1514 	struct nvme_command c = { };
1515 	int ret;
1516 
1517 	c.features.opcode = op;
1518 	c.features.fid = cpu_to_le32(fid);
1519 	c.features.dword11 = cpu_to_le32(dword11);
1520 
1521 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1522 			buffer, buflen, NVME_QID_ANY, 0, 0);
1523 	if (ret >= 0 && result)
1524 		*result = le32_to_cpu(res.u32);
1525 	return ret;
1526 }
1527 
nvme_set_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1528 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1529 		      unsigned int dword11, void *buffer, size_t buflen,
1530 		      u32 *result)
1531 {
1532 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1533 			     buflen, result);
1534 }
1535 EXPORT_SYMBOL_GPL(nvme_set_features);
1536 
nvme_get_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1537 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1538 		      unsigned int dword11, void *buffer, size_t buflen,
1539 		      u32 *result)
1540 {
1541 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1542 			     buflen, result);
1543 }
1544 EXPORT_SYMBOL_GPL(nvme_get_features);
1545 
nvme_set_queue_count(struct nvme_ctrl * ctrl,int * count)1546 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1547 {
1548 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1549 	u32 result;
1550 	int status, nr_io_queues;
1551 
1552 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1553 			&result);
1554 
1555 	/*
1556 	 * It's either a kernel error or the host observed a connection
1557 	 * lost. In either case it's not possible communicate with the
1558 	 * controller and thus enter the error code path.
1559 	 */
1560 	if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1561 		return status;
1562 
1563 	/*
1564 	 * Degraded controllers might return an error when setting the queue
1565 	 * count.  We still want to be able to bring them online and offer
1566 	 * access to the admin queue, as that might be only way to fix them up.
1567 	 */
1568 	if (status > 0) {
1569 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1570 		*count = 0;
1571 	} else {
1572 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1573 		*count = min(*count, nr_io_queues);
1574 	}
1575 
1576 	return 0;
1577 }
1578 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1579 
1580 #define NVME_AEN_SUPPORTED \
1581 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1582 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1583 
nvme_enable_aen(struct nvme_ctrl * ctrl)1584 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1585 {
1586 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1587 	int status;
1588 
1589 	if (!supported_aens)
1590 		return;
1591 
1592 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1593 			NULL, 0, &result);
1594 	if (status)
1595 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1596 			 supported_aens);
1597 
1598 	queue_work(nvme_wq, &ctrl->async_event_work);
1599 }
1600 
nvme_ns_open(struct nvme_ns * ns)1601 static int nvme_ns_open(struct nvme_ns *ns)
1602 {
1603 
1604 	/* should never be called due to GENHD_FL_HIDDEN */
1605 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1606 		goto fail;
1607 	if (!nvme_get_ns(ns))
1608 		goto fail;
1609 	if (!try_module_get(ns->ctrl->ops->module))
1610 		goto fail_put_ns;
1611 
1612 	return 0;
1613 
1614 fail_put_ns:
1615 	nvme_put_ns(ns);
1616 fail:
1617 	return -ENXIO;
1618 }
1619 
nvme_ns_release(struct nvme_ns * ns)1620 static void nvme_ns_release(struct nvme_ns *ns)
1621 {
1622 
1623 	module_put(ns->ctrl->ops->module);
1624 	nvme_put_ns(ns);
1625 }
1626 
nvme_open(struct gendisk * disk,blk_mode_t mode)1627 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1628 {
1629 	return nvme_ns_open(disk->private_data);
1630 }
1631 
nvme_release(struct gendisk * disk)1632 static void nvme_release(struct gendisk *disk)
1633 {
1634 	nvme_ns_release(disk->private_data);
1635 }
1636 
nvme_getgeo(struct block_device * bdev,struct hd_geometry * geo)1637 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1638 {
1639 	/* some standard values */
1640 	geo->heads = 1 << 6;
1641 	geo->sectors = 1 << 5;
1642 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1643 	return 0;
1644 }
1645 
1646 #ifdef CONFIG_BLK_DEV_INTEGRITY
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1647 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1648 				u32 max_integrity_segments)
1649 {
1650 	struct blk_integrity integrity = { };
1651 
1652 	switch (ns->pi_type) {
1653 	case NVME_NS_DPS_PI_TYPE3:
1654 		switch (ns->guard_type) {
1655 		case NVME_NVM_NS_16B_GUARD:
1656 			integrity.profile = &t10_pi_type3_crc;
1657 			integrity.tag_size = sizeof(u16) + sizeof(u32);
1658 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1659 			break;
1660 		case NVME_NVM_NS_64B_GUARD:
1661 			integrity.profile = &ext_pi_type3_crc64;
1662 			integrity.tag_size = sizeof(u16) + 6;
1663 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1664 			break;
1665 		default:
1666 			integrity.profile = NULL;
1667 			break;
1668 		}
1669 		break;
1670 	case NVME_NS_DPS_PI_TYPE1:
1671 	case NVME_NS_DPS_PI_TYPE2:
1672 		switch (ns->guard_type) {
1673 		case NVME_NVM_NS_16B_GUARD:
1674 			integrity.profile = &t10_pi_type1_crc;
1675 			integrity.tag_size = sizeof(u16);
1676 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1677 			break;
1678 		case NVME_NVM_NS_64B_GUARD:
1679 			integrity.profile = &ext_pi_type1_crc64;
1680 			integrity.tag_size = sizeof(u16);
1681 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1682 			break;
1683 		default:
1684 			integrity.profile = NULL;
1685 			break;
1686 		}
1687 		break;
1688 	default:
1689 		integrity.profile = NULL;
1690 		break;
1691 	}
1692 
1693 	integrity.tuple_size = ns->ms;
1694 	blk_integrity_register(disk, &integrity);
1695 	blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1696 }
1697 #else
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1698 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1699 				u32 max_integrity_segments)
1700 {
1701 }
1702 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1703 
nvme_config_discard(struct gendisk * disk,struct nvme_ns * ns)1704 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
1705 {
1706 	struct nvme_ctrl *ctrl = ns->ctrl;
1707 	struct request_queue *queue = disk->queue;
1708 	u32 size = queue_logical_block_size(queue);
1709 
1710 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX))
1711 		ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl);
1712 
1713 	if (ctrl->max_discard_sectors == 0) {
1714 		blk_queue_max_discard_sectors(queue, 0);
1715 		return;
1716 	}
1717 
1718 	BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1719 			NVME_DSM_MAX_RANGES);
1720 
1721 	queue->limits.discard_granularity = size;
1722 
1723 	/* If discard is already enabled, don't reset queue limits */
1724 	if (queue->limits.max_discard_sectors)
1725 		return;
1726 
1727 	blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
1728 	blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
1729 
1730 	if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1731 		blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1732 }
1733 
nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b)1734 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1735 {
1736 	return uuid_equal(&a->uuid, &b->uuid) &&
1737 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1738 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1739 		a->csi == b->csi;
1740 }
1741 
nvme_init_ms(struct nvme_ns * ns,struct nvme_id_ns * id)1742 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id)
1743 {
1744 	bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1745 	unsigned lbaf = nvme_lbaf_index(id->flbas);
1746 	struct nvme_ctrl *ctrl = ns->ctrl;
1747 	struct nvme_command c = { };
1748 	struct nvme_id_ns_nvm *nvm;
1749 	int ret = 0;
1750 	u32 elbaf;
1751 
1752 	ns->pi_size = 0;
1753 	ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1754 	if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1755 		ns->pi_size = sizeof(struct t10_pi_tuple);
1756 		ns->guard_type = NVME_NVM_NS_16B_GUARD;
1757 		goto set_pi;
1758 	}
1759 
1760 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1761 	if (!nvm)
1762 		return -ENOMEM;
1763 
1764 	c.identify.opcode = nvme_admin_identify;
1765 	c.identify.nsid = cpu_to_le32(ns->head->ns_id);
1766 	c.identify.cns = NVME_ID_CNS_CS_NS;
1767 	c.identify.csi = NVME_CSI_NVM;
1768 
1769 	ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm));
1770 	if (ret)
1771 		goto free_data;
1772 
1773 	elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1774 
1775 	/* no support for storage tag formats right now */
1776 	if (nvme_elbaf_sts(elbaf))
1777 		goto free_data;
1778 
1779 	ns->guard_type = nvme_elbaf_guard_type(elbaf);
1780 	switch (ns->guard_type) {
1781 	case NVME_NVM_NS_64B_GUARD:
1782 		ns->pi_size = sizeof(struct crc64_pi_tuple);
1783 		break;
1784 	case NVME_NVM_NS_16B_GUARD:
1785 		ns->pi_size = sizeof(struct t10_pi_tuple);
1786 		break;
1787 	default:
1788 		break;
1789 	}
1790 
1791 free_data:
1792 	kfree(nvm);
1793 set_pi:
1794 	if (ns->pi_size && (first || ns->ms == ns->pi_size))
1795 		ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1796 	else
1797 		ns->pi_type = 0;
1798 
1799 	return ret;
1800 }
1801 
nvme_configure_metadata(struct nvme_ns * ns,struct nvme_id_ns * id)1802 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id)
1803 {
1804 	struct nvme_ctrl *ctrl = ns->ctrl;
1805 	int ret;
1806 
1807 	ret = nvme_init_ms(ns, id);
1808 	if (ret)
1809 		return ret;
1810 
1811 	ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1812 	if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1813 		return 0;
1814 
1815 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1816 		/*
1817 		 * The NVMe over Fabrics specification only supports metadata as
1818 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1819 		 * remap the separate metadata buffer from the block layer.
1820 		 */
1821 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1822 			return 0;
1823 
1824 		ns->features |= NVME_NS_EXT_LBAS;
1825 
1826 		/*
1827 		 * The current fabrics transport drivers support namespace
1828 		 * metadata formats only if nvme_ns_has_pi() returns true.
1829 		 * Suppress support for all other formats so the namespace will
1830 		 * have a 0 capacity and not be usable through the block stack.
1831 		 *
1832 		 * Note, this check will need to be modified if any drivers
1833 		 * gain the ability to use other metadata formats.
1834 		 */
1835 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns))
1836 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1837 	} else {
1838 		/*
1839 		 * For PCIe controllers, we can't easily remap the separate
1840 		 * metadata buffer from the block layer and thus require a
1841 		 * separate metadata buffer for block layer metadata/PI support.
1842 		 * We allow extended LBAs for the passthrough interface, though.
1843 		 */
1844 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
1845 			ns->features |= NVME_NS_EXT_LBAS;
1846 		else
1847 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1848 	}
1849 	return 0;
1850 }
1851 
nvme_set_queue_limits(struct nvme_ctrl * ctrl,struct request_queue * q)1852 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1853 		struct request_queue *q)
1854 {
1855 	bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1856 
1857 	if (ctrl->max_hw_sectors) {
1858 		u32 max_segments =
1859 			(ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1860 
1861 		max_segments = min_not_zero(max_segments, ctrl->max_segments);
1862 		blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1863 		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1864 	}
1865 	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1866 	blk_queue_dma_alignment(q, 3);
1867 	blk_queue_write_cache(q, vwc, vwc);
1868 }
1869 
nvme_update_disk_info(struct gendisk * disk,struct nvme_ns * ns,struct nvme_id_ns * id)1870 static void nvme_update_disk_info(struct gendisk *disk,
1871 		struct nvme_ns *ns, struct nvme_id_ns *id)
1872 {
1873 	sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze));
1874 	u32 bs = 1U << ns->lba_shift;
1875 	u32 atomic_bs, phys_bs, io_opt = 0;
1876 
1877 	/*
1878 	 * The block layer can't support LBA sizes larger than the page size
1879 	 * or smaller than a sector size yet, so catch this early and don't
1880 	 * allow block I/O.
1881 	 */
1882 	if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) {
1883 		capacity = 0;
1884 		bs = (1 << 9);
1885 	}
1886 
1887 	blk_integrity_unregister(disk);
1888 
1889 	atomic_bs = phys_bs = bs;
1890 	if (id->nabo == 0) {
1891 		/*
1892 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
1893 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
1894 		 * 0 then AWUPF must be used instead.
1895 		 */
1896 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1897 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1898 		else
1899 			atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1900 	}
1901 
1902 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1903 		/* NPWG = Namespace Preferred Write Granularity */
1904 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1905 		/* NOWS = Namespace Optimal Write Size */
1906 		io_opt = bs * (1 + le16_to_cpu(id->nows));
1907 	}
1908 
1909 	blk_queue_logical_block_size(disk->queue, bs);
1910 	/*
1911 	 * Linux filesystems assume writing a single physical block is
1912 	 * an atomic operation. Hence limit the physical block size to the
1913 	 * value of the Atomic Write Unit Power Fail parameter.
1914 	 */
1915 	blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1916 	blk_queue_io_min(disk->queue, phys_bs);
1917 	blk_queue_io_opt(disk->queue, io_opt);
1918 
1919 	/*
1920 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
1921 	 * metadata masquerading as Type 0 if supported, otherwise reject block
1922 	 * I/O to namespaces with metadata except when the namespace supports
1923 	 * PI, as it can strip/insert in that case.
1924 	 */
1925 	if (ns->ms) {
1926 		if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1927 		    (ns->features & NVME_NS_METADATA_SUPPORTED))
1928 			nvme_init_integrity(disk, ns,
1929 					    ns->ctrl->max_integrity_segments);
1930 		else if (!nvme_ns_has_pi(ns))
1931 			capacity = 0;
1932 	}
1933 
1934 	set_capacity_and_notify(disk, capacity);
1935 
1936 	nvme_config_discard(disk, ns);
1937 	blk_queue_max_write_zeroes_sectors(disk->queue,
1938 					   ns->ctrl->max_zeroes_sectors);
1939 }
1940 
nvme_ns_is_readonly(struct nvme_ns * ns,struct nvme_ns_info * info)1941 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1942 {
1943 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1944 }
1945 
nvme_first_scan(struct gendisk * disk)1946 static inline bool nvme_first_scan(struct gendisk *disk)
1947 {
1948 	/* nvme_alloc_ns() scans the disk prior to adding it */
1949 	return !disk_live(disk);
1950 }
1951 
nvme_set_chunk_sectors(struct nvme_ns * ns,struct nvme_id_ns * id)1952 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
1953 {
1954 	struct nvme_ctrl *ctrl = ns->ctrl;
1955 	u32 iob;
1956 
1957 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
1958 	    is_power_of_2(ctrl->max_hw_sectors))
1959 		iob = ctrl->max_hw_sectors;
1960 	else
1961 		iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob));
1962 
1963 	if (!iob)
1964 		return;
1965 
1966 	if (!is_power_of_2(iob)) {
1967 		if (nvme_first_scan(ns->disk))
1968 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
1969 				ns->disk->disk_name, iob);
1970 		return;
1971 	}
1972 
1973 	if (blk_queue_is_zoned(ns->disk->queue)) {
1974 		if (nvme_first_scan(ns->disk))
1975 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
1976 				ns->disk->disk_name);
1977 		return;
1978 	}
1979 
1980 	blk_queue_chunk_sectors(ns->queue, iob);
1981 }
1982 
nvme_update_ns_info_generic(struct nvme_ns * ns,struct nvme_ns_info * info)1983 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
1984 		struct nvme_ns_info *info)
1985 {
1986 	blk_mq_freeze_queue(ns->disk->queue);
1987 	nvme_set_queue_limits(ns->ctrl, ns->queue);
1988 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1989 	blk_mq_unfreeze_queue(ns->disk->queue);
1990 
1991 	if (nvme_ns_head_multipath(ns->head)) {
1992 		blk_mq_freeze_queue(ns->head->disk->queue);
1993 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
1994 		nvme_mpath_revalidate_paths(ns);
1995 		blk_stack_limits(&ns->head->disk->queue->limits,
1996 				 &ns->queue->limits, 0);
1997 		ns->head->disk->flags |= GENHD_FL_HIDDEN;
1998 		blk_mq_unfreeze_queue(ns->head->disk->queue);
1999 	}
2000 
2001 	/* Hide the block-interface for these devices */
2002 	ns->disk->flags |= GENHD_FL_HIDDEN;
2003 	set_bit(NVME_NS_READY, &ns->flags);
2004 
2005 	return 0;
2006 }
2007 
nvme_update_ns_info_block(struct nvme_ns * ns,struct nvme_ns_info * info)2008 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2009 		struct nvme_ns_info *info)
2010 {
2011 	struct nvme_id_ns *id;
2012 	unsigned lbaf;
2013 	int ret;
2014 
2015 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2016 	if (ret)
2017 		return ret;
2018 
2019 	if (id->ncap == 0) {
2020 		/* namespace not allocated or attached */
2021 		info->is_removed = true;
2022 		ret = -ENODEV;
2023 		goto error;
2024 	}
2025 
2026 	blk_mq_freeze_queue(ns->disk->queue);
2027 	lbaf = nvme_lbaf_index(id->flbas);
2028 	ns->lba_shift = id->lbaf[lbaf].ds;
2029 	nvme_set_queue_limits(ns->ctrl, ns->queue);
2030 
2031 	ret = nvme_configure_metadata(ns, id);
2032 	if (ret < 0) {
2033 		blk_mq_unfreeze_queue(ns->disk->queue);
2034 		goto out;
2035 	}
2036 	nvme_set_chunk_sectors(ns, id);
2037 	nvme_update_disk_info(ns->disk, ns, id);
2038 
2039 	if (ns->head->ids.csi == NVME_CSI_ZNS) {
2040 		ret = nvme_update_zone_info(ns, lbaf);
2041 		if (ret) {
2042 			blk_mq_unfreeze_queue(ns->disk->queue);
2043 			goto out;
2044 		}
2045 	}
2046 
2047 	/*
2048 	 * Only set the DEAC bit if the device guarantees that reads from
2049 	 * deallocated data return zeroes.  While the DEAC bit does not
2050 	 * require that, it must be a no-op if reads from deallocated data
2051 	 * do not return zeroes.
2052 	 */
2053 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2054 		ns->features |= NVME_NS_DEAC;
2055 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2056 	set_bit(NVME_NS_READY, &ns->flags);
2057 	blk_mq_unfreeze_queue(ns->disk->queue);
2058 
2059 	if (blk_queue_is_zoned(ns->queue)) {
2060 		ret = nvme_revalidate_zones(ns);
2061 		if (ret && !nvme_first_scan(ns->disk))
2062 			goto out;
2063 	}
2064 
2065 	if (nvme_ns_head_multipath(ns->head)) {
2066 		blk_mq_freeze_queue(ns->head->disk->queue);
2067 		nvme_update_disk_info(ns->head->disk, ns, id);
2068 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2069 		nvme_mpath_revalidate_paths(ns);
2070 		blk_stack_limits(&ns->head->disk->queue->limits,
2071 				 &ns->queue->limits, 0);
2072 		disk_update_readahead(ns->head->disk);
2073 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2074 	}
2075 
2076 	ret = 0;
2077 out:
2078 	/*
2079 	 * If probing fails due an unsupported feature, hide the block device,
2080 	 * but still allow other access.
2081 	 */
2082 	if (ret == -ENODEV) {
2083 		ns->disk->flags |= GENHD_FL_HIDDEN;
2084 		set_bit(NVME_NS_READY, &ns->flags);
2085 		ret = 0;
2086 	}
2087 
2088 error:
2089 	kfree(id);
2090 	return ret;
2091 }
2092 
nvme_update_ns_info(struct nvme_ns * ns,struct nvme_ns_info * info)2093 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2094 {
2095 	switch (info->ids.csi) {
2096 	case NVME_CSI_ZNS:
2097 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2098 			dev_info(ns->ctrl->device,
2099 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2100 				info->nsid);
2101 			return nvme_update_ns_info_generic(ns, info);
2102 		}
2103 		return nvme_update_ns_info_block(ns, info);
2104 	case NVME_CSI_NVM:
2105 		return nvme_update_ns_info_block(ns, info);
2106 	default:
2107 		dev_info(ns->ctrl->device,
2108 			"block device for nsid %u not supported (csi %u)\n",
2109 			info->nsid, info->ids.csi);
2110 		return nvme_update_ns_info_generic(ns, info);
2111 	}
2112 }
2113 
2114 #ifdef CONFIG_BLK_SED_OPAL
nvme_sec_submit(void * data,u16 spsp,u8 secp,void * buffer,size_t len,bool send)2115 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2116 		bool send)
2117 {
2118 	struct nvme_ctrl *ctrl = data;
2119 	struct nvme_command cmd = { };
2120 
2121 	if (send)
2122 		cmd.common.opcode = nvme_admin_security_send;
2123 	else
2124 		cmd.common.opcode = nvme_admin_security_recv;
2125 	cmd.common.nsid = 0;
2126 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2127 	cmd.common.cdw11 = cpu_to_le32(len);
2128 
2129 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2130 			NVME_QID_ANY, 1, 0);
2131 }
2132 
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2133 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2134 {
2135 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2136 		if (!ctrl->opal_dev)
2137 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2138 		else if (was_suspended)
2139 			opal_unlock_from_suspend(ctrl->opal_dev);
2140 	} else {
2141 		free_opal_dev(ctrl->opal_dev);
2142 		ctrl->opal_dev = NULL;
2143 	}
2144 }
2145 #else
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2146 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2147 {
2148 }
2149 #endif /* CONFIG_BLK_SED_OPAL */
2150 
2151 #ifdef CONFIG_BLK_DEV_ZONED
nvme_report_zones(struct gendisk * disk,sector_t sector,unsigned int nr_zones,report_zones_cb cb,void * data)2152 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2153 		unsigned int nr_zones, report_zones_cb cb, void *data)
2154 {
2155 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2156 			data);
2157 }
2158 #else
2159 #define nvme_report_zones	NULL
2160 #endif /* CONFIG_BLK_DEV_ZONED */
2161 
2162 const struct block_device_operations nvme_bdev_ops = {
2163 	.owner		= THIS_MODULE,
2164 	.ioctl		= nvme_ioctl,
2165 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2166 	.open		= nvme_open,
2167 	.release	= nvme_release,
2168 	.getgeo		= nvme_getgeo,
2169 	.report_zones	= nvme_report_zones,
2170 	.pr_ops		= &nvme_pr_ops,
2171 };
2172 
nvme_wait_ready(struct nvme_ctrl * ctrl,u32 mask,u32 val,u32 timeout,const char * op)2173 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2174 		u32 timeout, const char *op)
2175 {
2176 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2177 	u32 csts;
2178 	int ret;
2179 
2180 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2181 		if (csts == ~0)
2182 			return -ENODEV;
2183 		if ((csts & mask) == val)
2184 			break;
2185 
2186 		usleep_range(1000, 2000);
2187 		if (fatal_signal_pending(current))
2188 			return -EINTR;
2189 		if (time_after(jiffies, timeout_jiffies)) {
2190 			dev_err(ctrl->device,
2191 				"Device not ready; aborting %s, CSTS=0x%x\n",
2192 				op, csts);
2193 			return -ENODEV;
2194 		}
2195 	}
2196 
2197 	return ret;
2198 }
2199 
nvme_disable_ctrl(struct nvme_ctrl * ctrl,bool shutdown)2200 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2201 {
2202 	int ret;
2203 
2204 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2205 	if (shutdown)
2206 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2207 	else
2208 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2209 
2210 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2211 	if (ret)
2212 		return ret;
2213 
2214 	if (shutdown) {
2215 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2216 				       NVME_CSTS_SHST_CMPLT,
2217 				       ctrl->shutdown_timeout, "shutdown");
2218 	}
2219 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2220 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2221 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2222 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2223 }
2224 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2225 
nvme_enable_ctrl(struct nvme_ctrl * ctrl)2226 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2227 {
2228 	unsigned dev_page_min;
2229 	u32 timeout;
2230 	int ret;
2231 
2232 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2233 	if (ret) {
2234 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2235 		return ret;
2236 	}
2237 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2238 
2239 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2240 		dev_err(ctrl->device,
2241 			"Minimum device page size %u too large for host (%u)\n",
2242 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2243 		return -ENODEV;
2244 	}
2245 
2246 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2247 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2248 	else
2249 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2250 
2251 	/*
2252 	 * Setting CRIME results in CSTS.RDY before the media is ready. This
2253 	 * makes it possible for media related commands to return the error
2254 	 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2255 	 * restructured to handle retries, disable CC.CRIME.
2256 	 */
2257 	ctrl->ctrl_config &= ~NVME_CC_CRIME;
2258 
2259 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2260 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2261 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2262 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2263 	if (ret)
2264 		return ret;
2265 
2266 	/* Flush write to device (required if transport is PCI) */
2267 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2268 	if (ret)
2269 		return ret;
2270 
2271 	/* CAP value may change after initial CC write */
2272 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2273 	if (ret)
2274 		return ret;
2275 
2276 	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2277 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2278 		u32 crto, ready_timeout;
2279 
2280 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2281 		if (ret) {
2282 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2283 				ret);
2284 			return ret;
2285 		}
2286 
2287 		/*
2288 		 * CRTO should always be greater or equal to CAP.TO, but some
2289 		 * devices are known to get this wrong. Use the larger of the
2290 		 * two values.
2291 		 */
2292 		ready_timeout = NVME_CRTO_CRWMT(crto);
2293 
2294 		if (ready_timeout < timeout)
2295 			dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2296 				      crto, ctrl->cap);
2297 		else
2298 			timeout = ready_timeout;
2299 	}
2300 
2301 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2302 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2303 	if (ret)
2304 		return ret;
2305 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2306 			       (timeout + 1) / 2, "initialisation");
2307 }
2308 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2309 
nvme_configure_timestamp(struct nvme_ctrl * ctrl)2310 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2311 {
2312 	__le64 ts;
2313 	int ret;
2314 
2315 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2316 		return 0;
2317 
2318 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2319 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2320 			NULL);
2321 	if (ret)
2322 		dev_warn_once(ctrl->device,
2323 			"could not set timestamp (%d)\n", ret);
2324 	return ret;
2325 }
2326 
nvme_configure_host_options(struct nvme_ctrl * ctrl)2327 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2328 {
2329 	struct nvme_feat_host_behavior *host;
2330 	u8 acre = 0, lbafee = 0;
2331 	int ret;
2332 
2333 	/* Don't bother enabling the feature if retry delay is not reported */
2334 	if (ctrl->crdt[0])
2335 		acre = NVME_ENABLE_ACRE;
2336 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2337 		lbafee = NVME_ENABLE_LBAFEE;
2338 
2339 	if (!acre && !lbafee)
2340 		return 0;
2341 
2342 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2343 	if (!host)
2344 		return 0;
2345 
2346 	host->acre = acre;
2347 	host->lbafee = lbafee;
2348 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2349 				host, sizeof(*host), NULL);
2350 	kfree(host);
2351 	return ret;
2352 }
2353 
2354 /*
2355  * The function checks whether the given total (exlat + enlat) latency of
2356  * a power state allows the latter to be used as an APST transition target.
2357  * It does so by comparing the latency to the primary and secondary latency
2358  * tolerances defined by module params. If there's a match, the corresponding
2359  * timeout value is returned and the matching tolerance index (1 or 2) is
2360  * reported.
2361  */
nvme_apst_get_transition_time(u64 total_latency,u64 * transition_time,unsigned * last_index)2362 static bool nvme_apst_get_transition_time(u64 total_latency,
2363 		u64 *transition_time, unsigned *last_index)
2364 {
2365 	if (total_latency <= apst_primary_latency_tol_us) {
2366 		if (*last_index == 1)
2367 			return false;
2368 		*last_index = 1;
2369 		*transition_time = apst_primary_timeout_ms;
2370 		return true;
2371 	}
2372 	if (apst_secondary_timeout_ms &&
2373 		total_latency <= apst_secondary_latency_tol_us) {
2374 		if (*last_index <= 2)
2375 			return false;
2376 		*last_index = 2;
2377 		*transition_time = apst_secondary_timeout_ms;
2378 		return true;
2379 	}
2380 	return false;
2381 }
2382 
2383 /*
2384  * APST (Autonomous Power State Transition) lets us program a table of power
2385  * state transitions that the controller will perform automatically.
2386  *
2387  * Depending on module params, one of the two supported techniques will be used:
2388  *
2389  * - If the parameters provide explicit timeouts and tolerances, they will be
2390  *   used to build a table with up to 2 non-operational states to transition to.
2391  *   The default parameter values were selected based on the values used by
2392  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2393  *   regeneration of the APST table in the event of switching between external
2394  *   and battery power, the timeouts and tolerances reflect a compromise
2395  *   between values used by Microsoft for AC and battery scenarios.
2396  * - If not, we'll configure the table with a simple heuristic: we are willing
2397  *   to spend at most 2% of the time transitioning between power states.
2398  *   Therefore, when running in any given state, we will enter the next
2399  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2400  *   microseconds, as long as that state's exit latency is under the requested
2401  *   maximum latency.
2402  *
2403  * We will not autonomously enter any non-operational state for which the total
2404  * latency exceeds ps_max_latency_us.
2405  *
2406  * Users can set ps_max_latency_us to zero to turn off APST.
2407  */
nvme_configure_apst(struct nvme_ctrl * ctrl)2408 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2409 {
2410 	struct nvme_feat_auto_pst *table;
2411 	unsigned apste = 0;
2412 	u64 max_lat_us = 0;
2413 	__le64 target = 0;
2414 	int max_ps = -1;
2415 	int state;
2416 	int ret;
2417 	unsigned last_lt_index = UINT_MAX;
2418 
2419 	/*
2420 	 * If APST isn't supported or if we haven't been initialized yet,
2421 	 * then don't do anything.
2422 	 */
2423 	if (!ctrl->apsta)
2424 		return 0;
2425 
2426 	if (ctrl->npss > 31) {
2427 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2428 		return 0;
2429 	}
2430 
2431 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2432 	if (!table)
2433 		return 0;
2434 
2435 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2436 		/* Turn off APST. */
2437 		dev_dbg(ctrl->device, "APST disabled\n");
2438 		goto done;
2439 	}
2440 
2441 	/*
2442 	 * Walk through all states from lowest- to highest-power.
2443 	 * According to the spec, lower-numbered states use more power.  NPSS,
2444 	 * despite the name, is the index of the lowest-power state, not the
2445 	 * number of states.
2446 	 */
2447 	for (state = (int)ctrl->npss; state >= 0; state--) {
2448 		u64 total_latency_us, exit_latency_us, transition_ms;
2449 
2450 		if (target)
2451 			table->entries[state] = target;
2452 
2453 		/*
2454 		 * Don't allow transitions to the deepest state if it's quirked
2455 		 * off.
2456 		 */
2457 		if (state == ctrl->npss &&
2458 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2459 			continue;
2460 
2461 		/*
2462 		 * Is this state a useful non-operational state for higher-power
2463 		 * states to autonomously transition to?
2464 		 */
2465 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2466 			continue;
2467 
2468 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2469 		if (exit_latency_us > ctrl->ps_max_latency_us)
2470 			continue;
2471 
2472 		total_latency_us = exit_latency_us +
2473 			le32_to_cpu(ctrl->psd[state].entry_lat);
2474 
2475 		/*
2476 		 * This state is good. It can be used as the APST idle target
2477 		 * for higher power states.
2478 		 */
2479 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2480 			if (!nvme_apst_get_transition_time(total_latency_us,
2481 					&transition_ms, &last_lt_index))
2482 				continue;
2483 		} else {
2484 			transition_ms = total_latency_us + 19;
2485 			do_div(transition_ms, 20);
2486 			if (transition_ms > (1 << 24) - 1)
2487 				transition_ms = (1 << 24) - 1;
2488 		}
2489 
2490 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2491 		if (max_ps == -1)
2492 			max_ps = state;
2493 		if (total_latency_us > max_lat_us)
2494 			max_lat_us = total_latency_us;
2495 	}
2496 
2497 	if (max_ps == -1)
2498 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2499 	else
2500 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2501 			max_ps, max_lat_us, (int)sizeof(*table), table);
2502 	apste = 1;
2503 
2504 done:
2505 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2506 				table, sizeof(*table), NULL);
2507 	if (ret)
2508 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2509 	kfree(table);
2510 	return ret;
2511 }
2512 
nvme_set_latency_tolerance(struct device * dev,s32 val)2513 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2514 {
2515 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2516 	u64 latency;
2517 
2518 	switch (val) {
2519 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2520 	case PM_QOS_LATENCY_ANY:
2521 		latency = U64_MAX;
2522 		break;
2523 
2524 	default:
2525 		latency = val;
2526 	}
2527 
2528 	if (ctrl->ps_max_latency_us != latency) {
2529 		ctrl->ps_max_latency_us = latency;
2530 		if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2531 			nvme_configure_apst(ctrl);
2532 	}
2533 }
2534 
2535 struct nvme_core_quirk_entry {
2536 	/*
2537 	 * NVMe model and firmware strings are padded with spaces.  For
2538 	 * simplicity, strings in the quirk table are padded with NULLs
2539 	 * instead.
2540 	 */
2541 	u16 vid;
2542 	const char *mn;
2543 	const char *fr;
2544 	unsigned long quirks;
2545 };
2546 
2547 static const struct nvme_core_quirk_entry core_quirks[] = {
2548 	{
2549 		/*
2550 		 * This Toshiba device seems to die using any APST states.  See:
2551 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2552 		 */
2553 		.vid = 0x1179,
2554 		.mn = "THNSF5256GPUK TOSHIBA",
2555 		.quirks = NVME_QUIRK_NO_APST,
2556 	},
2557 	{
2558 		/*
2559 		 * This LiteON CL1-3D*-Q11 firmware version has a race
2560 		 * condition associated with actions related to suspend to idle
2561 		 * LiteON has resolved the problem in future firmware
2562 		 */
2563 		.vid = 0x14a4,
2564 		.fr = "22301111",
2565 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2566 	},
2567 	{
2568 		/*
2569 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2570 		 * aborts I/O during any load, but more easily reproducible
2571 		 * with discards (fstrim).
2572 		 *
2573 		 * The device is left in a state where it is also not possible
2574 		 * to use "nvme set-feature" to disable APST, but booting with
2575 		 * nvme_core.default_ps_max_latency=0 works.
2576 		 */
2577 		.vid = 0x1e0f,
2578 		.mn = "KCD6XVUL6T40",
2579 		.quirks = NVME_QUIRK_NO_APST,
2580 	},
2581 	{
2582 		/*
2583 		 * The external Samsung X5 SSD fails initialization without a
2584 		 * delay before checking if it is ready and has a whole set of
2585 		 * other problems.  To make this even more interesting, it
2586 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
2587 		 * does not need or want these quirks.
2588 		 */
2589 		.vid = 0x144d,
2590 		.mn = "Samsung Portable SSD X5",
2591 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2592 			  NVME_QUIRK_NO_DEEPEST_PS |
2593 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
2594 	}
2595 };
2596 
2597 /* match is null-terminated but idstr is space-padded. */
string_matches(const char * idstr,const char * match,size_t len)2598 static bool string_matches(const char *idstr, const char *match, size_t len)
2599 {
2600 	size_t matchlen;
2601 
2602 	if (!match)
2603 		return true;
2604 
2605 	matchlen = strlen(match);
2606 	WARN_ON_ONCE(matchlen > len);
2607 
2608 	if (memcmp(idstr, match, matchlen))
2609 		return false;
2610 
2611 	for (; matchlen < len; matchlen++)
2612 		if (idstr[matchlen] != ' ')
2613 			return false;
2614 
2615 	return true;
2616 }
2617 
quirk_matches(const struct nvme_id_ctrl * id,const struct nvme_core_quirk_entry * q)2618 static bool quirk_matches(const struct nvme_id_ctrl *id,
2619 			  const struct nvme_core_quirk_entry *q)
2620 {
2621 	return q->vid == le16_to_cpu(id->vid) &&
2622 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2623 		string_matches(id->fr, q->fr, sizeof(id->fr));
2624 }
2625 
nvme_init_subnqn(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2626 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2627 		struct nvme_id_ctrl *id)
2628 {
2629 	size_t nqnlen;
2630 	int off;
2631 
2632 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2633 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2634 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2635 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2636 			return;
2637 		}
2638 
2639 		if (ctrl->vs >= NVME_VS(1, 2, 1))
2640 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2641 	}
2642 
2643 	/*
2644 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2645 	 * Base Specification 2.0.  It is slightly different from the format
2646 	 * specified there due to historic reasons, and we can't change it now.
2647 	 */
2648 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2649 			"nqn.2014.08.org.nvmexpress:%04x%04x",
2650 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2651 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2652 	off += sizeof(id->sn);
2653 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2654 	off += sizeof(id->mn);
2655 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2656 }
2657 
nvme_release_subsystem(struct device * dev)2658 static void nvme_release_subsystem(struct device *dev)
2659 {
2660 	struct nvme_subsystem *subsys =
2661 		container_of(dev, struct nvme_subsystem, dev);
2662 
2663 	if (subsys->instance >= 0)
2664 		ida_free(&nvme_instance_ida, subsys->instance);
2665 	kfree(subsys);
2666 }
2667 
nvme_destroy_subsystem(struct kref * ref)2668 static void nvme_destroy_subsystem(struct kref *ref)
2669 {
2670 	struct nvme_subsystem *subsys =
2671 			container_of(ref, struct nvme_subsystem, ref);
2672 
2673 	mutex_lock(&nvme_subsystems_lock);
2674 	list_del(&subsys->entry);
2675 	mutex_unlock(&nvme_subsystems_lock);
2676 
2677 	ida_destroy(&subsys->ns_ida);
2678 	device_del(&subsys->dev);
2679 	put_device(&subsys->dev);
2680 }
2681 
nvme_put_subsystem(struct nvme_subsystem * subsys)2682 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2683 {
2684 	kref_put(&subsys->ref, nvme_destroy_subsystem);
2685 }
2686 
__nvme_find_get_subsystem(const char * subsysnqn)2687 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2688 {
2689 	struct nvme_subsystem *subsys;
2690 
2691 	lockdep_assert_held(&nvme_subsystems_lock);
2692 
2693 	/*
2694 	 * Fail matches for discovery subsystems. This results
2695 	 * in each discovery controller bound to a unique subsystem.
2696 	 * This avoids issues with validating controller values
2697 	 * that can only be true when there is a single unique subsystem.
2698 	 * There may be multiple and completely independent entities
2699 	 * that provide discovery controllers.
2700 	 */
2701 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2702 		return NULL;
2703 
2704 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
2705 		if (strcmp(subsys->subnqn, subsysnqn))
2706 			continue;
2707 		if (!kref_get_unless_zero(&subsys->ref))
2708 			continue;
2709 		return subsys;
2710 	}
2711 
2712 	return NULL;
2713 }
2714 
nvme_discovery_ctrl(struct nvme_ctrl * ctrl)2715 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2716 {
2717 	return ctrl->opts && ctrl->opts->discovery_nqn;
2718 }
2719 
nvme_validate_cntlid(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2720 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2721 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2722 {
2723 	struct nvme_ctrl *tmp;
2724 
2725 	lockdep_assert_held(&nvme_subsystems_lock);
2726 
2727 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2728 		if (nvme_state_terminal(tmp))
2729 			continue;
2730 
2731 		if (tmp->cntlid == ctrl->cntlid) {
2732 			dev_err(ctrl->device,
2733 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2734 				ctrl->cntlid, dev_name(tmp->device),
2735 				subsys->subnqn);
2736 			return false;
2737 		}
2738 
2739 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2740 		    nvme_discovery_ctrl(ctrl))
2741 			continue;
2742 
2743 		dev_err(ctrl->device,
2744 			"Subsystem does not support multiple controllers\n");
2745 		return false;
2746 	}
2747 
2748 	return true;
2749 }
2750 
nvme_init_subsystem(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2751 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2752 {
2753 	struct nvme_subsystem *subsys, *found;
2754 	int ret;
2755 
2756 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2757 	if (!subsys)
2758 		return -ENOMEM;
2759 
2760 	subsys->instance = -1;
2761 	mutex_init(&subsys->lock);
2762 	kref_init(&subsys->ref);
2763 	INIT_LIST_HEAD(&subsys->ctrls);
2764 	INIT_LIST_HEAD(&subsys->nsheads);
2765 	nvme_init_subnqn(subsys, ctrl, id);
2766 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2767 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
2768 	subsys->vendor_id = le16_to_cpu(id->vid);
2769 	subsys->cmic = id->cmic;
2770 
2771 	/* Versions prior to 1.4 don't necessarily report a valid type */
2772 	if (id->cntrltype == NVME_CTRL_DISC ||
2773 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2774 		subsys->subtype = NVME_NQN_DISC;
2775 	else
2776 		subsys->subtype = NVME_NQN_NVME;
2777 
2778 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2779 		dev_err(ctrl->device,
2780 			"Subsystem %s is not a discovery controller",
2781 			subsys->subnqn);
2782 		kfree(subsys);
2783 		return -EINVAL;
2784 	}
2785 	subsys->awupf = le16_to_cpu(id->awupf);
2786 	nvme_mpath_default_iopolicy(subsys);
2787 
2788 	subsys->dev.class = nvme_subsys_class;
2789 	subsys->dev.release = nvme_release_subsystem;
2790 	subsys->dev.groups = nvme_subsys_attrs_groups;
2791 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2792 	device_initialize(&subsys->dev);
2793 
2794 	mutex_lock(&nvme_subsystems_lock);
2795 	found = __nvme_find_get_subsystem(subsys->subnqn);
2796 	if (found) {
2797 		put_device(&subsys->dev);
2798 		subsys = found;
2799 
2800 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2801 			ret = -EINVAL;
2802 			goto out_put_subsystem;
2803 		}
2804 	} else {
2805 		ret = device_add(&subsys->dev);
2806 		if (ret) {
2807 			dev_err(ctrl->device,
2808 				"failed to register subsystem device.\n");
2809 			put_device(&subsys->dev);
2810 			goto out_unlock;
2811 		}
2812 		ida_init(&subsys->ns_ida);
2813 		list_add_tail(&subsys->entry, &nvme_subsystems);
2814 	}
2815 
2816 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2817 				dev_name(ctrl->device));
2818 	if (ret) {
2819 		dev_err(ctrl->device,
2820 			"failed to create sysfs link from subsystem.\n");
2821 		goto out_put_subsystem;
2822 	}
2823 
2824 	if (!found)
2825 		subsys->instance = ctrl->instance;
2826 	ctrl->subsys = subsys;
2827 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2828 	mutex_unlock(&nvme_subsystems_lock);
2829 	return 0;
2830 
2831 out_put_subsystem:
2832 	nvme_put_subsystem(subsys);
2833 out_unlock:
2834 	mutex_unlock(&nvme_subsystems_lock);
2835 	return ret;
2836 }
2837 
nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset)2838 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2839 		void *log, size_t size, u64 offset)
2840 {
2841 	struct nvme_command c = { };
2842 	u32 dwlen = nvme_bytes_to_numd(size);
2843 
2844 	c.get_log_page.opcode = nvme_admin_get_log_page;
2845 	c.get_log_page.nsid = cpu_to_le32(nsid);
2846 	c.get_log_page.lid = log_page;
2847 	c.get_log_page.lsp = lsp;
2848 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2849 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2850 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2851 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2852 	c.get_log_page.csi = csi;
2853 
2854 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2855 }
2856 
nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)2857 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2858 				struct nvme_effects_log **log)
2859 {
2860 	struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi);
2861 	int ret;
2862 
2863 	if (cel)
2864 		goto out;
2865 
2866 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2867 	if (!cel)
2868 		return -ENOMEM;
2869 
2870 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2871 			cel, sizeof(*cel), 0);
2872 	if (ret) {
2873 		kfree(cel);
2874 		return ret;
2875 	}
2876 
2877 	old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2878 	if (xa_is_err(old)) {
2879 		kfree(cel);
2880 		return xa_err(old);
2881 	}
2882 out:
2883 	*log = cel;
2884 	return 0;
2885 }
2886 
nvme_mps_to_sectors(struct nvme_ctrl * ctrl,u32 units)2887 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2888 {
2889 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2890 
2891 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
2892 		return UINT_MAX;
2893 	return val;
2894 }
2895 
nvme_init_non_mdts_limits(struct nvme_ctrl * ctrl)2896 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2897 {
2898 	struct nvme_command c = { };
2899 	struct nvme_id_ctrl_nvm *id;
2900 	int ret;
2901 
2902 	if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
2903 		ctrl->max_discard_sectors = UINT_MAX;
2904 		ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
2905 	} else {
2906 		ctrl->max_discard_sectors = 0;
2907 		ctrl->max_discard_segments = 0;
2908 	}
2909 
2910 	/*
2911 	 * Even though NVMe spec explicitly states that MDTS is not applicable
2912 	 * to the write-zeroes, we are cautious and limit the size to the
2913 	 * controllers max_hw_sectors value, which is based on the MDTS field
2914 	 * and possibly other limiting factors.
2915 	 */
2916 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
2917 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
2918 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
2919 	else
2920 		ctrl->max_zeroes_sectors = 0;
2921 
2922 	if (ctrl->subsys->subtype != NVME_NQN_NVME ||
2923 	    nvme_ctrl_limited_cns(ctrl) ||
2924 	    test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
2925 		return 0;
2926 
2927 	id = kzalloc(sizeof(*id), GFP_KERNEL);
2928 	if (!id)
2929 		return -ENOMEM;
2930 
2931 	c.identify.opcode = nvme_admin_identify;
2932 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
2933 	c.identify.csi = NVME_CSI_NVM;
2934 
2935 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
2936 	if (ret)
2937 		goto free_data;
2938 
2939 	if (id->dmrl)
2940 		ctrl->max_discard_segments = id->dmrl;
2941 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
2942 	if (id->wzsl)
2943 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
2944 
2945 free_data:
2946 	if (ret > 0)
2947 		set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
2948 	kfree(id);
2949 	return ret;
2950 }
2951 
nvme_init_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)2952 static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
2953 		u8 csi, struct nvme_effects_log **log)
2954 {
2955 	struct nvme_effects_log *effects, *old;
2956 
2957 	effects = kzalloc(sizeof(*effects), GFP_KERNEL);
2958 	if (!effects)
2959 		return -ENOMEM;
2960 
2961 	old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL);
2962 	if (xa_is_err(old)) {
2963 		kfree(effects);
2964 		return xa_err(old);
2965 	}
2966 
2967 	*log = effects;
2968 	return 0;
2969 }
2970 
nvme_init_known_nvm_effects(struct nvme_ctrl * ctrl)2971 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
2972 {
2973 	struct nvme_effects_log	*log = ctrl->effects;
2974 
2975 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2976 						NVME_CMD_EFFECTS_NCC |
2977 						NVME_CMD_EFFECTS_CSE_MASK);
2978 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2979 						NVME_CMD_EFFECTS_CSE_MASK);
2980 
2981 	/*
2982 	 * The spec says the result of a security receive command depends on
2983 	 * the previous security send command. As such, many vendors log this
2984 	 * command as one to submitted only when no other commands to the same
2985 	 * namespace are outstanding. The intention is to tell the host to
2986 	 * prevent mixing security send and receive.
2987 	 *
2988 	 * This driver can only enforce such exclusive access against IO
2989 	 * queues, though. We are not readily able to enforce such a rule for
2990 	 * two commands to the admin queue, which is the only queue that
2991 	 * matters for this command.
2992 	 *
2993 	 * Rather than blindly freezing the IO queues for this effect that
2994 	 * doesn't even apply to IO, mask it off.
2995 	 */
2996 	log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
2997 
2998 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
2999 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3000 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3001 }
3002 
nvme_init_effects(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3003 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3004 {
3005 	int ret = 0;
3006 
3007 	if (ctrl->effects)
3008 		return 0;
3009 
3010 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3011 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3012 		if (ret < 0)
3013 			return ret;
3014 	}
3015 
3016 	if (!ctrl->effects) {
3017 		ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3018 		if (ret < 0)
3019 			return ret;
3020 	}
3021 
3022 	nvme_init_known_nvm_effects(ctrl);
3023 	return 0;
3024 }
3025 
nvme_init_identify(struct nvme_ctrl * ctrl)3026 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3027 {
3028 	struct nvme_id_ctrl *id;
3029 	u32 max_hw_sectors;
3030 	bool prev_apst_enabled;
3031 	int ret;
3032 
3033 	ret = nvme_identify_ctrl(ctrl, &id);
3034 	if (ret) {
3035 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3036 		return -EIO;
3037 	}
3038 
3039 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3040 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3041 
3042 	if (!ctrl->identified) {
3043 		unsigned int i;
3044 
3045 		/*
3046 		 * Check for quirks.  Quirk can depend on firmware version,
3047 		 * so, in principle, the set of quirks present can change
3048 		 * across a reset.  As a possible future enhancement, we
3049 		 * could re-scan for quirks every time we reinitialize
3050 		 * the device, but we'd have to make sure that the driver
3051 		 * behaves intelligently if the quirks change.
3052 		 */
3053 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3054 			if (quirk_matches(id, &core_quirks[i]))
3055 				ctrl->quirks |= core_quirks[i].quirks;
3056 		}
3057 
3058 		ret = nvme_init_subsystem(ctrl, id);
3059 		if (ret)
3060 			goto out_free;
3061 
3062 		ret = nvme_init_effects(ctrl, id);
3063 		if (ret)
3064 			goto out_free;
3065 	}
3066 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3067 	       sizeof(ctrl->subsys->firmware_rev));
3068 
3069 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3070 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3071 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3072 	}
3073 
3074 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3075 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3076 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3077 
3078 	ctrl->oacs = le16_to_cpu(id->oacs);
3079 	ctrl->oncs = le16_to_cpu(id->oncs);
3080 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3081 	ctrl->oaes = le32_to_cpu(id->oaes);
3082 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3083 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3084 
3085 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3086 	ctrl->vwc = id->vwc;
3087 	if (id->mdts)
3088 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3089 	else
3090 		max_hw_sectors = UINT_MAX;
3091 	ctrl->max_hw_sectors =
3092 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3093 
3094 	nvme_set_queue_limits(ctrl, ctrl->admin_q);
3095 	ctrl->sgls = le32_to_cpu(id->sgls);
3096 	ctrl->kas = le16_to_cpu(id->kas);
3097 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3098 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3099 
3100 	ctrl->cntrltype = id->cntrltype;
3101 	ctrl->dctype = id->dctype;
3102 
3103 	if (id->rtd3e) {
3104 		/* us -> s */
3105 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3106 
3107 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3108 						 shutdown_timeout, 60);
3109 
3110 		if (ctrl->shutdown_timeout != shutdown_timeout)
3111 			dev_info(ctrl->device,
3112 				 "Shutdown timeout set to %u seconds\n",
3113 				 ctrl->shutdown_timeout);
3114 	} else
3115 		ctrl->shutdown_timeout = shutdown_timeout;
3116 
3117 	ctrl->npss = id->npss;
3118 	ctrl->apsta = id->apsta;
3119 	prev_apst_enabled = ctrl->apst_enabled;
3120 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3121 		if (force_apst && id->apsta) {
3122 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3123 			ctrl->apst_enabled = true;
3124 		} else {
3125 			ctrl->apst_enabled = false;
3126 		}
3127 	} else {
3128 		ctrl->apst_enabled = id->apsta;
3129 	}
3130 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3131 
3132 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3133 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3134 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3135 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3136 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3137 
3138 		/*
3139 		 * In fabrics we need to verify the cntlid matches the
3140 		 * admin connect
3141 		 */
3142 		if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3143 			dev_err(ctrl->device,
3144 				"Mismatching cntlid: Connect %u vs Identify "
3145 				"%u, rejecting\n",
3146 				ctrl->cntlid, le16_to_cpu(id->cntlid));
3147 			ret = -EINVAL;
3148 			goto out_free;
3149 		}
3150 
3151 		if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3152 			dev_err(ctrl->device,
3153 				"keep-alive support is mandatory for fabrics\n");
3154 			ret = -EINVAL;
3155 			goto out_free;
3156 		}
3157 	} else {
3158 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3159 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3160 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3161 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3162 	}
3163 
3164 	ret = nvme_mpath_init_identify(ctrl, id);
3165 	if (ret < 0)
3166 		goto out_free;
3167 
3168 	if (ctrl->apst_enabled && !prev_apst_enabled)
3169 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3170 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3171 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3172 
3173 out_free:
3174 	kfree(id);
3175 	return ret;
3176 }
3177 
3178 /*
3179  * Initialize the cached copies of the Identify data and various controller
3180  * register in our nvme_ctrl structure.  This should be called as soon as
3181  * the admin queue is fully up and running.
3182  */
nvme_init_ctrl_finish(struct nvme_ctrl * ctrl,bool was_suspended)3183 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3184 {
3185 	int ret;
3186 
3187 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3188 	if (ret) {
3189 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3190 		return ret;
3191 	}
3192 
3193 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3194 
3195 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3196 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3197 
3198 	ret = nvme_init_identify(ctrl);
3199 	if (ret)
3200 		return ret;
3201 
3202 	ret = nvme_configure_apst(ctrl);
3203 	if (ret < 0)
3204 		return ret;
3205 
3206 	ret = nvme_configure_timestamp(ctrl);
3207 	if (ret < 0)
3208 		return ret;
3209 
3210 	ret = nvme_configure_host_options(ctrl);
3211 	if (ret < 0)
3212 		return ret;
3213 
3214 	nvme_configure_opal(ctrl, was_suspended);
3215 
3216 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3217 		/*
3218 		 * Do not return errors unless we are in a controller reset,
3219 		 * the controller works perfectly fine without hwmon.
3220 		 */
3221 		ret = nvme_hwmon_init(ctrl);
3222 		if (ret == -EINTR)
3223 			return ret;
3224 	}
3225 
3226 	clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3227 	ctrl->identified = true;
3228 
3229 	return 0;
3230 }
3231 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3232 
nvme_dev_open(struct inode * inode,struct file * file)3233 static int nvme_dev_open(struct inode *inode, struct file *file)
3234 {
3235 	struct nvme_ctrl *ctrl =
3236 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3237 
3238 	switch (nvme_ctrl_state(ctrl)) {
3239 	case NVME_CTRL_LIVE:
3240 		break;
3241 	default:
3242 		return -EWOULDBLOCK;
3243 	}
3244 
3245 	nvme_get_ctrl(ctrl);
3246 	if (!try_module_get(ctrl->ops->module)) {
3247 		nvme_put_ctrl(ctrl);
3248 		return -EINVAL;
3249 	}
3250 
3251 	file->private_data = ctrl;
3252 	return 0;
3253 }
3254 
nvme_dev_release(struct inode * inode,struct file * file)3255 static int nvme_dev_release(struct inode *inode, struct file *file)
3256 {
3257 	struct nvme_ctrl *ctrl =
3258 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3259 
3260 	module_put(ctrl->ops->module);
3261 	nvme_put_ctrl(ctrl);
3262 	return 0;
3263 }
3264 
3265 static const struct file_operations nvme_dev_fops = {
3266 	.owner		= THIS_MODULE,
3267 	.open		= nvme_dev_open,
3268 	.release	= nvme_dev_release,
3269 	.unlocked_ioctl	= nvme_dev_ioctl,
3270 	.compat_ioctl	= compat_ptr_ioctl,
3271 	.uring_cmd	= nvme_dev_uring_cmd,
3272 };
3273 
nvme_find_ns_head(struct nvme_ctrl * ctrl,unsigned nsid)3274 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3275 		unsigned nsid)
3276 {
3277 	struct nvme_ns_head *h;
3278 
3279 	lockdep_assert_held(&ctrl->subsys->lock);
3280 
3281 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3282 		/*
3283 		 * Private namespaces can share NSIDs under some conditions.
3284 		 * In that case we can't use the same ns_head for namespaces
3285 		 * with the same NSID.
3286 		 */
3287 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3288 			continue;
3289 		if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3290 			return h;
3291 	}
3292 
3293 	return NULL;
3294 }
3295 
nvme_subsys_check_duplicate_ids(struct nvme_subsystem * subsys,struct nvme_ns_ids * ids)3296 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3297 		struct nvme_ns_ids *ids)
3298 {
3299 	bool has_uuid = !uuid_is_null(&ids->uuid);
3300 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3301 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3302 	struct nvme_ns_head *h;
3303 
3304 	lockdep_assert_held(&subsys->lock);
3305 
3306 	list_for_each_entry(h, &subsys->nsheads, entry) {
3307 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3308 			return -EINVAL;
3309 		if (has_nguid &&
3310 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3311 			return -EINVAL;
3312 		if (has_eui64 &&
3313 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3314 			return -EINVAL;
3315 	}
3316 
3317 	return 0;
3318 }
3319 
nvme_cdev_rel(struct device * dev)3320 static void nvme_cdev_rel(struct device *dev)
3321 {
3322 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3323 }
3324 
nvme_cdev_del(struct cdev * cdev,struct device * cdev_device)3325 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3326 {
3327 	cdev_device_del(cdev, cdev_device);
3328 	put_device(cdev_device);
3329 }
3330 
nvme_cdev_add(struct cdev * cdev,struct device * cdev_device,const struct file_operations * fops,struct module * owner)3331 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3332 		const struct file_operations *fops, struct module *owner)
3333 {
3334 	int minor, ret;
3335 
3336 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3337 	if (minor < 0)
3338 		return minor;
3339 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3340 	cdev_device->class = nvme_ns_chr_class;
3341 	cdev_device->release = nvme_cdev_rel;
3342 	device_initialize(cdev_device);
3343 	cdev_init(cdev, fops);
3344 	cdev->owner = owner;
3345 	ret = cdev_device_add(cdev, cdev_device);
3346 	if (ret)
3347 		put_device(cdev_device);
3348 
3349 	return ret;
3350 }
3351 
nvme_ns_chr_open(struct inode * inode,struct file * file)3352 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3353 {
3354 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3355 }
3356 
nvme_ns_chr_release(struct inode * inode,struct file * file)3357 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3358 {
3359 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3360 	return 0;
3361 }
3362 
3363 static const struct file_operations nvme_ns_chr_fops = {
3364 	.owner		= THIS_MODULE,
3365 	.open		= nvme_ns_chr_open,
3366 	.release	= nvme_ns_chr_release,
3367 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
3368 	.compat_ioctl	= compat_ptr_ioctl,
3369 	.uring_cmd	= nvme_ns_chr_uring_cmd,
3370 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3371 };
3372 
nvme_add_ns_cdev(struct nvme_ns * ns)3373 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3374 {
3375 	int ret;
3376 
3377 	ns->cdev_device.parent = ns->ctrl->device;
3378 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3379 			   ns->ctrl->instance, ns->head->instance);
3380 	if (ret)
3381 		return ret;
3382 
3383 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3384 			     ns->ctrl->ops->module);
3385 }
3386 
nvme_alloc_ns_head(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3387 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3388 		struct nvme_ns_info *info)
3389 {
3390 	struct nvme_ns_head *head;
3391 	size_t size = sizeof(*head);
3392 	int ret = -ENOMEM;
3393 
3394 #ifdef CONFIG_NVME_MULTIPATH
3395 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
3396 #endif
3397 
3398 	head = kzalloc(size, GFP_KERNEL);
3399 	if (!head)
3400 		goto out;
3401 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3402 	if (ret < 0)
3403 		goto out_free_head;
3404 	head->instance = ret;
3405 	INIT_LIST_HEAD(&head->list);
3406 	ret = init_srcu_struct(&head->srcu);
3407 	if (ret)
3408 		goto out_ida_remove;
3409 	head->subsys = ctrl->subsys;
3410 	head->ns_id = info->nsid;
3411 	head->ids = info->ids;
3412 	head->shared = info->is_shared;
3413 	kref_init(&head->ref);
3414 
3415 	if (head->ids.csi) {
3416 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3417 		if (ret)
3418 			goto out_cleanup_srcu;
3419 	} else
3420 		head->effects = ctrl->effects;
3421 
3422 	ret = nvme_mpath_alloc_disk(ctrl, head);
3423 	if (ret)
3424 		goto out_cleanup_srcu;
3425 
3426 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3427 
3428 	kref_get(&ctrl->subsys->ref);
3429 
3430 	return head;
3431 out_cleanup_srcu:
3432 	cleanup_srcu_struct(&head->srcu);
3433 out_ida_remove:
3434 	ida_free(&ctrl->subsys->ns_ida, head->instance);
3435 out_free_head:
3436 	kfree(head);
3437 out:
3438 	if (ret > 0)
3439 		ret = blk_status_to_errno(nvme_error_status(ret));
3440 	return ERR_PTR(ret);
3441 }
3442 
nvme_global_check_duplicate_ids(struct nvme_subsystem * this,struct nvme_ns_ids * ids)3443 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3444 		struct nvme_ns_ids *ids)
3445 {
3446 	struct nvme_subsystem *s;
3447 	int ret = 0;
3448 
3449 	/*
3450 	 * Note that this check is racy as we try to avoid holding the global
3451 	 * lock over the whole ns_head creation.  But it is only intended as
3452 	 * a sanity check anyway.
3453 	 */
3454 	mutex_lock(&nvme_subsystems_lock);
3455 	list_for_each_entry(s, &nvme_subsystems, entry) {
3456 		if (s == this)
3457 			continue;
3458 		mutex_lock(&s->lock);
3459 		ret = nvme_subsys_check_duplicate_ids(s, ids);
3460 		mutex_unlock(&s->lock);
3461 		if (ret)
3462 			break;
3463 	}
3464 	mutex_unlock(&nvme_subsystems_lock);
3465 
3466 	return ret;
3467 }
3468 
nvme_init_ns_head(struct nvme_ns * ns,struct nvme_ns_info * info)3469 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3470 {
3471 	struct nvme_ctrl *ctrl = ns->ctrl;
3472 	struct nvme_ns_head *head = NULL;
3473 	int ret;
3474 
3475 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3476 	if (ret) {
3477 		/*
3478 		 * We've found two different namespaces on two different
3479 		 * subsystems that report the same ID.  This is pretty nasty
3480 		 * for anything that actually requires unique device
3481 		 * identification.  In the kernel we need this for multipathing,
3482 		 * and in user space the /dev/disk/by-id/ links rely on it.
3483 		 *
3484 		 * If the device also claims to be multi-path capable back off
3485 		 * here now and refuse the probe the second device as this is a
3486 		 * recipe for data corruption.  If not this is probably a
3487 		 * cheap consumer device if on the PCIe bus, so let the user
3488 		 * proceed and use the shiny toy, but warn that with changing
3489 		 * probing order (which due to our async probing could just be
3490 		 * device taking longer to startup) the other device could show
3491 		 * up at any time.
3492 		 */
3493 		nvme_print_device_info(ctrl);
3494 		if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3495 		    ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3496 		     info->is_shared)) {
3497 			dev_err(ctrl->device,
3498 				"ignoring nsid %d because of duplicate IDs\n",
3499 				info->nsid);
3500 			return ret;
3501 		}
3502 
3503 		dev_err(ctrl->device,
3504 			"clearing duplicate IDs for nsid %d\n", info->nsid);
3505 		dev_err(ctrl->device,
3506 			"use of /dev/disk/by-id/ may cause data corruption\n");
3507 		memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3508 		memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3509 		memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3510 		ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3511 	}
3512 
3513 	mutex_lock(&ctrl->subsys->lock);
3514 	head = nvme_find_ns_head(ctrl, info->nsid);
3515 	if (!head) {
3516 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3517 		if (ret) {
3518 			dev_err(ctrl->device,
3519 				"duplicate IDs in subsystem for nsid %d\n",
3520 				info->nsid);
3521 			goto out_unlock;
3522 		}
3523 		head = nvme_alloc_ns_head(ctrl, info);
3524 		if (IS_ERR(head)) {
3525 			ret = PTR_ERR(head);
3526 			goto out_unlock;
3527 		}
3528 	} else {
3529 		ret = -EINVAL;
3530 		if (!info->is_shared || !head->shared) {
3531 			dev_err(ctrl->device,
3532 				"Duplicate unshared namespace %d\n",
3533 				info->nsid);
3534 			goto out_put_ns_head;
3535 		}
3536 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3537 			dev_err(ctrl->device,
3538 				"IDs don't match for shared namespace %d\n",
3539 					info->nsid);
3540 			goto out_put_ns_head;
3541 		}
3542 
3543 		if (!multipath) {
3544 			dev_warn(ctrl->device,
3545 				"Found shared namespace %d, but multipathing not supported.\n",
3546 				info->nsid);
3547 			dev_warn_once(ctrl->device,
3548 				"Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n");
3549 		}
3550 	}
3551 
3552 	list_add_tail_rcu(&ns->siblings, &head->list);
3553 	ns->head = head;
3554 	mutex_unlock(&ctrl->subsys->lock);
3555 	return 0;
3556 
3557 out_put_ns_head:
3558 	nvme_put_ns_head(head);
3559 out_unlock:
3560 	mutex_unlock(&ctrl->subsys->lock);
3561 	return ret;
3562 }
3563 
nvme_find_get_ns(struct nvme_ctrl * ctrl,unsigned nsid)3564 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3565 {
3566 	struct nvme_ns *ns, *ret = NULL;
3567 	int srcu_idx;
3568 
3569 	srcu_idx = srcu_read_lock(&ctrl->srcu);
3570 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
3571 				 srcu_read_lock_held(&ctrl->srcu)) {
3572 		if (ns->head->ns_id == nsid) {
3573 			if (!nvme_get_ns(ns))
3574 				continue;
3575 			ret = ns;
3576 			break;
3577 		}
3578 		if (ns->head->ns_id > nsid)
3579 			break;
3580 	}
3581 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
3582 	return ret;
3583 }
3584 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3585 
3586 /*
3587  * Add the namespace to the controller list while keeping the list ordered.
3588  */
nvme_ns_add_to_ctrl_list(struct nvme_ns * ns)3589 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3590 {
3591 	struct nvme_ns *tmp;
3592 
3593 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3594 		if (tmp->head->ns_id < ns->head->ns_id) {
3595 			list_add_rcu(&ns->list, &tmp->list);
3596 			return;
3597 		}
3598 	}
3599 	list_add(&ns->list, &ns->ctrl->namespaces);
3600 }
3601 
nvme_alloc_ns(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3602 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3603 {
3604 	struct nvme_ns *ns;
3605 	struct gendisk *disk;
3606 	int node = ctrl->numa_node;
3607 
3608 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3609 	if (!ns)
3610 		return;
3611 
3612 	disk = blk_mq_alloc_disk(ctrl->tagset, ns);
3613 	if (IS_ERR(disk))
3614 		goto out_free_ns;
3615 	disk->fops = &nvme_bdev_ops;
3616 	disk->private_data = ns;
3617 
3618 	ns->disk = disk;
3619 	ns->queue = disk->queue;
3620 
3621 	if (ctrl->opts && ctrl->opts->data_digest)
3622 		blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3623 
3624 	blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3625 	if (ctrl->ops->supports_pci_p2pdma &&
3626 	    ctrl->ops->supports_pci_p2pdma(ctrl))
3627 		blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3628 
3629 	ns->ctrl = ctrl;
3630 	kref_init(&ns->kref);
3631 
3632 	if (nvme_init_ns_head(ns, info))
3633 		goto out_cleanup_disk;
3634 
3635 	/*
3636 	 * If multipathing is enabled, the device name for all disks and not
3637 	 * just those that represent shared namespaces needs to be based on the
3638 	 * subsystem instance.  Using the controller instance for private
3639 	 * namespaces could lead to naming collisions between shared and private
3640 	 * namespaces if they don't use a common numbering scheme.
3641 	 *
3642 	 * If multipathing is not enabled, disk names must use the controller
3643 	 * instance as shared namespaces will show up as multiple block
3644 	 * devices.
3645 	 */
3646 	if (nvme_ns_head_multipath(ns->head)) {
3647 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3648 			ctrl->instance, ns->head->instance);
3649 		disk->flags |= GENHD_FL_HIDDEN;
3650 	} else if (multipath) {
3651 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3652 			ns->head->instance);
3653 	} else {
3654 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3655 			ns->head->instance);
3656 	}
3657 
3658 	if (nvme_update_ns_info(ns, info))
3659 		goto out_unlink_ns;
3660 
3661 	mutex_lock(&ctrl->namespaces_lock);
3662 	/*
3663 	 * Ensure that no namespaces are added to the ctrl list after the queues
3664 	 * are frozen, thereby avoiding a deadlock between scan and reset.
3665 	 */
3666 	if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3667 		mutex_unlock(&ctrl->namespaces_lock);
3668 		goto out_unlink_ns;
3669 	}
3670 	nvme_ns_add_to_ctrl_list(ns);
3671 	mutex_unlock(&ctrl->namespaces_lock);
3672 	synchronize_srcu(&ctrl->srcu);
3673 	nvme_get_ctrl(ctrl);
3674 
3675 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups))
3676 		goto out_cleanup_ns_from_list;
3677 
3678 	if (!nvme_ns_head_multipath(ns->head))
3679 		nvme_add_ns_cdev(ns);
3680 
3681 	nvme_mpath_add_disk(ns, info->anagrpid);
3682 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3683 
3684 	return;
3685 
3686  out_cleanup_ns_from_list:
3687 	nvme_put_ctrl(ctrl);
3688 	mutex_lock(&ctrl->namespaces_lock);
3689 	list_del_rcu(&ns->list);
3690 	mutex_unlock(&ctrl->namespaces_lock);
3691 	synchronize_srcu(&ctrl->srcu);
3692  out_unlink_ns:
3693 	mutex_lock(&ctrl->subsys->lock);
3694 	list_del_rcu(&ns->siblings);
3695 	if (list_empty(&ns->head->list))
3696 		list_del_init(&ns->head->entry);
3697 	mutex_unlock(&ctrl->subsys->lock);
3698 	nvme_put_ns_head(ns->head);
3699  out_cleanup_disk:
3700 	put_disk(disk);
3701  out_free_ns:
3702 	kfree(ns);
3703 }
3704 
nvme_ns_remove(struct nvme_ns * ns)3705 static void nvme_ns_remove(struct nvme_ns *ns)
3706 {
3707 	bool last_path = false;
3708 
3709 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3710 		return;
3711 
3712 	clear_bit(NVME_NS_READY, &ns->flags);
3713 	set_capacity(ns->disk, 0);
3714 	nvme_fault_inject_fini(&ns->fault_inject);
3715 
3716 	/*
3717 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3718 	 * this ns going back into current_path.
3719 	 */
3720 	synchronize_srcu(&ns->head->srcu);
3721 
3722 	/* wait for concurrent submissions */
3723 	if (nvme_mpath_clear_current_path(ns))
3724 		synchronize_srcu(&ns->head->srcu);
3725 
3726 	mutex_lock(&ns->ctrl->subsys->lock);
3727 	list_del_rcu(&ns->siblings);
3728 	if (list_empty(&ns->head->list)) {
3729 		list_del_init(&ns->head->entry);
3730 		last_path = true;
3731 	}
3732 	mutex_unlock(&ns->ctrl->subsys->lock);
3733 
3734 	/* guarantee not available in head->list */
3735 	synchronize_srcu(&ns->head->srcu);
3736 
3737 	if (!nvme_ns_head_multipath(ns->head))
3738 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3739 	del_gendisk(ns->disk);
3740 
3741 	mutex_lock(&ns->ctrl->namespaces_lock);
3742 	list_del_rcu(&ns->list);
3743 	mutex_unlock(&ns->ctrl->namespaces_lock);
3744 	synchronize_srcu(&ns->ctrl->srcu);
3745 
3746 	if (last_path)
3747 		nvme_mpath_shutdown_disk(ns->head);
3748 	nvme_put_ns(ns);
3749 }
3750 
nvme_ns_remove_by_nsid(struct nvme_ctrl * ctrl,u32 nsid)3751 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3752 {
3753 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3754 
3755 	if (ns) {
3756 		nvme_ns_remove(ns);
3757 		nvme_put_ns(ns);
3758 	}
3759 }
3760 
nvme_validate_ns(struct nvme_ns * ns,struct nvme_ns_info * info)3761 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3762 {
3763 	int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3764 
3765 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3766 		dev_err(ns->ctrl->device,
3767 			"identifiers changed for nsid %d\n", ns->head->ns_id);
3768 		goto out;
3769 	}
3770 
3771 	ret = nvme_update_ns_info(ns, info);
3772 out:
3773 	/*
3774 	 * Only remove the namespace if we got a fatal error back from the
3775 	 * device, otherwise ignore the error and just move on.
3776 	 *
3777 	 * TODO: we should probably schedule a delayed retry here.
3778 	 */
3779 	if (ret > 0 && (ret & NVME_SC_DNR))
3780 		nvme_ns_remove(ns);
3781 }
3782 
nvme_scan_ns(struct nvme_ctrl * ctrl,unsigned nsid)3783 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3784 {
3785 	struct nvme_ns_info info = { .nsid = nsid };
3786 	struct nvme_ns *ns;
3787 	int ret;
3788 
3789 	if (nvme_identify_ns_descs(ctrl, &info))
3790 		return;
3791 
3792 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3793 		dev_warn(ctrl->device,
3794 			"command set not reported for nsid: %d\n", nsid);
3795 		return;
3796 	}
3797 
3798 	/*
3799 	 * If available try to use the Command Set Idependent Identify Namespace
3800 	 * data structure to find all the generic information that is needed to
3801 	 * set up a namespace.  If not fall back to the legacy version.
3802 	 */
3803 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3804 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3805 		ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3806 	else
3807 		ret = nvme_ns_info_from_identify(ctrl, &info);
3808 
3809 	if (info.is_removed)
3810 		nvme_ns_remove_by_nsid(ctrl, nsid);
3811 
3812 	/*
3813 	 * Ignore the namespace if it is not ready. We will get an AEN once it
3814 	 * becomes ready and restart the scan.
3815 	 */
3816 	if (ret || !info.is_ready)
3817 		return;
3818 
3819 	ns = nvme_find_get_ns(ctrl, nsid);
3820 	if (ns) {
3821 		nvme_validate_ns(ns, &info);
3822 		nvme_put_ns(ns);
3823 	} else {
3824 		nvme_alloc_ns(ctrl, &info);
3825 	}
3826 }
3827 
nvme_remove_invalid_namespaces(struct nvme_ctrl * ctrl,unsigned nsid)3828 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3829 					unsigned nsid)
3830 {
3831 	struct nvme_ns *ns, *next;
3832 	LIST_HEAD(rm_list);
3833 
3834 	mutex_lock(&ctrl->namespaces_lock);
3835 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3836 		if (ns->head->ns_id > nsid) {
3837 			list_del_rcu(&ns->list);
3838 			synchronize_srcu(&ctrl->srcu);
3839 			list_add_tail_rcu(&ns->list, &rm_list);
3840 		}
3841 	}
3842 	mutex_unlock(&ctrl->namespaces_lock);
3843 
3844 	list_for_each_entry_safe(ns, next, &rm_list, list)
3845 		nvme_ns_remove(ns);
3846 }
3847 
nvme_scan_ns_list(struct nvme_ctrl * ctrl)3848 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3849 {
3850 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3851 	__le32 *ns_list;
3852 	u32 prev = 0;
3853 	int ret = 0, i;
3854 
3855 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3856 	if (!ns_list)
3857 		return -ENOMEM;
3858 
3859 	for (;;) {
3860 		struct nvme_command cmd = {
3861 			.identify.opcode	= nvme_admin_identify,
3862 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
3863 			.identify.nsid		= cpu_to_le32(prev),
3864 		};
3865 
3866 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3867 					    NVME_IDENTIFY_DATA_SIZE);
3868 		if (ret) {
3869 			dev_warn(ctrl->device,
3870 				"Identify NS List failed (status=0x%x)\n", ret);
3871 			goto free;
3872 		}
3873 
3874 		for (i = 0; i < nr_entries; i++) {
3875 			u32 nsid = le32_to_cpu(ns_list[i]);
3876 
3877 			if (!nsid)	/* end of the list? */
3878 				goto out;
3879 			nvme_scan_ns(ctrl, nsid);
3880 			while (++prev < nsid)
3881 				nvme_ns_remove_by_nsid(ctrl, prev);
3882 		}
3883 	}
3884  out:
3885 	nvme_remove_invalid_namespaces(ctrl, prev);
3886  free:
3887 	kfree(ns_list);
3888 	return ret;
3889 }
3890 
nvme_scan_ns_sequential(struct nvme_ctrl * ctrl)3891 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
3892 {
3893 	struct nvme_id_ctrl *id;
3894 	u32 nn, i;
3895 
3896 	if (nvme_identify_ctrl(ctrl, &id))
3897 		return;
3898 	nn = le32_to_cpu(id->nn);
3899 	kfree(id);
3900 
3901 	for (i = 1; i <= nn; i++)
3902 		nvme_scan_ns(ctrl, i);
3903 
3904 	nvme_remove_invalid_namespaces(ctrl, nn);
3905 }
3906 
nvme_clear_changed_ns_log(struct nvme_ctrl * ctrl)3907 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
3908 {
3909 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
3910 	__le32 *log;
3911 	int error;
3912 
3913 	log = kzalloc(log_size, GFP_KERNEL);
3914 	if (!log)
3915 		return;
3916 
3917 	/*
3918 	 * We need to read the log to clear the AEN, but we don't want to rely
3919 	 * on it for the changed namespace information as userspace could have
3920 	 * raced with us in reading the log page, which could cause us to miss
3921 	 * updates.
3922 	 */
3923 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
3924 			NVME_CSI_NVM, log, log_size, 0);
3925 	if (error)
3926 		dev_warn(ctrl->device,
3927 			"reading changed ns log failed: %d\n", error);
3928 
3929 	kfree(log);
3930 }
3931 
nvme_scan_work(struct work_struct * work)3932 static void nvme_scan_work(struct work_struct *work)
3933 {
3934 	struct nvme_ctrl *ctrl =
3935 		container_of(work, struct nvme_ctrl, scan_work);
3936 	int ret;
3937 
3938 	/* No tagset on a live ctrl means IO queues could not created */
3939 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
3940 		return;
3941 
3942 	/*
3943 	 * Identify controller limits can change at controller reset due to
3944 	 * new firmware download, even though it is not common we cannot ignore
3945 	 * such scenario. Controller's non-mdts limits are reported in the unit
3946 	 * of logical blocks that is dependent on the format of attached
3947 	 * namespace. Hence re-read the limits at the time of ns allocation.
3948 	 */
3949 	ret = nvme_init_non_mdts_limits(ctrl);
3950 	if (ret < 0) {
3951 		dev_warn(ctrl->device,
3952 			"reading non-mdts-limits failed: %d\n", ret);
3953 		return;
3954 	}
3955 
3956 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
3957 		dev_info(ctrl->device, "rescanning namespaces.\n");
3958 		nvme_clear_changed_ns_log(ctrl);
3959 	}
3960 
3961 	mutex_lock(&ctrl->scan_lock);
3962 	if (nvme_ctrl_limited_cns(ctrl)) {
3963 		nvme_scan_ns_sequential(ctrl);
3964 	} else {
3965 		/*
3966 		 * Fall back to sequential scan if DNR is set to handle broken
3967 		 * devices which should support Identify NS List (as per the VS
3968 		 * they report) but don't actually support it.
3969 		 */
3970 		ret = nvme_scan_ns_list(ctrl);
3971 		if (ret > 0 && ret & NVME_SC_DNR)
3972 			nvme_scan_ns_sequential(ctrl);
3973 	}
3974 	mutex_unlock(&ctrl->scan_lock);
3975 }
3976 
3977 /*
3978  * This function iterates the namespace list unlocked to allow recovery from
3979  * controller failure. It is up to the caller to ensure the namespace list is
3980  * not modified by scan work while this function is executing.
3981  */
nvme_remove_namespaces(struct nvme_ctrl * ctrl)3982 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
3983 {
3984 	struct nvme_ns *ns, *next;
3985 	LIST_HEAD(ns_list);
3986 
3987 	/*
3988 	 * make sure to requeue I/O to all namespaces as these
3989 	 * might result from the scan itself and must complete
3990 	 * for the scan_work to make progress
3991 	 */
3992 	nvme_mpath_clear_ctrl_paths(ctrl);
3993 
3994 	/*
3995 	 * Unquiesce io queues so any pending IO won't hang, especially
3996 	 * those submitted from scan work
3997 	 */
3998 	nvme_unquiesce_io_queues(ctrl);
3999 
4000 	/* prevent racing with ns scanning */
4001 	flush_work(&ctrl->scan_work);
4002 
4003 	/*
4004 	 * The dead states indicates the controller was not gracefully
4005 	 * disconnected. In that case, we won't be able to flush any data while
4006 	 * removing the namespaces' disks; fail all the queues now to avoid
4007 	 * potentially having to clean up the failed sync later.
4008 	 */
4009 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4010 		nvme_mark_namespaces_dead(ctrl);
4011 
4012 	/* this is a no-op when called from the controller reset handler */
4013 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4014 
4015 	mutex_lock(&ctrl->namespaces_lock);
4016 	list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4017 	mutex_unlock(&ctrl->namespaces_lock);
4018 	synchronize_srcu(&ctrl->srcu);
4019 
4020 	list_for_each_entry_safe(ns, next, &ns_list, list)
4021 		nvme_ns_remove(ns);
4022 }
4023 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4024 
nvme_class_uevent(const struct device * dev,struct kobj_uevent_env * env)4025 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4026 {
4027 	const struct nvme_ctrl *ctrl =
4028 		container_of(dev, struct nvme_ctrl, ctrl_device);
4029 	struct nvmf_ctrl_options *opts = ctrl->opts;
4030 	int ret;
4031 
4032 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4033 	if (ret)
4034 		return ret;
4035 
4036 	if (opts) {
4037 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4038 		if (ret)
4039 			return ret;
4040 
4041 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4042 				opts->trsvcid ?: "none");
4043 		if (ret)
4044 			return ret;
4045 
4046 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4047 				opts->host_traddr ?: "none");
4048 		if (ret)
4049 			return ret;
4050 
4051 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4052 				opts->host_iface ?: "none");
4053 	}
4054 	return ret;
4055 }
4056 
nvme_change_uevent(struct nvme_ctrl * ctrl,char * envdata)4057 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4058 {
4059 	char *envp[2] = { envdata, NULL };
4060 
4061 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4062 }
4063 
nvme_aen_uevent(struct nvme_ctrl * ctrl)4064 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4065 {
4066 	char *envp[2] = { NULL, NULL };
4067 	u32 aen_result = ctrl->aen_result;
4068 
4069 	ctrl->aen_result = 0;
4070 	if (!aen_result)
4071 		return;
4072 
4073 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4074 	if (!envp[0])
4075 		return;
4076 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4077 	kfree(envp[0]);
4078 }
4079 
nvme_async_event_work(struct work_struct * work)4080 static void nvme_async_event_work(struct work_struct *work)
4081 {
4082 	struct nvme_ctrl *ctrl =
4083 		container_of(work, struct nvme_ctrl, async_event_work);
4084 
4085 	nvme_aen_uevent(ctrl);
4086 
4087 	/*
4088 	 * The transport drivers must guarantee AER submission here is safe by
4089 	 * flushing ctrl async_event_work after changing the controller state
4090 	 * from LIVE and before freeing the admin queue.
4091 	*/
4092 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4093 		ctrl->ops->submit_async_event(ctrl);
4094 }
4095 
nvme_ctrl_pp_status(struct nvme_ctrl * ctrl)4096 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4097 {
4098 
4099 	u32 csts;
4100 
4101 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4102 		return false;
4103 
4104 	if (csts == ~0)
4105 		return false;
4106 
4107 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4108 }
4109 
nvme_get_fw_slot_info(struct nvme_ctrl * ctrl)4110 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4111 {
4112 	struct nvme_fw_slot_info_log *log;
4113 
4114 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4115 	if (!log)
4116 		return;
4117 
4118 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4119 			log, sizeof(*log), 0))
4120 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4121 	kfree(log);
4122 }
4123 
nvme_fw_act_work(struct work_struct * work)4124 static void nvme_fw_act_work(struct work_struct *work)
4125 {
4126 	struct nvme_ctrl *ctrl = container_of(work,
4127 				struct nvme_ctrl, fw_act_work);
4128 	unsigned long fw_act_timeout;
4129 
4130 	nvme_auth_stop(ctrl);
4131 
4132 	if (ctrl->mtfa)
4133 		fw_act_timeout = jiffies +
4134 				msecs_to_jiffies(ctrl->mtfa * 100);
4135 	else
4136 		fw_act_timeout = jiffies +
4137 				msecs_to_jiffies(admin_timeout * 1000);
4138 
4139 	nvme_quiesce_io_queues(ctrl);
4140 	while (nvme_ctrl_pp_status(ctrl)) {
4141 		if (time_after(jiffies, fw_act_timeout)) {
4142 			dev_warn(ctrl->device,
4143 				"Fw activation timeout, reset controller\n");
4144 			nvme_try_sched_reset(ctrl);
4145 			return;
4146 		}
4147 		msleep(100);
4148 	}
4149 
4150 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4151 		return;
4152 
4153 	nvme_unquiesce_io_queues(ctrl);
4154 	/* read FW slot information to clear the AER */
4155 	nvme_get_fw_slot_info(ctrl);
4156 
4157 	queue_work(nvme_wq, &ctrl->async_event_work);
4158 }
4159 
nvme_aer_type(u32 result)4160 static u32 nvme_aer_type(u32 result)
4161 {
4162 	return result & 0x7;
4163 }
4164 
nvme_aer_subtype(u32 result)4165 static u32 nvme_aer_subtype(u32 result)
4166 {
4167 	return (result & 0xff00) >> 8;
4168 }
4169 
nvme_handle_aen_notice(struct nvme_ctrl * ctrl,u32 result)4170 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4171 {
4172 	u32 aer_notice_type = nvme_aer_subtype(result);
4173 	bool requeue = true;
4174 
4175 	switch (aer_notice_type) {
4176 	case NVME_AER_NOTICE_NS_CHANGED:
4177 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4178 		nvme_queue_scan(ctrl);
4179 		break;
4180 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4181 		/*
4182 		 * We are (ab)using the RESETTING state to prevent subsequent
4183 		 * recovery actions from interfering with the controller's
4184 		 * firmware activation.
4185 		 */
4186 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4187 			requeue = false;
4188 			queue_work(nvme_wq, &ctrl->fw_act_work);
4189 		}
4190 		break;
4191 #ifdef CONFIG_NVME_MULTIPATH
4192 	case NVME_AER_NOTICE_ANA:
4193 		if (!ctrl->ana_log_buf)
4194 			break;
4195 		queue_work(nvme_wq, &ctrl->ana_work);
4196 		break;
4197 #endif
4198 	case NVME_AER_NOTICE_DISC_CHANGED:
4199 		ctrl->aen_result = result;
4200 		break;
4201 	default:
4202 		dev_warn(ctrl->device, "async event result %08x\n", result);
4203 	}
4204 	return requeue;
4205 }
4206 
nvme_handle_aer_persistent_error(struct nvme_ctrl * ctrl)4207 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4208 {
4209 	dev_warn(ctrl->device, "resetting controller due to AER\n");
4210 	nvme_reset_ctrl(ctrl);
4211 }
4212 
nvme_complete_async_event(struct nvme_ctrl * ctrl,__le16 status,volatile union nvme_result * res)4213 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4214 		volatile union nvme_result *res)
4215 {
4216 	u32 result = le32_to_cpu(res->u32);
4217 	u32 aer_type = nvme_aer_type(result);
4218 	u32 aer_subtype = nvme_aer_subtype(result);
4219 	bool requeue = true;
4220 
4221 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4222 		return;
4223 
4224 	trace_nvme_async_event(ctrl, result);
4225 	switch (aer_type) {
4226 	case NVME_AER_NOTICE:
4227 		requeue = nvme_handle_aen_notice(ctrl, result);
4228 		break;
4229 	case NVME_AER_ERROR:
4230 		/*
4231 		 * For a persistent internal error, don't run async_event_work
4232 		 * to submit a new AER. The controller reset will do it.
4233 		 */
4234 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4235 			nvme_handle_aer_persistent_error(ctrl);
4236 			return;
4237 		}
4238 		fallthrough;
4239 	case NVME_AER_SMART:
4240 	case NVME_AER_CSS:
4241 	case NVME_AER_VS:
4242 		ctrl->aen_result = result;
4243 		break;
4244 	default:
4245 		break;
4246 	}
4247 
4248 	if (requeue)
4249 		queue_work(nvme_wq, &ctrl->async_event_work);
4250 }
4251 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4252 
nvme_alloc_admin_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int cmd_size)4253 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4254 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4255 {
4256 	int ret;
4257 
4258 	memset(set, 0, sizeof(*set));
4259 	set->ops = ops;
4260 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4261 	if (ctrl->ops->flags & NVME_F_FABRICS)
4262 		/* Reserved for fabric connect and keep alive */
4263 		set->reserved_tags = 2;
4264 	set->numa_node = ctrl->numa_node;
4265 	set->flags = BLK_MQ_F_NO_SCHED;
4266 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4267 		set->flags |= BLK_MQ_F_BLOCKING;
4268 	set->cmd_size = cmd_size;
4269 	set->driver_data = ctrl;
4270 	set->nr_hw_queues = 1;
4271 	set->timeout = NVME_ADMIN_TIMEOUT;
4272 	ret = blk_mq_alloc_tag_set(set);
4273 	if (ret)
4274 		return ret;
4275 
4276 	ctrl->admin_q = blk_mq_init_queue(set);
4277 	if (IS_ERR(ctrl->admin_q)) {
4278 		ret = PTR_ERR(ctrl->admin_q);
4279 		goto out_free_tagset;
4280 	}
4281 
4282 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4283 		ctrl->fabrics_q = blk_mq_init_queue(set);
4284 		if (IS_ERR(ctrl->fabrics_q)) {
4285 			ret = PTR_ERR(ctrl->fabrics_q);
4286 			goto out_cleanup_admin_q;
4287 		}
4288 	}
4289 
4290 	ctrl->admin_tagset = set;
4291 	return 0;
4292 
4293 out_cleanup_admin_q:
4294 	blk_mq_destroy_queue(ctrl->admin_q);
4295 	blk_put_queue(ctrl->admin_q);
4296 out_free_tagset:
4297 	blk_mq_free_tag_set(set);
4298 	ctrl->admin_q = NULL;
4299 	ctrl->fabrics_q = NULL;
4300 	return ret;
4301 }
4302 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4303 
nvme_remove_admin_tag_set(struct nvme_ctrl * ctrl)4304 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4305 {
4306 	blk_mq_destroy_queue(ctrl->admin_q);
4307 	blk_put_queue(ctrl->admin_q);
4308 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4309 		blk_mq_destroy_queue(ctrl->fabrics_q);
4310 		blk_put_queue(ctrl->fabrics_q);
4311 	}
4312 	blk_mq_free_tag_set(ctrl->admin_tagset);
4313 }
4314 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4315 
nvme_alloc_io_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int nr_maps,unsigned int cmd_size)4316 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4317 		const struct blk_mq_ops *ops, unsigned int nr_maps,
4318 		unsigned int cmd_size)
4319 {
4320 	int ret;
4321 
4322 	memset(set, 0, sizeof(*set));
4323 	set->ops = ops;
4324 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4325 	/*
4326 	 * Some Apple controllers requires tags to be unique across admin and
4327 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4328 	 */
4329 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4330 		set->reserved_tags = NVME_AQ_DEPTH;
4331 	else if (ctrl->ops->flags & NVME_F_FABRICS)
4332 		/* Reserved for fabric connect */
4333 		set->reserved_tags = 1;
4334 	set->numa_node = ctrl->numa_node;
4335 	set->flags = BLK_MQ_F_SHOULD_MERGE;
4336 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4337 		set->flags |= BLK_MQ_F_BLOCKING;
4338 	set->cmd_size = cmd_size,
4339 	set->driver_data = ctrl;
4340 	set->nr_hw_queues = ctrl->queue_count - 1;
4341 	set->timeout = NVME_IO_TIMEOUT;
4342 	set->nr_maps = nr_maps;
4343 	ret = blk_mq_alloc_tag_set(set);
4344 	if (ret)
4345 		return ret;
4346 
4347 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4348 		ctrl->connect_q = blk_mq_init_queue(set);
4349         	if (IS_ERR(ctrl->connect_q)) {
4350 			ret = PTR_ERR(ctrl->connect_q);
4351 			goto out_free_tag_set;
4352 		}
4353 		blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4354 				   ctrl->connect_q);
4355 	}
4356 
4357 	ctrl->tagset = set;
4358 	return 0;
4359 
4360 out_free_tag_set:
4361 	blk_mq_free_tag_set(set);
4362 	ctrl->connect_q = NULL;
4363 	return ret;
4364 }
4365 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4366 
nvme_remove_io_tag_set(struct nvme_ctrl * ctrl)4367 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4368 {
4369 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4370 		blk_mq_destroy_queue(ctrl->connect_q);
4371 		blk_put_queue(ctrl->connect_q);
4372 	}
4373 	blk_mq_free_tag_set(ctrl->tagset);
4374 }
4375 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4376 
nvme_stop_ctrl(struct nvme_ctrl * ctrl)4377 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4378 {
4379 	nvme_mpath_stop(ctrl);
4380 	nvme_auth_stop(ctrl);
4381 	nvme_stop_keep_alive(ctrl);
4382 	nvme_stop_failfast_work(ctrl);
4383 	flush_work(&ctrl->async_event_work);
4384 	cancel_work_sync(&ctrl->fw_act_work);
4385 	if (ctrl->ops->stop_ctrl)
4386 		ctrl->ops->stop_ctrl(ctrl);
4387 }
4388 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4389 
nvme_start_ctrl(struct nvme_ctrl * ctrl)4390 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4391 {
4392 	nvme_start_keep_alive(ctrl);
4393 
4394 	nvme_enable_aen(ctrl);
4395 
4396 	/*
4397 	 * persistent discovery controllers need to send indication to userspace
4398 	 * to re-read the discovery log page to learn about possible changes
4399 	 * that were missed. We identify persistent discovery controllers by
4400 	 * checking that they started once before, hence are reconnecting back.
4401 	 */
4402 	if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4403 	    nvme_discovery_ctrl(ctrl))
4404 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4405 
4406 	if (ctrl->queue_count > 1) {
4407 		nvme_queue_scan(ctrl);
4408 		nvme_unquiesce_io_queues(ctrl);
4409 		nvme_mpath_update(ctrl);
4410 	}
4411 
4412 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4413 	set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4414 }
4415 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4416 
nvme_uninit_ctrl(struct nvme_ctrl * ctrl)4417 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4418 {
4419 	nvme_hwmon_exit(ctrl);
4420 	nvme_fault_inject_fini(&ctrl->fault_inject);
4421 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4422 	cdev_device_del(&ctrl->cdev, ctrl->device);
4423 	nvme_put_ctrl(ctrl);
4424 }
4425 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4426 
nvme_free_cels(struct nvme_ctrl * ctrl)4427 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4428 {
4429 	struct nvme_effects_log	*cel;
4430 	unsigned long i;
4431 
4432 	xa_for_each(&ctrl->cels, i, cel) {
4433 		xa_erase(&ctrl->cels, i);
4434 		kfree(cel);
4435 	}
4436 
4437 	xa_destroy(&ctrl->cels);
4438 }
4439 
nvme_free_ctrl(struct device * dev)4440 static void nvme_free_ctrl(struct device *dev)
4441 {
4442 	struct nvme_ctrl *ctrl =
4443 		container_of(dev, struct nvme_ctrl, ctrl_device);
4444 	struct nvme_subsystem *subsys = ctrl->subsys;
4445 
4446 	if (!subsys || ctrl->instance != subsys->instance)
4447 		ida_free(&nvme_instance_ida, ctrl->instance);
4448 
4449 	nvme_free_cels(ctrl);
4450 	nvme_mpath_uninit(ctrl);
4451 	cleanup_srcu_struct(&ctrl->srcu);
4452 	nvme_auth_stop(ctrl);
4453 	nvme_auth_free(ctrl);
4454 	__free_page(ctrl->discard_page);
4455 	free_opal_dev(ctrl->opal_dev);
4456 
4457 	if (subsys) {
4458 		mutex_lock(&nvme_subsystems_lock);
4459 		list_del(&ctrl->subsys_entry);
4460 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4461 		mutex_unlock(&nvme_subsystems_lock);
4462 	}
4463 
4464 	ctrl->ops->free_ctrl(ctrl);
4465 
4466 	if (subsys)
4467 		nvme_put_subsystem(subsys);
4468 }
4469 
4470 /*
4471  * Initialize a NVMe controller structures.  This needs to be called during
4472  * earliest initialization so that we have the initialized structured around
4473  * during probing.
4474  */
nvme_init_ctrl(struct nvme_ctrl * ctrl,struct device * dev,const struct nvme_ctrl_ops * ops,unsigned long quirks)4475 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4476 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
4477 {
4478 	int ret;
4479 
4480 	WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4481 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4482 	spin_lock_init(&ctrl->lock);
4483 	mutex_init(&ctrl->namespaces_lock);
4484 
4485 	ret = init_srcu_struct(&ctrl->srcu);
4486 	if (ret)
4487 		return ret;
4488 
4489 	mutex_init(&ctrl->scan_lock);
4490 	INIT_LIST_HEAD(&ctrl->namespaces);
4491 	xa_init(&ctrl->cels);
4492 	ctrl->dev = dev;
4493 	ctrl->ops = ops;
4494 	ctrl->quirks = quirks;
4495 	ctrl->numa_node = NUMA_NO_NODE;
4496 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4497 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4498 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4499 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4500 	init_waitqueue_head(&ctrl->state_wq);
4501 
4502 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4503 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4504 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4505 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4506 
4507 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4508 			PAGE_SIZE);
4509 	ctrl->discard_page = alloc_page(GFP_KERNEL);
4510 	if (!ctrl->discard_page) {
4511 		ret = -ENOMEM;
4512 		goto out;
4513 	}
4514 
4515 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4516 	if (ret < 0)
4517 		goto out;
4518 	ctrl->instance = ret;
4519 
4520 	device_initialize(&ctrl->ctrl_device);
4521 	ctrl->device = &ctrl->ctrl_device;
4522 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4523 			ctrl->instance);
4524 	ctrl->device->class = nvme_class;
4525 	ctrl->device->parent = ctrl->dev;
4526 	if (ops->dev_attr_groups)
4527 		ctrl->device->groups = ops->dev_attr_groups;
4528 	else
4529 		ctrl->device->groups = nvme_dev_attr_groups;
4530 	ctrl->device->release = nvme_free_ctrl;
4531 	dev_set_drvdata(ctrl->device, ctrl);
4532 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4533 	if (ret)
4534 		goto out_release_instance;
4535 
4536 	nvme_get_ctrl(ctrl);
4537 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
4538 	ctrl->cdev.owner = ops->module;
4539 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4540 	if (ret)
4541 		goto out_free_name;
4542 
4543 	/*
4544 	 * Initialize latency tolerance controls.  The sysfs files won't
4545 	 * be visible to userspace unless the device actually supports APST.
4546 	 */
4547 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4548 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4549 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4550 
4551 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4552 	nvme_mpath_init_ctrl(ctrl);
4553 	ret = nvme_auth_init_ctrl(ctrl);
4554 	if (ret)
4555 		goto out_free_cdev;
4556 
4557 	return 0;
4558 out_free_cdev:
4559 	nvme_fault_inject_fini(&ctrl->fault_inject);
4560 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4561 	cdev_device_del(&ctrl->cdev, ctrl->device);
4562 out_free_name:
4563 	nvme_put_ctrl(ctrl);
4564 	kfree_const(ctrl->device->kobj.name);
4565 out_release_instance:
4566 	ida_free(&nvme_instance_ida, ctrl->instance);
4567 out:
4568 	if (ctrl->discard_page)
4569 		__free_page(ctrl->discard_page);
4570 	cleanup_srcu_struct(&ctrl->srcu);
4571 	return ret;
4572 }
4573 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4574 
4575 /* let I/O to all namespaces fail in preparation for surprise removal */
nvme_mark_namespaces_dead(struct nvme_ctrl * ctrl)4576 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4577 {
4578 	struct nvme_ns *ns;
4579 	int srcu_idx;
4580 
4581 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4582 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4583 				 srcu_read_lock_held(&ctrl->srcu))
4584 		blk_mark_disk_dead(ns->disk);
4585 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4586 }
4587 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4588 
nvme_unfreeze(struct nvme_ctrl * ctrl)4589 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4590 {
4591 	struct nvme_ns *ns;
4592 	int srcu_idx;
4593 
4594 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4595 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4596 				 srcu_read_lock_held(&ctrl->srcu))
4597 		blk_mq_unfreeze_queue(ns->queue);
4598 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4599 	clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4600 }
4601 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4602 
nvme_wait_freeze_timeout(struct nvme_ctrl * ctrl,long timeout)4603 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4604 {
4605 	struct nvme_ns *ns;
4606 	int srcu_idx;
4607 
4608 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4609 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4610 				 srcu_read_lock_held(&ctrl->srcu)) {
4611 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4612 		if (timeout <= 0)
4613 			break;
4614 	}
4615 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4616 	return timeout;
4617 }
4618 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4619 
nvme_wait_freeze(struct nvme_ctrl * ctrl)4620 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4621 {
4622 	struct nvme_ns *ns;
4623 	int srcu_idx;
4624 
4625 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4626 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4627 				 srcu_read_lock_held(&ctrl->srcu))
4628 		blk_mq_freeze_queue_wait(ns->queue);
4629 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4630 }
4631 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4632 
nvme_start_freeze(struct nvme_ctrl * ctrl)4633 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4634 {
4635 	struct nvme_ns *ns;
4636 	int srcu_idx;
4637 
4638 	set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4639 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4640 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4641 				 srcu_read_lock_held(&ctrl->srcu))
4642 		blk_freeze_queue_start(ns->queue);
4643 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4644 }
4645 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4646 
nvme_quiesce_io_queues(struct nvme_ctrl * ctrl)4647 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4648 {
4649 	if (!ctrl->tagset)
4650 		return;
4651 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4652 		blk_mq_quiesce_tagset(ctrl->tagset);
4653 	else
4654 		blk_mq_wait_quiesce_done(ctrl->tagset);
4655 }
4656 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4657 
nvme_unquiesce_io_queues(struct nvme_ctrl * ctrl)4658 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4659 {
4660 	if (!ctrl->tagset)
4661 		return;
4662 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4663 		blk_mq_unquiesce_tagset(ctrl->tagset);
4664 }
4665 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4666 
nvme_quiesce_admin_queue(struct nvme_ctrl * ctrl)4667 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4668 {
4669 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4670 		blk_mq_quiesce_queue(ctrl->admin_q);
4671 	else
4672 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4673 }
4674 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4675 
nvme_unquiesce_admin_queue(struct nvme_ctrl * ctrl)4676 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4677 {
4678 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4679 		blk_mq_unquiesce_queue(ctrl->admin_q);
4680 }
4681 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4682 
nvme_sync_io_queues(struct nvme_ctrl * ctrl)4683 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4684 {
4685 	struct nvme_ns *ns;
4686 	int srcu_idx;
4687 
4688 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4689 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4690 				 srcu_read_lock_held(&ctrl->srcu))
4691 		blk_sync_queue(ns->queue);
4692 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4693 }
4694 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4695 
nvme_sync_queues(struct nvme_ctrl * ctrl)4696 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4697 {
4698 	nvme_sync_io_queues(ctrl);
4699 	if (ctrl->admin_q)
4700 		blk_sync_queue(ctrl->admin_q);
4701 }
4702 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4703 
nvme_ctrl_from_file(struct file * file)4704 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4705 {
4706 	if (file->f_op != &nvme_dev_fops)
4707 		return NULL;
4708 	return file->private_data;
4709 }
4710 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4711 
4712 /*
4713  * Check we didn't inadvertently grow the command structure sizes:
4714  */
_nvme_check_size(void)4715 static inline void _nvme_check_size(void)
4716 {
4717 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4718 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4719 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4720 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4721 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4722 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4723 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4724 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4725 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4726 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4727 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4728 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4729 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4730 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4731 			NVME_IDENTIFY_DATA_SIZE);
4732 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4733 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4734 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4735 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4736 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4737 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4738 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4739 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4740 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4741 }
4742 
4743 
nvme_core_init(void)4744 static int __init nvme_core_init(void)
4745 {
4746 	int result = -ENOMEM;
4747 
4748 	_nvme_check_size();
4749 
4750 	nvme_wq = alloc_workqueue("nvme-wq",
4751 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4752 	if (!nvme_wq)
4753 		goto out;
4754 
4755 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4756 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4757 	if (!nvme_reset_wq)
4758 		goto destroy_wq;
4759 
4760 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4761 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4762 	if (!nvme_delete_wq)
4763 		goto destroy_reset_wq;
4764 
4765 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4766 			NVME_MINORS, "nvme");
4767 	if (result < 0)
4768 		goto destroy_delete_wq;
4769 
4770 	nvme_class = class_create("nvme");
4771 	if (IS_ERR(nvme_class)) {
4772 		result = PTR_ERR(nvme_class);
4773 		goto unregister_chrdev;
4774 	}
4775 	nvme_class->dev_uevent = nvme_class_uevent;
4776 
4777 	nvme_subsys_class = class_create("nvme-subsystem");
4778 	if (IS_ERR(nvme_subsys_class)) {
4779 		result = PTR_ERR(nvme_subsys_class);
4780 		goto destroy_class;
4781 	}
4782 
4783 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4784 				     "nvme-generic");
4785 	if (result < 0)
4786 		goto destroy_subsys_class;
4787 
4788 	nvme_ns_chr_class = class_create("nvme-generic");
4789 	if (IS_ERR(nvme_ns_chr_class)) {
4790 		result = PTR_ERR(nvme_ns_chr_class);
4791 		goto unregister_generic_ns;
4792 	}
4793 
4794 	result = nvme_init_auth();
4795 	if (result)
4796 		goto destroy_ns_chr;
4797 	return 0;
4798 
4799 destroy_ns_chr:
4800 	class_destroy(nvme_ns_chr_class);
4801 unregister_generic_ns:
4802 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4803 destroy_subsys_class:
4804 	class_destroy(nvme_subsys_class);
4805 destroy_class:
4806 	class_destroy(nvme_class);
4807 unregister_chrdev:
4808 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4809 destroy_delete_wq:
4810 	destroy_workqueue(nvme_delete_wq);
4811 destroy_reset_wq:
4812 	destroy_workqueue(nvme_reset_wq);
4813 destroy_wq:
4814 	destroy_workqueue(nvme_wq);
4815 out:
4816 	return result;
4817 }
4818 
nvme_core_exit(void)4819 static void __exit nvme_core_exit(void)
4820 {
4821 	nvme_exit_auth();
4822 	class_destroy(nvme_ns_chr_class);
4823 	class_destroy(nvme_subsys_class);
4824 	class_destroy(nvme_class);
4825 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4826 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4827 	destroy_workqueue(nvme_delete_wq);
4828 	destroy_workqueue(nvme_reset_wq);
4829 	destroy_workqueue(nvme_wq);
4830 	ida_destroy(&nvme_ns_chr_minor_ida);
4831 	ida_destroy(&nvme_instance_ida);
4832 }
4833 
4834 MODULE_LICENSE("GPL");
4835 MODULE_VERSION("1.0");
4836 module_init(nvme_core_init);
4837 module_exit(nvme_core_exit);
4838