1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 */
5
6 #include "mt76.h"
7
8 static int
mt76_txq_get_qid(struct ieee80211_txq * txq)9 mt76_txq_get_qid(struct ieee80211_txq *txq)
10 {
11 if (!txq->sta)
12 return MT_TXQ_BE;
13
14 return txq->ac;
15 }
16
17 void
mt76_tx_check_agg_ssn(struct ieee80211_sta * sta,struct sk_buff * skb)18 mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb)
19 {
20 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
21 struct ieee80211_txq *txq;
22 struct mt76_txq *mtxq;
23 u8 tid;
24
25 if (!sta || !ieee80211_is_data_qos(hdr->frame_control) ||
26 !ieee80211_is_data_present(hdr->frame_control))
27 return;
28
29 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
30 txq = sta->txq[tid];
31 mtxq = (struct mt76_txq *)txq->drv_priv;
32 if (!mtxq->aggr)
33 return;
34
35 mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
36 }
37 EXPORT_SYMBOL_GPL(mt76_tx_check_agg_ssn);
38
39 void
mt76_tx_status_lock(struct mt76_dev * dev,struct sk_buff_head * list)40 mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
41 __acquires(&dev->status_lock)
42 {
43 __skb_queue_head_init(list);
44 spin_lock_bh(&dev->status_lock);
45 }
46 EXPORT_SYMBOL_GPL(mt76_tx_status_lock);
47
48 void
mt76_tx_status_unlock(struct mt76_dev * dev,struct sk_buff_head * list)49 mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
50 __releases(&dev->status_lock)
51 {
52 struct ieee80211_hw *hw;
53 struct sk_buff *skb;
54
55 spin_unlock_bh(&dev->status_lock);
56
57 rcu_read_lock();
58 while ((skb = __skb_dequeue(list)) != NULL) {
59 struct ieee80211_tx_status status = {
60 .skb = skb,
61 .info = IEEE80211_SKB_CB(skb),
62 };
63 struct ieee80211_rate_status rs = {};
64 struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
65 struct mt76_wcid *wcid;
66
67 wcid = rcu_dereference(dev->wcid[cb->wcid]);
68 if (wcid) {
69 status.sta = wcid_to_sta(wcid);
70 if (status.sta && (wcid->rate.flags || wcid->rate.legacy)) {
71 rs.rate_idx = wcid->rate;
72 status.rates = &rs;
73 status.n_rates = 1;
74 } else {
75 status.n_rates = 0;
76 }
77 }
78
79 hw = mt76_tx_status_get_hw(dev, skb);
80 spin_lock_bh(&dev->rx_lock);
81 ieee80211_tx_status_ext(hw, &status);
82 spin_unlock_bh(&dev->rx_lock);
83 }
84 rcu_read_unlock();
85 }
86 EXPORT_SYMBOL_GPL(mt76_tx_status_unlock);
87
88 static void
__mt76_tx_status_skb_done(struct mt76_dev * dev,struct sk_buff * skb,u8 flags,struct sk_buff_head * list)89 __mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, u8 flags,
90 struct sk_buff_head *list)
91 {
92 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
93 struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
94 u8 done = MT_TX_CB_DMA_DONE | MT_TX_CB_TXS_DONE;
95
96 flags |= cb->flags;
97 cb->flags = flags;
98
99 if ((flags & done) != done)
100 return;
101
102 /* Tx status can be unreliable. if it fails, mark the frame as ACKed */
103 if (flags & MT_TX_CB_TXS_FAILED &&
104 (dev->drv->drv_flags & MT_DRV_IGNORE_TXS_FAILED)) {
105 info->status.rates[0].count = 0;
106 info->status.rates[0].idx = -1;
107 info->flags |= IEEE80211_TX_STAT_ACK;
108 }
109
110 __skb_queue_tail(list, skb);
111 }
112
113 void
mt76_tx_status_skb_done(struct mt76_dev * dev,struct sk_buff * skb,struct sk_buff_head * list)114 mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
115 struct sk_buff_head *list)
116 {
117 __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_DONE, list);
118 }
119 EXPORT_SYMBOL_GPL(mt76_tx_status_skb_done);
120
121 int
mt76_tx_status_skb_add(struct mt76_dev * dev,struct mt76_wcid * wcid,struct sk_buff * skb)122 mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
123 struct sk_buff *skb)
124 {
125 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
126 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
127 struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
128 int pid;
129
130 memset(cb, 0, sizeof(*cb));
131
132 if (!wcid || !rcu_access_pointer(dev->wcid[wcid->idx]))
133 return MT_PACKET_ID_NO_ACK;
134
135 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
136 return MT_PACKET_ID_NO_ACK;
137
138 if (!(info->flags & (IEEE80211_TX_CTL_REQ_TX_STATUS |
139 IEEE80211_TX_CTL_RATE_CTRL_PROBE))) {
140 if (mtk_wed_device_active(&dev->mmio.wed) &&
141 ((info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) ||
142 ieee80211_is_data(hdr->frame_control)))
143 return MT_PACKET_ID_WED;
144
145 return MT_PACKET_ID_NO_SKB;
146 }
147
148 spin_lock_bh(&dev->status_lock);
149
150 pid = idr_alloc(&wcid->pktid, skb, MT_PACKET_ID_FIRST,
151 MT_PACKET_ID_MASK, GFP_ATOMIC);
152 if (pid < 0) {
153 pid = MT_PACKET_ID_NO_SKB;
154 goto out;
155 }
156
157 cb->wcid = wcid->idx;
158 cb->pktid = pid;
159
160 if (list_empty(&wcid->list))
161 list_add_tail(&wcid->list, &dev->wcid_list);
162
163 out:
164 spin_unlock_bh(&dev->status_lock);
165
166 return pid;
167 }
168 EXPORT_SYMBOL_GPL(mt76_tx_status_skb_add);
169
170 struct sk_buff *
mt76_tx_status_skb_get(struct mt76_dev * dev,struct mt76_wcid * wcid,int pktid,struct sk_buff_head * list)171 mt76_tx_status_skb_get(struct mt76_dev *dev, struct mt76_wcid *wcid, int pktid,
172 struct sk_buff_head *list)
173 {
174 struct sk_buff *skb;
175 int id;
176
177 lockdep_assert_held(&dev->status_lock);
178
179 skb = idr_remove(&wcid->pktid, pktid);
180 if (skb)
181 goto out;
182
183 /* look for stale entries in the wcid idr queue */
184 idr_for_each_entry(&wcid->pktid, skb, id) {
185 struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
186
187 if (pktid >= 0) {
188 if (!(cb->flags & MT_TX_CB_DMA_DONE))
189 continue;
190
191 if (time_is_after_jiffies(cb->jiffies +
192 MT_TX_STATUS_SKB_TIMEOUT))
193 continue;
194 }
195
196 /* It has been too long since DMA_DONE, time out this packet
197 * and stop waiting for TXS callback.
198 */
199 idr_remove(&wcid->pktid, cb->pktid);
200 __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_FAILED |
201 MT_TX_CB_TXS_DONE, list);
202 }
203
204 out:
205 if (idr_is_empty(&wcid->pktid))
206 list_del_init(&wcid->list);
207
208 return skb;
209 }
210 EXPORT_SYMBOL_GPL(mt76_tx_status_skb_get);
211
212 void
mt76_tx_status_check(struct mt76_dev * dev,bool flush)213 mt76_tx_status_check(struct mt76_dev *dev, bool flush)
214 {
215 struct mt76_wcid *wcid, *tmp;
216 struct sk_buff_head list;
217
218 mt76_tx_status_lock(dev, &list);
219 list_for_each_entry_safe(wcid, tmp, &dev->wcid_list, list)
220 mt76_tx_status_skb_get(dev, wcid, flush ? -1 : 0, &list);
221 mt76_tx_status_unlock(dev, &list);
222 }
223 EXPORT_SYMBOL_GPL(mt76_tx_status_check);
224
225 static void
mt76_tx_check_non_aql(struct mt76_dev * dev,struct mt76_wcid * wcid,struct sk_buff * skb)226 mt76_tx_check_non_aql(struct mt76_dev *dev, struct mt76_wcid *wcid,
227 struct sk_buff *skb)
228 {
229 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
230 int pending;
231
232 if (!wcid || info->tx_time_est)
233 return;
234
235 pending = atomic_dec_return(&wcid->non_aql_packets);
236 if (pending < 0)
237 atomic_cmpxchg(&wcid->non_aql_packets, pending, 0);
238 }
239
__mt76_tx_complete_skb(struct mt76_dev * dev,u16 wcid_idx,struct sk_buff * skb,struct list_head * free_list)240 void __mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid_idx, struct sk_buff *skb,
241 struct list_head *free_list)
242 {
243 struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
244 struct ieee80211_tx_status status = {
245 .skb = skb,
246 .free_list = free_list,
247 };
248 struct mt76_wcid *wcid = NULL;
249 struct ieee80211_hw *hw;
250 struct sk_buff_head list;
251
252 rcu_read_lock();
253
254 if (wcid_idx < ARRAY_SIZE(dev->wcid))
255 wcid = rcu_dereference(dev->wcid[wcid_idx]);
256
257 mt76_tx_check_non_aql(dev, wcid, skb);
258
259 #ifdef CONFIG_NL80211_TESTMODE
260 if (mt76_is_testmode_skb(dev, skb, &hw)) {
261 struct mt76_phy *phy = hw->priv;
262
263 if (skb == phy->test.tx_skb)
264 phy->test.tx_done++;
265 if (phy->test.tx_queued == phy->test.tx_done)
266 wake_up(&dev->tx_wait);
267
268 dev_kfree_skb_any(skb);
269 goto out;
270 }
271 #endif
272
273 if (cb->pktid < MT_PACKET_ID_FIRST) {
274 struct ieee80211_rate_status rs = {};
275
276 hw = mt76_tx_status_get_hw(dev, skb);
277 status.sta = wcid_to_sta(wcid);
278 if (status.sta && (wcid->rate.flags || wcid->rate.legacy)) {
279 rs.rate_idx = wcid->rate;
280 status.rates = &rs;
281 status.n_rates = 1;
282 }
283 spin_lock_bh(&dev->rx_lock);
284 ieee80211_tx_status_ext(hw, &status);
285 spin_unlock_bh(&dev->rx_lock);
286 goto out;
287 }
288
289 mt76_tx_status_lock(dev, &list);
290 cb->jiffies = jiffies;
291 __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_DMA_DONE, &list);
292 mt76_tx_status_unlock(dev, &list);
293
294 out:
295 rcu_read_unlock();
296 }
297 EXPORT_SYMBOL_GPL(__mt76_tx_complete_skb);
298
299 static int
__mt76_tx_queue_skb(struct mt76_phy * phy,int qid,struct sk_buff * skb,struct mt76_wcid * wcid,struct ieee80211_sta * sta,bool * stop)300 __mt76_tx_queue_skb(struct mt76_phy *phy, int qid, struct sk_buff *skb,
301 struct mt76_wcid *wcid, struct ieee80211_sta *sta,
302 bool *stop)
303 {
304 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
305 struct mt76_queue *q = phy->q_tx[qid];
306 struct mt76_dev *dev = phy->dev;
307 bool non_aql;
308 int pending;
309 int idx;
310
311 non_aql = !info->tx_time_est;
312 idx = dev->queue_ops->tx_queue_skb(dev, q, qid, skb, wcid, sta);
313 if (idx < 0 || !sta)
314 return idx;
315
316 wcid = (struct mt76_wcid *)sta->drv_priv;
317 q->entry[idx].wcid = wcid->idx;
318
319 if (!non_aql)
320 return idx;
321
322 pending = atomic_inc_return(&wcid->non_aql_packets);
323 if (stop && pending >= MT_MAX_NON_AQL_PKT)
324 *stop = true;
325
326 return idx;
327 }
328
329 void
mt76_tx(struct mt76_phy * phy,struct ieee80211_sta * sta,struct mt76_wcid * wcid,struct sk_buff * skb)330 mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta,
331 struct mt76_wcid *wcid, struct sk_buff *skb)
332 {
333 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
334
335 if (mt76_testmode_enabled(phy)) {
336 ieee80211_free_txskb(phy->hw, skb);
337 return;
338 }
339
340 if (WARN_ON(skb_get_queue_mapping(skb) >= MT_TXQ_PSD))
341 skb_set_queue_mapping(skb, MT_TXQ_BE);
342
343 if (wcid && !(wcid->tx_info & MT_WCID_TX_INFO_SET))
344 ieee80211_get_tx_rates(info->control.vif, sta, skb,
345 info->control.rates, 1);
346
347 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
348
349 spin_lock_bh(&wcid->tx_pending.lock);
350 __skb_queue_tail(&wcid->tx_pending, skb);
351 spin_unlock_bh(&wcid->tx_pending.lock);
352
353 spin_lock_bh(&phy->tx_lock);
354 if (list_empty(&wcid->tx_list))
355 list_add_tail(&wcid->tx_list, &phy->tx_list);
356 spin_unlock_bh(&phy->tx_lock);
357
358 mt76_worker_schedule(&phy->dev->tx_worker);
359 }
360 EXPORT_SYMBOL_GPL(mt76_tx);
361
362 static struct sk_buff *
mt76_txq_dequeue(struct mt76_phy * phy,struct mt76_txq * mtxq)363 mt76_txq_dequeue(struct mt76_phy *phy, struct mt76_txq *mtxq)
364 {
365 struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
366 struct ieee80211_tx_info *info;
367 struct sk_buff *skb;
368
369 skb = ieee80211_tx_dequeue(phy->hw, txq);
370 if (!skb)
371 return NULL;
372
373 info = IEEE80211_SKB_CB(skb);
374 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
375
376 return skb;
377 }
378
379 static void
mt76_queue_ps_skb(struct mt76_phy * phy,struct ieee80211_sta * sta,struct sk_buff * skb,bool last)380 mt76_queue_ps_skb(struct mt76_phy *phy, struct ieee80211_sta *sta,
381 struct sk_buff *skb, bool last)
382 {
383 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
384 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
385
386 info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
387 if (last)
388 info->flags |= IEEE80211_TX_STATUS_EOSP |
389 IEEE80211_TX_CTL_REQ_TX_STATUS;
390
391 mt76_skb_set_moredata(skb, !last);
392 __mt76_tx_queue_skb(phy, MT_TXQ_PSD, skb, wcid, sta, NULL);
393 }
394
395 void
mt76_release_buffered_frames(struct ieee80211_hw * hw,struct ieee80211_sta * sta,u16 tids,int nframes,enum ieee80211_frame_release_type reason,bool more_data)396 mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
397 u16 tids, int nframes,
398 enum ieee80211_frame_release_type reason,
399 bool more_data)
400 {
401 struct mt76_phy *phy = hw->priv;
402 struct mt76_dev *dev = phy->dev;
403 struct sk_buff *last_skb = NULL;
404 struct mt76_queue *hwq = phy->q_tx[MT_TXQ_PSD];
405 int i;
406
407 spin_lock_bh(&hwq->lock);
408 for (i = 0; tids && nframes; i++, tids >>= 1) {
409 struct ieee80211_txq *txq = sta->txq[i];
410 struct mt76_txq *mtxq = (struct mt76_txq *)txq->drv_priv;
411 struct sk_buff *skb;
412
413 if (!(tids & 1))
414 continue;
415
416 do {
417 skb = mt76_txq_dequeue(phy, mtxq);
418 if (!skb)
419 break;
420
421 nframes--;
422 if (last_skb)
423 mt76_queue_ps_skb(phy, sta, last_skb, false);
424
425 last_skb = skb;
426 } while (nframes);
427 }
428
429 if (last_skb) {
430 mt76_queue_ps_skb(phy, sta, last_skb, true);
431 dev->queue_ops->kick(dev, hwq);
432 } else {
433 ieee80211_sta_eosp(sta);
434 }
435
436 spin_unlock_bh(&hwq->lock);
437 }
438 EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
439
440 static bool
mt76_txq_stopped(struct mt76_queue * q)441 mt76_txq_stopped(struct mt76_queue *q)
442 {
443 return q->stopped || q->blocked ||
444 q->queued + MT_TXQ_FREE_THR >= q->ndesc;
445 }
446
447 static int
mt76_txq_send_burst(struct mt76_phy * phy,struct mt76_queue * q,struct mt76_txq * mtxq,struct mt76_wcid * wcid)448 mt76_txq_send_burst(struct mt76_phy *phy, struct mt76_queue *q,
449 struct mt76_txq *mtxq, struct mt76_wcid *wcid)
450 {
451 struct mt76_dev *dev = phy->dev;
452 struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
453 enum mt76_txq_id qid = mt76_txq_get_qid(txq);
454 struct ieee80211_tx_info *info;
455 struct sk_buff *skb;
456 int n_frames = 1;
457 bool stop = false;
458 int idx;
459
460 if (test_bit(MT_WCID_FLAG_PS, &wcid->flags))
461 return 0;
462
463 if (atomic_read(&wcid->non_aql_packets) >= MT_MAX_NON_AQL_PKT)
464 return 0;
465
466 skb = mt76_txq_dequeue(phy, mtxq);
467 if (!skb)
468 return 0;
469
470 info = IEEE80211_SKB_CB(skb);
471 if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
472 ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
473 info->control.rates, 1);
474
475 spin_lock(&q->lock);
476 idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
477 spin_unlock(&q->lock);
478 if (idx < 0)
479 return idx;
480
481 do {
482 if (test_bit(MT76_RESET, &phy->state))
483 return -EBUSY;
484
485 if (stop || mt76_txq_stopped(q))
486 break;
487
488 skb = mt76_txq_dequeue(phy, mtxq);
489 if (!skb)
490 break;
491
492 info = IEEE80211_SKB_CB(skb);
493 if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
494 ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
495 info->control.rates, 1);
496
497 spin_lock(&q->lock);
498 idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
499 spin_unlock(&q->lock);
500 if (idx < 0)
501 break;
502
503 n_frames++;
504 } while (1);
505
506 spin_lock(&q->lock);
507 dev->queue_ops->kick(dev, q);
508 spin_unlock(&q->lock);
509
510 return n_frames;
511 }
512
513 static int
mt76_txq_schedule_list(struct mt76_phy * phy,enum mt76_txq_id qid)514 mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid)
515 {
516 struct mt76_queue *q = phy->q_tx[qid];
517 struct mt76_dev *dev = phy->dev;
518 struct ieee80211_txq *txq;
519 struct mt76_txq *mtxq;
520 struct mt76_wcid *wcid;
521 int ret = 0;
522
523 while (1) {
524 int n_frames = 0;
525
526 if (test_bit(MT76_RESET, &phy->state))
527 return -EBUSY;
528
529 if (dev->queue_ops->tx_cleanup &&
530 q->queued + 2 * MT_TXQ_FREE_THR >= q->ndesc) {
531 dev->queue_ops->tx_cleanup(dev, q, false);
532 }
533
534 txq = ieee80211_next_txq(phy->hw, qid);
535 if (!txq)
536 break;
537
538 mtxq = (struct mt76_txq *)txq->drv_priv;
539 wcid = rcu_dereference(dev->wcid[mtxq->wcid]);
540 if (!wcid || test_bit(MT_WCID_FLAG_PS, &wcid->flags))
541 continue;
542
543 if (mtxq->send_bar && mtxq->aggr) {
544 struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
545 struct ieee80211_sta *sta = txq->sta;
546 struct ieee80211_vif *vif = txq->vif;
547 u16 agg_ssn = mtxq->agg_ssn;
548 u8 tid = txq->tid;
549
550 mtxq->send_bar = false;
551 ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
552 }
553
554 if (!mt76_txq_stopped(q))
555 n_frames = mt76_txq_send_burst(phy, q, mtxq, wcid);
556
557 ieee80211_return_txq(phy->hw, txq, false);
558
559 if (unlikely(n_frames < 0))
560 return n_frames;
561
562 ret += n_frames;
563 }
564
565 return ret;
566 }
567
mt76_txq_schedule(struct mt76_phy * phy,enum mt76_txq_id qid)568 void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid)
569 {
570 int len;
571
572 if (qid >= 4)
573 return;
574
575 local_bh_disable();
576 rcu_read_lock();
577
578 do {
579 ieee80211_txq_schedule_start(phy->hw, qid);
580 len = mt76_txq_schedule_list(phy, qid);
581 ieee80211_txq_schedule_end(phy->hw, qid);
582 } while (len > 0);
583
584 rcu_read_unlock();
585 local_bh_enable();
586 }
587 EXPORT_SYMBOL_GPL(mt76_txq_schedule);
588
589 static int
mt76_txq_schedule_pending_wcid(struct mt76_phy * phy,struct mt76_wcid * wcid)590 mt76_txq_schedule_pending_wcid(struct mt76_phy *phy, struct mt76_wcid *wcid)
591 {
592 struct mt76_dev *dev = phy->dev;
593 struct ieee80211_sta *sta;
594 struct mt76_queue *q;
595 struct sk_buff *skb;
596 int ret = 0;
597
598 spin_lock(&wcid->tx_pending.lock);
599 while ((skb = skb_peek(&wcid->tx_pending)) != NULL) {
600 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
601 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
602 int qid = skb_get_queue_mapping(skb);
603
604 if ((dev->drv->drv_flags & MT_DRV_HW_MGMT_TXQ) &&
605 !(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
606 !ieee80211_is_data(hdr->frame_control) &&
607 !ieee80211_is_bufferable_mmpdu(skb))
608 qid = MT_TXQ_PSD;
609
610 q = phy->q_tx[qid];
611 if (mt76_txq_stopped(q)) {
612 ret = -1;
613 break;
614 }
615
616 __skb_unlink(skb, &wcid->tx_pending);
617 spin_unlock(&wcid->tx_pending.lock);
618
619 sta = wcid_to_sta(wcid);
620 spin_lock(&q->lock);
621 __mt76_tx_queue_skb(phy, qid, skb, wcid, sta, NULL);
622 dev->queue_ops->kick(dev, q);
623 spin_unlock(&q->lock);
624
625 spin_lock(&wcid->tx_pending.lock);
626 }
627 spin_unlock(&wcid->tx_pending.lock);
628
629 return ret;
630 }
631
mt76_txq_schedule_pending(struct mt76_phy * phy)632 static void mt76_txq_schedule_pending(struct mt76_phy *phy)
633 {
634 if (list_empty(&phy->tx_list))
635 return;
636
637 local_bh_disable();
638 rcu_read_lock();
639
640 spin_lock(&phy->tx_lock);
641 while (!list_empty(&phy->tx_list)) {
642 struct mt76_wcid *wcid = NULL;
643 int ret;
644
645 wcid = list_first_entry(&phy->tx_list, struct mt76_wcid, tx_list);
646 list_del_init(&wcid->tx_list);
647
648 spin_unlock(&phy->tx_lock);
649 ret = mt76_txq_schedule_pending_wcid(phy, wcid);
650 spin_lock(&phy->tx_lock);
651
652 if (ret) {
653 if (list_empty(&wcid->tx_list))
654 list_add_tail(&wcid->tx_list, &phy->tx_list);
655 break;
656 }
657 }
658 spin_unlock(&phy->tx_lock);
659
660 rcu_read_unlock();
661 local_bh_enable();
662 }
663
mt76_txq_schedule_all(struct mt76_phy * phy)664 void mt76_txq_schedule_all(struct mt76_phy *phy)
665 {
666 int i;
667
668 mt76_txq_schedule_pending(phy);
669 for (i = 0; i <= MT_TXQ_BK; i++)
670 mt76_txq_schedule(phy, i);
671 }
672 EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
673
mt76_tx_worker_run(struct mt76_dev * dev)674 void mt76_tx_worker_run(struct mt76_dev *dev)
675 {
676 struct mt76_phy *phy;
677 int i;
678
679 for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
680 phy = dev->phys[i];
681 if (!phy)
682 continue;
683
684 mt76_txq_schedule_all(phy);
685 }
686
687 #ifdef CONFIG_NL80211_TESTMODE
688 for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
689 phy = dev->phys[i];
690 if (!phy || !phy->test.tx_pending)
691 continue;
692
693 mt76_testmode_tx_pending(phy);
694 }
695 #endif
696 }
697 EXPORT_SYMBOL_GPL(mt76_tx_worker_run);
698
mt76_tx_worker(struct mt76_worker * w)699 void mt76_tx_worker(struct mt76_worker *w)
700 {
701 struct mt76_dev *dev = container_of(w, struct mt76_dev, tx_worker);
702
703 mt76_tx_worker_run(dev);
704 }
705
mt76_stop_tx_queues(struct mt76_phy * phy,struct ieee80211_sta * sta,bool send_bar)706 void mt76_stop_tx_queues(struct mt76_phy *phy, struct ieee80211_sta *sta,
707 bool send_bar)
708 {
709 int i;
710
711 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
712 struct ieee80211_txq *txq = sta->txq[i];
713 struct mt76_queue *hwq;
714 struct mt76_txq *mtxq;
715
716 if (!txq)
717 continue;
718
719 hwq = phy->q_tx[mt76_txq_get_qid(txq)];
720 mtxq = (struct mt76_txq *)txq->drv_priv;
721
722 spin_lock_bh(&hwq->lock);
723 mtxq->send_bar = mtxq->aggr && send_bar;
724 spin_unlock_bh(&hwq->lock);
725 }
726 }
727 EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
728
mt76_wake_tx_queue(struct ieee80211_hw * hw,struct ieee80211_txq * txq)729 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
730 {
731 struct mt76_phy *phy = hw->priv;
732 struct mt76_dev *dev = phy->dev;
733
734 if (!test_bit(MT76_STATE_RUNNING, &phy->state))
735 return;
736
737 mt76_worker_schedule(&dev->tx_worker);
738 }
739 EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
740
mt76_ac_to_hwq(u8 ac)741 u8 mt76_ac_to_hwq(u8 ac)
742 {
743 static const u8 wmm_queue_map[] = {
744 [IEEE80211_AC_BE] = 0,
745 [IEEE80211_AC_BK] = 1,
746 [IEEE80211_AC_VI] = 2,
747 [IEEE80211_AC_VO] = 3,
748 };
749
750 if (WARN_ON(ac >= IEEE80211_NUM_ACS))
751 return 0;
752
753 return wmm_queue_map[ac];
754 }
755 EXPORT_SYMBOL_GPL(mt76_ac_to_hwq);
756
mt76_skb_adjust_pad(struct sk_buff * skb,int pad)757 int mt76_skb_adjust_pad(struct sk_buff *skb, int pad)
758 {
759 struct sk_buff *iter, *last = skb;
760
761 /* First packet of a A-MSDU burst keeps track of the whole burst
762 * length, need to update length of it and the last packet.
763 */
764 skb_walk_frags(skb, iter) {
765 last = iter;
766 if (!iter->next) {
767 skb->data_len += pad;
768 skb->len += pad;
769 break;
770 }
771 }
772
773 if (skb_pad(last, pad))
774 return -ENOMEM;
775
776 __skb_put(last, pad);
777
778 return 0;
779 }
780 EXPORT_SYMBOL_GPL(mt76_skb_adjust_pad);
781
mt76_queue_tx_complete(struct mt76_dev * dev,struct mt76_queue * q,struct mt76_queue_entry * e)782 void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q,
783 struct mt76_queue_entry *e)
784 {
785 if (e->skb)
786 dev->drv->tx_complete_skb(dev, e);
787
788 spin_lock_bh(&q->lock);
789 q->tail = (q->tail + 1) % q->ndesc;
790 q->queued--;
791 spin_unlock_bh(&q->lock);
792 }
793 EXPORT_SYMBOL_GPL(mt76_queue_tx_complete);
794
__mt76_set_tx_blocked(struct mt76_dev * dev,bool blocked)795 void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked)
796 {
797 struct mt76_phy *phy = &dev->phy;
798 struct mt76_queue *q = phy->q_tx[0];
799
800 if (blocked == q->blocked)
801 return;
802
803 q->blocked = blocked;
804
805 phy = dev->phys[MT_BAND1];
806 if (phy) {
807 q = phy->q_tx[0];
808 q->blocked = blocked;
809 }
810 phy = dev->phys[MT_BAND2];
811 if (phy) {
812 q = phy->q_tx[0];
813 q->blocked = blocked;
814 }
815
816 if (!blocked)
817 mt76_worker_schedule(&dev->tx_worker);
818 }
819 EXPORT_SYMBOL_GPL(__mt76_set_tx_blocked);
820
mt76_token_consume(struct mt76_dev * dev,struct mt76_txwi_cache ** ptxwi)821 int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi)
822 {
823 int token;
824
825 spin_lock_bh(&dev->token_lock);
826
827 token = idr_alloc(&dev->token, *ptxwi, 0, dev->token_size, GFP_ATOMIC);
828 if (token >= 0)
829 dev->token_count++;
830
831 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
832 if (mtk_wed_device_active(&dev->mmio.wed) &&
833 token >= dev->mmio.wed.wlan.token_start)
834 dev->wed_token_count++;
835 #endif
836
837 if (dev->token_count >= dev->token_size - MT76_TOKEN_FREE_THR)
838 __mt76_set_tx_blocked(dev, true);
839
840 spin_unlock_bh(&dev->token_lock);
841
842 return token;
843 }
844 EXPORT_SYMBOL_GPL(mt76_token_consume);
845
mt76_rx_token_consume(struct mt76_dev * dev,void * ptr,struct mt76_txwi_cache * t,dma_addr_t phys)846 int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr,
847 struct mt76_txwi_cache *t, dma_addr_t phys)
848 {
849 int token;
850
851 spin_lock_bh(&dev->rx_token_lock);
852 token = idr_alloc(&dev->rx_token, t, 0, dev->rx_token_size,
853 GFP_ATOMIC);
854 if (token >= 0) {
855 t->ptr = ptr;
856 t->dma_addr = phys;
857 }
858 spin_unlock_bh(&dev->rx_token_lock);
859
860 return token;
861 }
862 EXPORT_SYMBOL_GPL(mt76_rx_token_consume);
863
864 struct mt76_txwi_cache *
mt76_token_release(struct mt76_dev * dev,int token,bool * wake)865 mt76_token_release(struct mt76_dev *dev, int token, bool *wake)
866 {
867 struct mt76_txwi_cache *txwi;
868
869 spin_lock_bh(&dev->token_lock);
870
871 txwi = idr_remove(&dev->token, token);
872 if (txwi) {
873 dev->token_count--;
874
875 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
876 if (mtk_wed_device_active(&dev->mmio.wed) &&
877 token >= dev->mmio.wed.wlan.token_start &&
878 --dev->wed_token_count == 0)
879 wake_up(&dev->tx_wait);
880 #endif
881 }
882
883 if (dev->token_count < dev->token_size - MT76_TOKEN_FREE_THR &&
884 dev->phy.q_tx[0]->blocked)
885 *wake = true;
886
887 spin_unlock_bh(&dev->token_lock);
888
889 return txwi;
890 }
891 EXPORT_SYMBOL_GPL(mt76_token_release);
892
893 struct mt76_txwi_cache *
mt76_rx_token_release(struct mt76_dev * dev,int token)894 mt76_rx_token_release(struct mt76_dev *dev, int token)
895 {
896 struct mt76_txwi_cache *t;
897
898 spin_lock_bh(&dev->rx_token_lock);
899 t = idr_remove(&dev->rx_token, token);
900 spin_unlock_bh(&dev->rx_token_lock);
901
902 return t;
903 }
904 EXPORT_SYMBOL_GPL(mt76_rx_token_release);
905