1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2020, Loongson Corporation
3 */
4
5 #include <linux/clk-provider.h>
6 #include <linux/pci.h>
7 #include <linux/dmi.h>
8 #include <linux/device.h>
9 #include <linux/of_irq.h>
10 #include "stmmac.h"
11
12 #define DRIVER_NAME "dwmac-loongson-pci"
13
loongson_default_data(struct plat_stmmacenet_data * plat)14 static int loongson_default_data(struct plat_stmmacenet_data *plat)
15
16 {
17 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
18 plat->has_gmac = 1;
19 plat->force_sf_dma_mode = 1;
20
21 /* Set default value for multicast hash bins */
22 plat->multicast_filter_bins = HASH_TABLE_SIZE;
23
24 /* Set default value for unicast filter entries */
25 plat->unicast_filter_entries = 1;
26
27 /* Set the maxmtu to a default of JUMBO_LEN */
28 plat->maxmtu = JUMBO_LEN;
29
30 /* Set default number of RX and TX queues to use */
31 plat->tx_queues_to_use = 1;
32 plat->rx_queues_to_use = 1;
33
34 /* Disable Priority config by default */
35 plat->tx_queues_cfg[0].use_prio = false;
36 plat->rx_queues_cfg[0].use_prio = false;
37
38 /* Disable RX queues routing by default */
39 plat->rx_queues_cfg[0].pkt_route = 0x0;
40
41 plat->clk_ref_rate = 125000000;
42 plat->clk_ptp_rate = 125000000;
43
44 /* Default to phy auto-detection */
45 plat->phy_addr = -1;
46
47 plat->dma_cfg->pbl = 32;
48 plat->dma_cfg->pblx8 = true;
49
50 plat->multicast_filter_bins = 256;
51 return 0;
52 }
53
loongson_dwmac_probe(struct pci_dev * pdev,const struct pci_device_id * id)54 static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id)
55 {
56 struct plat_stmmacenet_data *plat;
57 struct stmmac_resources res;
58 struct device_node *np;
59 int ret, i, phy_mode;
60
61 np = dev_of_node(&pdev->dev);
62
63 if (!np) {
64 pr_info("dwmac_loongson_pci: No OF node\n");
65 return -ENODEV;
66 }
67
68 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
69 if (!plat)
70 return -ENOMEM;
71
72 plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
73 sizeof(*plat->mdio_bus_data),
74 GFP_KERNEL);
75 if (!plat->mdio_bus_data)
76 return -ENOMEM;
77
78 plat->mdio_node = of_get_child_by_name(np, "mdio");
79 if (plat->mdio_node) {
80 dev_info(&pdev->dev, "Found MDIO subnode\n");
81 plat->mdio_bus_data->needs_reset = true;
82 }
83
84 plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg), GFP_KERNEL);
85 if (!plat->dma_cfg) {
86 ret = -ENOMEM;
87 goto err_put_node;
88 }
89
90 /* Enable pci device */
91 ret = pci_enable_device(pdev);
92 if (ret) {
93 dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n", __func__);
94 goto err_put_node;
95 }
96
97 /* Get the base address of device */
98 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
99 if (pci_resource_len(pdev, i) == 0)
100 continue;
101 ret = pcim_iomap_regions(pdev, BIT(0), DRIVER_NAME);
102 if (ret)
103 goto err_disable_device;
104 break;
105 }
106
107 plat->bus_id = of_alias_get_id(np, "ethernet");
108 if (plat->bus_id < 0)
109 plat->bus_id = pci_dev_id(pdev);
110
111 phy_mode = device_get_phy_mode(&pdev->dev);
112 if (phy_mode < 0) {
113 dev_err(&pdev->dev, "phy_mode not found\n");
114 ret = phy_mode;
115 goto err_disable_device;
116 }
117
118 plat->phy_interface = phy_mode;
119 plat->mac_interface = PHY_INTERFACE_MODE_GMII;
120
121 pci_set_master(pdev);
122
123 loongson_default_data(plat);
124 pci_enable_msi(pdev);
125 memset(&res, 0, sizeof(res));
126 res.addr = pcim_iomap_table(pdev)[0];
127
128 res.irq = of_irq_get_byname(np, "macirq");
129 if (res.irq < 0) {
130 dev_err(&pdev->dev, "IRQ macirq not found\n");
131 ret = -ENODEV;
132 goto err_disable_msi;
133 }
134
135 res.wol_irq = of_irq_get_byname(np, "eth_wake_irq");
136 if (res.wol_irq < 0) {
137 dev_info(&pdev->dev, "IRQ eth_wake_irq not found, using macirq\n");
138 res.wol_irq = res.irq;
139 }
140
141 res.lpi_irq = of_irq_get_byname(np, "eth_lpi");
142 if (res.lpi_irq < 0) {
143 dev_err(&pdev->dev, "IRQ eth_lpi not found\n");
144 ret = -ENODEV;
145 goto err_disable_msi;
146 }
147
148 ret = stmmac_dvr_probe(&pdev->dev, plat, &res);
149 if (ret)
150 goto err_disable_msi;
151
152 return ret;
153
154 err_disable_msi:
155 pci_disable_msi(pdev);
156 err_disable_device:
157 pci_disable_device(pdev);
158 err_put_node:
159 of_node_put(plat->mdio_node);
160 return ret;
161 }
162
loongson_dwmac_remove(struct pci_dev * pdev)163 static void loongson_dwmac_remove(struct pci_dev *pdev)
164 {
165 struct net_device *ndev = dev_get_drvdata(&pdev->dev);
166 struct stmmac_priv *priv = netdev_priv(ndev);
167 int i;
168
169 of_node_put(priv->plat->mdio_node);
170 stmmac_dvr_remove(&pdev->dev);
171
172 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
173 if (pci_resource_len(pdev, i) == 0)
174 continue;
175 pcim_iounmap_regions(pdev, BIT(i));
176 break;
177 }
178
179 pci_disable_msi(pdev);
180 pci_disable_device(pdev);
181 }
182
loongson_dwmac_suspend(struct device * dev)183 static int __maybe_unused loongson_dwmac_suspend(struct device *dev)
184 {
185 struct pci_dev *pdev = to_pci_dev(dev);
186 int ret;
187
188 ret = stmmac_suspend(dev);
189 if (ret)
190 return ret;
191
192 ret = pci_save_state(pdev);
193 if (ret)
194 return ret;
195
196 pci_disable_device(pdev);
197 pci_wake_from_d3(pdev, true);
198 return 0;
199 }
200
loongson_dwmac_resume(struct device * dev)201 static int __maybe_unused loongson_dwmac_resume(struct device *dev)
202 {
203 struct pci_dev *pdev = to_pci_dev(dev);
204 int ret;
205
206 pci_restore_state(pdev);
207 pci_set_power_state(pdev, PCI_D0);
208
209 ret = pci_enable_device(pdev);
210 if (ret)
211 return ret;
212
213 pci_set_master(pdev);
214
215 return stmmac_resume(dev);
216 }
217
218 static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend,
219 loongson_dwmac_resume);
220
221 static const struct pci_device_id loongson_dwmac_id_table[] = {
222 { PCI_VDEVICE(LOONGSON, 0x7a03) },
223 {}
224 };
225 MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table);
226
227 static struct pci_driver loongson_dwmac_driver = {
228 .name = DRIVER_NAME,
229 .id_table = loongson_dwmac_id_table,
230 .probe = loongson_dwmac_probe,
231 .remove = loongson_dwmac_remove,
232 .driver = {
233 .pm = &loongson_dwmac_pm_ops,
234 },
235 };
236
237 module_pci_driver(loongson_dwmac_driver);
238
239 MODULE_DESCRIPTION("Loongson DWMAC PCI driver");
240 MODULE_AUTHOR("Qing Zhang <zhangqing@loongson.cn>");
241 MODULE_LICENSE("GPL v2");
242