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Searched defs:dct (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/infiniband/hw/mlx5/
H A Dqpc.c93 struct mlx5_core_dct *dct; in dct_event_notifier() local
196 struct mlx5_core_dct *dct) in _mlx5_core_destroy_dct()
207 int mlx5_core_create_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct, in mlx5_core_create_dct()
265 struct mlx5_core_dct *dct) in mlx5_core_drain_dct()
277 struct mlx5_core_dct *dct) in mlx5_core_destroy_dct()
535 int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct, in mlx5_core_dct_query()
H A Dqp.c5005 struct mlx5_core_dct *dct = &mqp->dct.mdct; mlx5_ib_dct_query_qp() local
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H A Dmlx5_ib.h513 struct mlx5_ib_dct dct; member
/openbmc/linux/drivers/edac/
H A Damd64_edac.c102 static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct) in f15h_select_dct()
126 static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct, in amd64_read_dct_pci_cfg()
372 static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct, in get_cs_base_and_mask()
428 #define for_each_chip_select(i, dct, pvt) \ argument
431 #define chip_select_base(i, dct, pvt) \ argument
434 #define for_each_chip_select_mask(i, dct, pvt) \ argument
2113 static int k8_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct, in k8_dbam_to_chip_select()
2217 static int f10_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct, in f10_dbam_to_chip_select()
2233 static int f15_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct, in f15_dbam_to_chip_select()
2242 static int f15_m60h_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct, in f15_m60h_dbam_to_chip_select()
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H A Damd64_edac.h166 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE) argument
167 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE) argument
/openbmc/linux/drivers/soc/fsl/dpio/
H A Dqbman-portal.c1068 enum qbman_pull_type_e dct) in qbman_pull_desc_set_wq()
1083 enum qbman_pull_type_e dct) in qbman_pull_desc_set_channel()
/openbmc/qemu/target/s390x/
H A Dioinst.c730 int dct; in ioinst_handle_schm() local
/openbmc/openbmc/poky/bitbake/lib/bb/
H A Dsiggen.py52 def SetDecoder(dct): argument
/openbmc/qemu/hw/s390x/
H A Dcss.c1939 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo) in css_do_schm()
/openbmc/u-boot/arch/arm/include/asm/arch-mx25/
H A Dimx-regs.h495 #define WEIM_CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \ argument
/openbmc/u-boot/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h651 #define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \ argument
/openbmc/linux/arch/ia64/include/asm/
H A Dpal.h1294 dct :4, /* Date cache tracking */ member
/openbmc/linux/include/linux/mlx5/
H A Ddevice.h751 struct mlx5_eqe_dct dct; member
H A Dmlx5_ifc.h1649 u8 dct[0x1]; member