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Searched defs:_i (Results 1 – 25 of 56) sorted by relevance

123

/openbmc/linux/drivers/infiniband/hw/irdma/
H A Di40iw_hw.h34 #define I40E_GLHMC_VFPDINV(_i) (0x000C8300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ argument
38 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
39 #define I40E_GLPES_PFIP4RXTRUNC(_i) (0x00010700 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
40 #define I40E_GLPES_PFIP4TXNOROUTE(_i) (0x00012E00 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
41 #define I40E_GLPES_PFIP6RXDISCARD(_i) (0x00011200 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
42 #define I40E_GLPES_PFIP6RXTRUNC(_i) (0x00011300 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
44 #define I40E_GLPES_PFRDMAVBNDLO(_i) (0x00014800 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
45 #define I40E_GLPES_PFIP4TXMCOCTSLO(_i) (0x00012000 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
46 #define I40E_GLPES_PFIP6RXMCOCTSLO(_i) (0x00011600 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
47 #define I40E_GLPES_PFIP6TXMCOCTSLO(_i) (0x00012A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
[all …]
H A Dicrdma_hw.h19 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4)) /* _i=0...63 */ argument
40 #define GLHMC_VFPDINV(_i) (0x00528300 + ((_i) * 4)) /* _i=0...31 */ argument
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_register.h71 #define I40E_PRTDCB_RETSTCC(_i) (0x00122180 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
106 #define I40E_PRTDCB_RUPTQ(_i) (0x00122400 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
113 #define I40E_PRTDCB_TCMSTC(_i) (0x000A0040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
124 #define I40E_PRTDCB_TCWSTC(_i) (0x000A2040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
164 #define I40E_PRTDCB_TPFCTS(_i) (0x001E4660 + ((_i) * 32)) /* _i=0...7 */ /* Reset: GLOBR */ argument
179 #define I40E_GLGEN_GPIO_CTL(_i) (0x00088100 + ((_i) * 4)) /* _i=0...29 */ /* Reset: POR */ argument
199 #define I40E_GLGEN_MDIO_I2C_SEL(_i) (0x000881C0 + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
200 #define I40E_GLGEN_MSCA(_i) (0x0008818C + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
205 #define I40E_GLGEN_MSCA_OPCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_OPCODE_SHIFT) argument
207 #define I40E_GLGEN_MSCA_STCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_STCODE_SHIFT) argument
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_hw_autogen.h111 #define GL_PREEXT_L2_PMASK0(_i) (0x0020F0FC + ((_i) * 4)) argument
112 #define GL_PREEXT_L2_PMASK1(_i) (0x0020F108 + ((_i) * 4)) argument
113 #define GLFLXP_RXDID_FLAGS(_i, _j) (0x0045D000 + ((_i) * 4 + (_j) * 256)) argument
116 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045c800 + ((_i) * 4)) argument
121 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045c900 + ((_i) * argument
126 GLFLXP_RXDID_FLX_WRD_2(_i) global() argument
131 GLFLXP_RXDID_FLX_WRD_3(_i) global() argument
145 GLGEN_GPIO_CTL(_i) global() argument
160 GLGEN_VFLRSTAT(_i) global() argument
193 GLINT_ITR(_i,_INT) global() argument
261 QRX_CONTEXT(_i,_QRX) global() argument
287 PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(_i) global() argument
290 PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(_i) global() argument
373 GLQF_FDINSET(_i,_j) global() argument
374 GLQF_FDMASK(_i) global() argument
380 GLQF_FDMASK_SEL(_i) global() argument
381 GLQF_FDSWAP(_i,_j) global() argument
382 GLQF_HMASK(_i) global() argument
388 GLQF_HMASK_SEL(_i) global() argument
396 GLPRT_BPRCL(_i) global() argument
397 GLPRT_BPTCL(_i) global() argument
398 GLPRT_CRCERRS(_i) global() argument
399 GLPRT_GORCL(_i) global() argument
400 GLPRT_GOTCL(_i) global() argument
401 GLPRT_ILLERRC(_i) global() argument
402 GLPRT_LXOFFRXC(_i) global() argument
403 GLPRT_LXOFFTXC(_i) global() argument
404 GLPRT_LXONRXC(_i) global() argument
405 GLPRT_LXONTXC(_i) global() argument
406 GLPRT_MLFC(_i) global() argument
407 GLPRT_MPRCL(_i) global() argument
408 GLPRT_MPTCL(_i) global() argument
409 GLPRT_MRFC(_i) global() argument
410 GLPRT_PRC1023L(_i) global() argument
411 GLPRT_PRC127L(_i) global() argument
412 GLPRT_PRC1522L(_i) global() argument
413 GLPRT_PRC255L(_i) global() argument
414 GLPRT_PRC511L(_i) global() argument
415 GLPRT_PRC64L(_i) global() argument
416 GLPRT_PRC9522L(_i) global() argument
417 GLPRT_PTC1023L(_i) global() argument
418 GLPRT_PTC127L(_i) global() argument
419 GLPRT_PTC1522L(_i) global() argument
420 GLPRT_PTC255L(_i) global() argument
421 GLPRT_PTC511L(_i) global() argument
422 GLPRT_PTC64L(_i) global() argument
423 GLPRT_PTC9522L(_i) global() argument
424 GLPRT_PXOFFRXC(_i,_j) global() argument
425 GLPRT_PXOFFTXC(_i,_j) global() argument
426 GLPRT_PXONRXC(_i,_j) global() argument
427 GLPRT_PXONTXC(_i,_j) global() argument
428 GLPRT_RFC(_i) global() argument
429 GLPRT_RJC(_i) global() argument
430 GLPRT_RLEC(_i) global() argument
431 GLPRT_ROC(_i) global() argument
432 GLPRT_RUC(_i) global() argument
433 GLPRT_RXON2OFFCNT(_i,_j) global() argument
434 GLPRT_TDOLD(_i) global() argument
435 GLPRT_UPRCL(_i) global() argument
436 GLPRT_UPTCL(_i) global() argument
437 GLSTAT_FD_CNT0L(_i) global() argument
438 GLV_BPRCL(_i) global() argument
439 GLV_BPTCL(_i) global() argument
440 GLV_GORCL(_i) global() argument
441 GLV_GOTCL(_i) global() argument
442 GLV_MPRCL(_i) global() argument
443 GLV_MPTCL(_i) global() argument
444 GLV_RDPC(_i) global() argument
446 GLV_UPRCL(_i) global() argument
447 GLV_UPTCL(_i) global() argument
453 GLTSYN_AUX_IN_0(_i) global() argument
455 GLTSYN_AUX_OUT_0(_i) global() argument
458 GLTSYN_CLKO_0(_i) global() argument
461 GLTSYN_ENA(_i) global() argument
463 GLTSYN_EVNT_H_0(_i) global() argument
464 GLTSYN_EVNT_L_0(_i) global() argument
465 GLTSYN_HHTIME_H(_i) global() argument
466 GLTSYN_HHTIME_L(_i) global() argument
467 GLTSYN_INCVAL_H(_i) global() argument
468 GLTSYN_INCVAL_L(_i) global() argument
469 GLTSYN_SHADJ_H(_i) global() argument
470 GLTSYN_SHADJ_L(_i) global() argument
471 GLTSYN_SHTIME_0(_i) global() argument
472 GLTSYN_SHTIME_H(_i) global() argument
473 GLTSYN_SHTIME_L(_i) global() argument
474 GLTSYN_STAT(_i) global() argument
479 GLTSYN_TGT_H_0(_i) global() argument
480 GLTSYN_TGT_L_0(_i) global() argument
481 GLTSYN_TIME_H(_i) global() argument
482 GLTSYN_TIME_L(_i) global() argument
503 VFINT_DYN_CTLN(_i) global() argument
[all...]
H A Dice_ethtool.c159 #define TCDCB_TLPM_WAIT_DM(_i) (0x000A0080 + ((_i) * 4)) argument
228 #define GLTDPU_TCLAN_COMP_BOB(_i) (0x00049ADC + ((_i) * 4)) argument
237 #define GLTDPU_TCB_CMD_BOB(_i) (0x0004975C + ((_i) * 4)) argument
246 #define GLTDPU_PSM_UPDATE_BOB(_i) (0x00049B5C + ((_i) * 4)) argument
255 #define GLTCB_CMD_IN_BOB(_i) (0x000AE288 + ((_i) * 4)) argument
264 #define GLLAN_TCLAN_FETCH_CTL_FBK_BOB_CTL(_i) (0x000FC148 + ((_i) * 4)) argument
273 #define GLLAN_TCLAN_FETCH_CTL_SCHED_BOB_CTL(_i) (0x000FC248 + ((_i) * 4)) argument
282 #define GLLAN_TCLAN_CACHE_CTL_BOB_CTL(_i) (0x000FC1C8 + ((_i) * 4)) argument
291 #define GLLAN_TCLAN_FETCH_CTL_PROC_BOB_CTL(_i) (0x000FC188 + ((_i) * 4)) argument
300 #define GLLAN_TCLAN_FETCH_CTL_PCIE_RD_BOB_CTL(_i) (0x000FC288 + ((_i) * 4)) argument
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dreg_wow.h127 #define AR_WOW_LEN1_SHIFT(_i) ((0x3 - ((_i) & 0x3)) << 0x3) argument
128 #define AR_WOW_LENGTH1_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN1_SHIFT(_i)) argument
129 #define AR_WOW_LEN2_SHIFT(_i) ((0x7 - ((_i) & 0x7)) << 0x3) argument
130 #define AR_WOW_LENGTH2_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN2_SHIFT(_i)) argument
131 #define AR_WOW_LEN3_SHIFT(_i) ((0xb - ((_i) & 0xb)) << 0x3) argument
132 #define AR_WOW_LENGTH3_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN3_SHIFT(_i)) argument
133 #define AR_WOW_LEN4_SHIFT(_i) ((0xf - ((_i) & 0xf)) << 0x3) argument
134 #define AR_WOW_LENGTH4_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN4_SHIFT(_i)) argument
H A Dar9003_phy.h622 #define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_ah, _i) (AR_SM_BASE + \ argument
983 #define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM1_BASE + 0x450 + ((_i) << 2)) argument
1040 #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) argument
1064 #define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (AR_PHY_ADC_GAIN_DC_CORR_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1065 #define AR_PHY_NEW_ADC_DC_GAIN_CORR_9300_10(_i) (AR_PHY_ADC_GAIN_DC_CORR_0_9300_10 + (AR_PHY_CHAIN_… argument
1066 #define AR_PHY_SWITCH_CHAIN(_i) (AR_PHY_SWITCH_CHAIN_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1067 #define AR_PHY_EXT_ATTEN_CTL(_i) (AR_PHY_EXT_ATTEN_CTL_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1069 #define AR_PHY_RXGAIN(_i) (AR_PHY_FORCEMAX_GAINS_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1070 #define AR_PHY_TPCRG5(_i) (AR_PHY_TPC_5_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1071 #define AR_PHY_PDADC_TAB(_i) (AR_PHY_PDADC_TAB_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
[all …]
H A Dar9002_phy.h190 #define AR_PHY_TIMING_CTRL4(_i) (0x9920 + ((_i) << 12)) argument
305 #define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (0x99b4 + ((_i) << 12)) argument
385 #define AR_PHY_CAL_MEAS_0(_i) (0x9c10 + ((_i) << 12)) argument
386 #define AR_PHY_CAL_MEAS_1(_i) (0x9c14 + ((_i) << 12)) argument
387 #define AR_PHY_CAL_MEAS_2(_i) (0x9c18 + ((_i) << 12)) argument
388 #define AR_PHY_CAL_MEAS_3(_i) (0x9c1c + ((_i) << 12)) argument
/openbmc/linux/drivers/net/dsa/qca/
H A Dqca8k.h103 #define QCA8K_LED_CTRL_REG(_i) (0x050 + (_i) * 4) argument
108 #define QCA8K_LED_CTRL_SHIFT(_i) (((_i) % 2) * 16) argument
137 #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) argument
151 #define QCA8K_REG_PORT_HDR_CTRL(_i) (0x9c + (_i * 4)) argument
176 #define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) argument
187 #define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8)) argument
192 #define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8)) argument
226 #define QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i) (4 + (_i) * 2) argument
228 #define QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(_i) (GENMASK(1, 0) << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHI… argument
230 #define QCA8K_VTU_FUNC0_EG_MODE_PORT_UNMOD(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNMOD << QCA8K_VTU_FUNC0_… argument
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_type.h259 #define IXGBE_EICS_EX(_i) (0x00A90 + (_i) * 4) argument
260 #define IXGBE_EIMS_EX(_i) (0x00AA0 + (_i) * 4) argument
261 #define IXGBE_EIMC_EX(_i) (0x00AB0 + (_i) * 4) argument
262 #define IXGBE_EIAM_EX(_i) (0x00AD0 + (_i) * 4) argument
272 #define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ argument
277 #define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */ argument
282 #define IXGBE_PBACL(_i) (((_i) == 0) ? (0x11068) : (0x110C0 + ((_i) * 4))) argument
290 #define IXGBE_FCRTH_82599(_i) (0x03260 + ((_i) * 4)) /* 8 of these (0-7) */ argument
291 #define IXGBE_FCRTL_82599(_i) (0x03220 + ((_i) * 4)) /* 8 of these (0-7) */ argument
293 #define IXGBE_FCTTV(_i) (0x03200 + ((_i) * 4)) /* 4 of these (0-3) */ argument
[all …]
/openbmc/linux/arch/s390/include/asm/
H A Datomic.h48 #define arch_atomic_sub(_i, _v) arch_atomic_add(-(int)(_i), _v) argument
49 #define arch_atomic_sub_return(_i, _v) arch_atomic_add_return(-(int)(_i), _v) argument
50 #define arch_atomic_fetch_sub(_i, _v) arch_atomic_fetch_add(-(int)(_i), _v) argument
146 #define arch_atomic64_sub_return(_i, _v) arch_atomic64_add_return(-(s64)(_i), _v) argument
147 #define arch_atomic64_fetch_sub(_i, _v) arch_atomic64_fetch_add(-(s64)(_i), _v) argument
148 #define arch_atomic64_sub(_i, _v) arch_atomic64_add(-(s64)(_i), _v) argument
/openbmc/qemu/include/hw/
H A Dloader.h340 #define rom_add_file_fixed(_f, _a, _i) \ argument
344 #define rom_add_file_mr(_f, _mr, _i) \ argument
346 #define rom_add_file_as(_f, _as, _i) \ argument
348 #define rom_add_file_fixed_as(_f, _a, _i, _as) \ argument
/openbmc/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_csr.h21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000)) argument
29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400)) argument
33 #define PEM_BIST_STATUSX(_i) (0x1080468 | ((_i) << 18)) argument
36 #define EMU_SE_ENABLEX(_i) (0x1400000 + ((_i) * 0x40000)) argument
37 #define EMU_AE_ENABLEX(_i) (0x1400008 + ((_i) * 0x40000)) argument
38 #define EMU_WD_INT_ENA_W1SX(_i) (0x1402318 + ((_i) * 0x40000)) argument
39 #define EMU_GE_INT_ENA_W1SX(_i) (0x1402518 + ((_i) * 0x40000)) argument
40 #define EMU_FUSE_MAPX(_i) (0x1402708 + ((_i) * 0x40000)) argument
43 #define UCD_SE_EID_UCODE_BLOCK_NUMX(_i) (0x12C0000 + ((_i) * 0x1000)) argument
44 #define UCD_AE_EID_UCODE_BLOCK_NUMX(_i) (0x12C0008 + ((_i) * 0x800)) argument
[all …]
/openbmc/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_register.h58 #define IAVF_VFINT_ITRN1(_i, _INTVF) (0x00002800 + ((_i) * 64 + (_INTVF) * 4)) /* _i=0...2, _INTVF=… argument
61 #define IAVF_VFQF_HENA(_i) (0x0000C400 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */ argument
62 #define IAVF_VFQF_HKEY(_i) (0x0000CC00 + ((_i) * 4)) /* _i=0...12 */ /* Reset: CORER */ argument
64 #define IAVF_VFQF_HLUT(_i) (0x0000D000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ argument
/openbmc/linux/drivers/net/ethernet/intel/igb/
H A De1000_regs.h286 #define E1000_PSRTYPE(_i) (0x05480 + ((_i) * 4)) argument
287 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
289 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
292 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8)) argument
293 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4)) argument
294 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4)) argument
295 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8)) argument
296 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8)) argument
297 #define E1000_FFLT_REG(_i) (0x05F00 + ((_i) * 8)) argument
319 #define E1000_IMIR(_i) (0x05A80 + ((_i) * 4)) /* Immediate Interrupt */ argument
[all …]
/openbmc/linux/drivers/input/mouse/
H A Dalps.h92 #define SS4_MF_LF_V2(_b, _i) ((_b[1 + (_i) * 3] & 0x0004) == 0x0004) argument
96 #define SS4_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 5) & 0x00E0) | \ argument
100 #define SS4_PLUS_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 4) & 0x0070) | \ argument
104 #define SS4_STD_MF_Y_V2(_b, _i) (((_b[1 + (_i) * 3] << 3) & 0x0010) | \ argument
109 #define SS4_BTL_MF_X_V2(_b, _i) (SS4_STD_MF_X_V2(_b, _i) | \ argument
113 #define SS4_PLUS_BTL_MF_X_V2(_b, _i) (SS4_PLUS_STD_MF_X_V2(_b, _i) | \ argument
117 #define SS4_BTL_MF_Y_V2(_b, _i) (SS4_STD_MF_Y_V2(_b, _i) | \ argument
121 #define SS4_MF_Z_V2(_b, _i) (((_b[1 + (_i) * 3]) & 0x0001) | \ argument
/openbmc/linux/drivers/net/ethernet/wangxun/libwx/
H A Dwx_type.h25 #define WX_MIS_RST_LAN_RST(_i) BIT((_i) + 1) argument
68 #define WX_CFG_TAG_TPID(_i) (0x14430 + ((_i) * 4)) argument
95 #define WX_TDM_PB_THRE(_i) (0x18020 + ((_i) * 4)) argument
104 #define WX_RDB_PB_SZ(_i) (0x19020 + ((_i) * 4)) argument
110 #define WX_RDB_PL_CFG(_i) (0x19300 + ((_i) * 4)) argument
140 #define WX_PSR_MC_TBL(_i) (0x15200 + ((_i) * 4)) argument
141 #define WX_PSR_UC_TBL(_i) (0x15400 + ((_i) * 4)) argument
144 #define WX_PSR_VM_L2CTL(_i) (0x15600 + ((_i) * 4)) argument
155 #define WX_PSR_MNG_FLEX_DW_L(_i) (0x15A00 + ((_i) * 16)) argument
156 #define WX_PSR_MNG_FLEX_DW_H(_i) (0x15A04 + ((_i) * 16)) argument
[all …]
/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.h47 #define E1000_SHRAL_PCH_LPT(_i) (0x05408 + ((_i) * 8)) argument
48 #define E1000_SHRAH_PCH_LPT(_i) (0x0540C + ((_i) * 8)) argument
125 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) argument
126 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) argument
127 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) argument
128 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) argument
129 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) argument
H A Dregs.h108 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
110 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
112 #define E1000_SHRAL(_i) (0x05438 + ((_i) * 8)) argument
113 #define E1000_SHRAH(_i) (0x0543C + ((_i) * 8)) argument
224 #define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */ argument
225 #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */ argument
/openbmc/linux/drivers/gpu/drm/armada/
H A Darmada_crtc.h18 #define armada_reg_queue_mod(_r, _i, _v, _m, _o) \ argument
27 #define armada_reg_queue_set(_r, _i, _v, _o) \ argument
30 #define armada_reg_queue_end(_r, _i) \ argument
/openbmc/linux/drivers/net/ethernet/intel/igc/
H A Digc_regs.h92 #define IGC_RETA(_i) (0x05C00 + ((_i) * 4)) argument
94 #define IGC_RSSRK(_i) (0x05C80 + ((_i) * 4)) argument
99 #define IGC_PSRTYPE(_i) (0x05480 + ((_i) * 4)) argument
219 #define IGC_IMIR(_i) (0x05A80 + ((_i) * 4)) /* Immediate Interrupt */ argument
220 #define IGC_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/ argument
298 #define IGC_WUPM_REG(_i) (0x05A00 + ((_i) * 4)) argument
/openbmc/linux/drivers/net/ethernet/intel/igbvf/
H A Dregs.h55 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
57 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
/openbmc/linux/include/xen/interface/io/
H A Dring.h139 #define FRONT_RING_ATTACH(_r, _s, _i, __size) do { \ argument
153 #define BACK_RING_ATTACH(_r, _s, _i, __size) do { \ argument
/openbmc/linux/drivers/net/wireless/ath/carl9170/
H A Dphy.h185 #define AR9170_PHY_REG_TIMING_CTRL4(_i) (AR9170_PHY_REG_BASE + \ argument
308 #define AR9170_PHY_REG_NEW_ADC_DC_GAIN_CORR(_i) (AR9170_PHY_REG_BASE + \ argument
381 #define AR9170_PHY_REG_CAL_MEAS_0(_i) (AR9170_PHY_REG_BASE + \ argument
383 #define AR9170_PHY_REG_CAL_MEAS_1(_i) (AR9170_PHY_REG_BASE + \ argument
385 #define AR9170_PHY_REG_CAL_MEAS_2(_i) (AR9170_PHY_REG_BASE + \ argument
387 #define AR9170_PHY_REG_CAL_MEAS_3(_i) (AR9170_PHY_REG_BASE + \ argument
/openbmc/qemu/include/hw/xen/interface/io/
H A Dring.h160 #define FRONT_RING_ATTACH(_r, _s, _i, __size) do { \ argument
174 #define BACK_RING_ATTACH(_r, _s, _i, __size) do { \ argument

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