1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2014 Samsung Electronics Co., Ltd.
4 * Sylwester Nawrocki <s.nawrocki@samsung.com>
5 */
6
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/clk/clk-conf.h>
10 #include <linux/device.h>
11 #include <linux/of.h>
12 #include <linux/printk.h>
13
__set_clk_parents(struct device_node * node,bool clk_supplier)14 static int __set_clk_parents(struct device_node *node, bool clk_supplier)
15 {
16 struct of_phandle_args clkspec;
17 int index, rc, num_parents;
18 struct clk *clk, *pclk;
19
20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
21 "#clock-cells");
22 if (num_parents == -EINVAL)
23 pr_err("clk: invalid value of clock-parents property at %pOF\n",
24 node);
25
26 for (index = 0; index < num_parents; index++) {
27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
28 "#clock-cells", index, &clkspec);
29 if (rc < 0) {
30 /* skip empty (null) phandles */
31 if (rc == -ENOENT)
32 continue;
33 else
34 return rc;
35 }
36 if (clkspec.np == node && !clk_supplier) {
37 of_node_put(clkspec.np);
38 return 0;
39 }
40 pclk = of_clk_get_from_provider(&clkspec);
41 of_node_put(clkspec.np);
42 if (IS_ERR(pclk)) {
43 if (PTR_ERR(pclk) != -EPROBE_DEFER)
44 pr_warn("clk: couldn't get parent clock %d for %pOF\n",
45 index, node);
46 return PTR_ERR(pclk);
47 }
48
49 rc = of_parse_phandle_with_args(node, "assigned-clocks",
50 "#clock-cells", index, &clkspec);
51 if (rc < 0)
52 goto err;
53 if (clkspec.np == node && !clk_supplier) {
54 of_node_put(clkspec.np);
55 rc = 0;
56 goto err;
57 }
58 clk = of_clk_get_from_provider(&clkspec);
59 of_node_put(clkspec.np);
60 if (IS_ERR(clk)) {
61 if (PTR_ERR(clk) != -EPROBE_DEFER)
62 pr_warn("clk: couldn't get assigned clock %d for %pOF\n",
63 index, node);
64 rc = PTR_ERR(clk);
65 goto err;
66 }
67
68 rc = clk_set_parent(clk, pclk);
69 if (rc < 0)
70 pr_err("clk: failed to reparent %s to %s: %d\n",
71 __clk_get_name(clk), __clk_get_name(pclk), rc);
72 clk_put(clk);
73 clk_put(pclk);
74 }
75 return 0;
76 err:
77 clk_put(pclk);
78 return rc;
79 }
80
__set_clk_rates(struct device_node * node,bool clk_supplier)81 static int __set_clk_rates(struct device_node *node, bool clk_supplier)
82 {
83 struct of_phandle_args clkspec;
84 int rc, index = 0;
85 struct clk *clk;
86 u32 rate;
87
88 of_property_for_each_u32(node, "assigned-clock-rates", rate) {
89 if (rate) {
90 rc = of_parse_phandle_with_args(node, "assigned-clocks",
91 "#clock-cells", index, &clkspec);
92 if (rc < 0) {
93 /* skip empty (null) phandles */
94 if (rc == -ENOENT)
95 continue;
96 else
97 return rc;
98 }
99 if (clkspec.np == node && !clk_supplier) {
100 of_node_put(clkspec.np);
101 return 0;
102 }
103
104 clk = of_clk_get_from_provider(&clkspec);
105 of_node_put(clkspec.np);
106 if (IS_ERR(clk)) {
107 if (PTR_ERR(clk) != -EPROBE_DEFER)
108 pr_warn("clk: couldn't get clock %d for %pOF\n",
109 index, node);
110 return PTR_ERR(clk);
111 }
112
113 rc = clk_set_rate(clk, rate);
114 if (rc < 0)
115 pr_err("clk: couldn't set %s clk rate to %u (%d), current rate: %lu\n",
116 __clk_get_name(clk), rate, rc,
117 clk_get_rate(clk));
118 clk_put(clk);
119 }
120 index++;
121 }
122 return 0;
123 }
124
125 /**
126 * of_clk_set_defaults() - parse and set assigned clocks configuration
127 * @node: device node to apply clock settings for
128 * @clk_supplier: true if clocks supplied by @node should also be considered
129 *
130 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
131 * and sets any specified clock parents and rates. The @clk_supplier argument
132 * should be set to true if @node may be also a clock supplier of any clock
133 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
134 * If @clk_supplier is false the function exits returning 0 as soon as it
135 * determines the @node is also a supplier of any of the clocks.
136 */
of_clk_set_defaults(struct device_node * node,bool clk_supplier)137 int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
138 {
139 int rc;
140
141 if (!node)
142 return 0;
143
144 rc = __set_clk_parents(node, clk_supplier);
145 if (rc < 0)
146 return rc;
147
148 return __set_clk_rates(node, clk_supplier);
149 }
150 EXPORT_SYMBOL_GPL(of_clk_set_defaults);
151