1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * 8250_dma.c - DMA Engine API support for 8250.c
4 *
5 * Copyright (C) 2013 Intel Corporation
6 */
7 #include <linux/tty.h>
8 #include <linux/tty_flip.h>
9 #include <linux/serial_reg.h>
10 #include <linux/dma-mapping.h>
11
12 #include "8250.h"
13
__dma_tx_complete(void * param)14 static void __dma_tx_complete(void *param)
15 {
16 struct uart_8250_port *p = param;
17 struct uart_8250_dma *dma = p->dma;
18 struct circ_buf *xmit = &p->port.state->xmit;
19 unsigned long flags;
20 int ret;
21
22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
23 UART_XMIT_SIZE, DMA_TO_DEVICE);
24
25 spin_lock_irqsave(&p->port.lock, flags);
26
27 dma->tx_running = 0;
28
29 uart_xmit_advance(&p->port, dma->tx_size);
30
31 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
32 uart_write_wakeup(&p->port);
33
34 ret = serial8250_tx_dma(p);
35 if (ret || !dma->tx_running)
36 serial8250_set_THRI(p);
37
38 spin_unlock_irqrestore(&p->port.lock, flags);
39 }
40
__dma_rx_complete(struct uart_8250_port * p)41 static void __dma_rx_complete(struct uart_8250_port *p)
42 {
43 struct uart_8250_dma *dma = p->dma;
44 struct tty_port *tty_port = &p->port.state->port;
45 struct dma_tx_state state;
46 enum dma_status dma_status;
47 int count;
48
49 /*
50 * New DMA Rx can be started during the completion handler before it
51 * could acquire port's lock and it might still be ongoing. Don't to
52 * anything in such case.
53 */
54 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
55 if (dma_status == DMA_IN_PROGRESS)
56 return;
57
58 count = dma->rx_size - state.residue;
59
60 tty_insert_flip_string(tty_port, dma->rx_buf, count);
61 p->port.icount.rx += count;
62 dma->rx_running = 0;
63
64 tty_flip_buffer_push(tty_port);
65 }
66
dma_rx_complete(void * param)67 static void dma_rx_complete(void *param)
68 {
69 struct uart_8250_port *p = param;
70 struct uart_8250_dma *dma = p->dma;
71 unsigned long flags;
72
73 spin_lock_irqsave(&p->port.lock, flags);
74 if (dma->rx_running)
75 __dma_rx_complete(p);
76
77 /*
78 * Cannot be combined with the previous check because __dma_rx_complete()
79 * changes dma->rx_running.
80 */
81 if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))
82 p->dma->rx_dma(p);
83 spin_unlock_irqrestore(&p->port.lock, flags);
84 }
85
serial8250_tx_dma(struct uart_8250_port * p)86 int serial8250_tx_dma(struct uart_8250_port *p)
87 {
88 struct uart_8250_dma *dma = p->dma;
89 struct circ_buf *xmit = &p->port.state->xmit;
90 struct dma_async_tx_descriptor *desc;
91 struct uart_port *up = &p->port;
92 int ret;
93
94 if (dma->tx_running) {
95 if (up->x_char) {
96 dmaengine_pause(dma->txchan);
97 uart_xchar_out(up, UART_TX);
98 dmaengine_resume(dma->txchan);
99 }
100 return 0;
101 } else if (up->x_char) {
102 uart_xchar_out(up, UART_TX);
103 }
104
105 if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) {
106 /* We have been called from __dma_tx_complete() */
107 return 0;
108 }
109
110 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
111
112 serial8250_do_prepare_tx_dma(p);
113
114 desc = dmaengine_prep_slave_single(dma->txchan,
115 dma->tx_addr + xmit->tail,
116 dma->tx_size, DMA_MEM_TO_DEV,
117 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
118 if (!desc) {
119 ret = -EBUSY;
120 goto err;
121 }
122
123 dma->tx_running = 1;
124 desc->callback = __dma_tx_complete;
125 desc->callback_param = p;
126
127 dma->tx_cookie = dmaengine_submit(desc);
128
129 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
130 UART_XMIT_SIZE, DMA_TO_DEVICE);
131
132 dma_async_issue_pending(dma->txchan);
133 serial8250_clear_THRI(p);
134 dma->tx_err = 0;
135
136 return 0;
137 err:
138 dma->tx_err = 1;
139 return ret;
140 }
141
serial8250_rx_dma(struct uart_8250_port * p)142 int serial8250_rx_dma(struct uart_8250_port *p)
143 {
144 struct uart_8250_dma *dma = p->dma;
145 struct dma_async_tx_descriptor *desc;
146
147 if (dma->rx_running)
148 return 0;
149
150 serial8250_do_prepare_rx_dma(p);
151
152 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
153 dma->rx_size, DMA_DEV_TO_MEM,
154 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
155 if (!desc)
156 return -EBUSY;
157
158 dma->rx_running = 1;
159 desc->callback = dma_rx_complete;
160 desc->callback_param = p;
161
162 dma->rx_cookie = dmaengine_submit(desc);
163
164 dma_async_issue_pending(dma->rxchan);
165
166 return 0;
167 }
168
serial8250_rx_dma_flush(struct uart_8250_port * p)169 void serial8250_rx_dma_flush(struct uart_8250_port *p)
170 {
171 struct uart_8250_dma *dma = p->dma;
172
173 if (dma->rx_running) {
174 dmaengine_pause(dma->rxchan);
175 __dma_rx_complete(p);
176 dmaengine_terminate_async(dma->rxchan);
177 }
178 }
179 EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);
180
serial8250_request_dma(struct uart_8250_port * p)181 int serial8250_request_dma(struct uart_8250_port *p)
182 {
183 struct uart_8250_dma *dma = p->dma;
184 phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
185 dma->rx_dma_addr : p->port.mapbase;
186 phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
187 dma->tx_dma_addr : p->port.mapbase;
188 dma_cap_mask_t mask;
189 struct dma_slave_caps caps;
190 int ret;
191
192 /* Default slave configuration parameters */
193 dma->rxconf.direction = DMA_DEV_TO_MEM;
194 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
195 dma->rxconf.src_addr = rx_dma_addr + UART_RX;
196
197 dma->txconf.direction = DMA_MEM_TO_DEV;
198 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
199 dma->txconf.dst_addr = tx_dma_addr + UART_TX;
200
201 dma_cap_zero(mask);
202 dma_cap_set(DMA_SLAVE, mask);
203
204 /* Get a channel for RX */
205 dma->rxchan = dma_request_slave_channel_compat(mask,
206 dma->fn, dma->rx_param,
207 p->port.dev, "rx");
208 if (!dma->rxchan)
209 return -ENODEV;
210
211 /* 8250 rx dma requires dmaengine driver to support pause/terminate */
212 ret = dma_get_slave_caps(dma->rxchan, &caps);
213 if (ret)
214 goto release_rx;
215 if (!caps.cmd_pause || !caps.cmd_terminate ||
216 caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
217 ret = -EINVAL;
218 goto release_rx;
219 }
220
221 dmaengine_slave_config(dma->rxchan, &dma->rxconf);
222
223 /* Get a channel for TX */
224 dma->txchan = dma_request_slave_channel_compat(mask,
225 dma->fn, dma->tx_param,
226 p->port.dev, "tx");
227 if (!dma->txchan) {
228 ret = -ENODEV;
229 goto release_rx;
230 }
231
232 /* 8250 tx dma requires dmaengine driver to support terminate */
233 ret = dma_get_slave_caps(dma->txchan, &caps);
234 if (ret)
235 goto err;
236 if (!caps.cmd_terminate) {
237 ret = -EINVAL;
238 goto err;
239 }
240
241 dmaengine_slave_config(dma->txchan, &dma->txconf);
242
243 /* RX buffer */
244 if (!dma->rx_size)
245 dma->rx_size = PAGE_SIZE;
246
247 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
248 &dma->rx_addr, GFP_KERNEL);
249 if (!dma->rx_buf) {
250 ret = -ENOMEM;
251 goto err;
252 }
253
254 /* TX buffer */
255 dma->tx_addr = dma_map_single(dma->txchan->device->dev,
256 p->port.state->xmit.buf,
257 UART_XMIT_SIZE,
258 DMA_TO_DEVICE);
259 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
260 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
261 dma->rx_buf, dma->rx_addr);
262 ret = -ENOMEM;
263 goto err;
264 }
265
266 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
267
268 return 0;
269 err:
270 dma_release_channel(dma->txchan);
271 release_rx:
272 dma_release_channel(dma->rxchan);
273 return ret;
274 }
275 EXPORT_SYMBOL_GPL(serial8250_request_dma);
276
serial8250_release_dma(struct uart_8250_port * p)277 void serial8250_release_dma(struct uart_8250_port *p)
278 {
279 struct uart_8250_dma *dma = p->dma;
280
281 if (!dma)
282 return;
283
284 /* Release RX resources */
285 dmaengine_terminate_sync(dma->rxchan);
286 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
287 dma->rx_addr);
288 dma_release_channel(dma->rxchan);
289 dma->rxchan = NULL;
290
291 /* Release TX resources */
292 dmaengine_terminate_sync(dma->txchan);
293 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
294 UART_XMIT_SIZE, DMA_TO_DEVICE);
295 dma_release_channel(dma->txchan);
296 dma->txchan = NULL;
297 dma->tx_running = 0;
298
299 dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
300 }
301 EXPORT_SYMBOL_GPL(serial8250_release_dma);
302