xref: /openbmc/linux/drivers/phy/renesas/phy-rcar-gen3-usb2.c (revision 4d75f5c664195b970e1cd2fd25b65b5eff257a0a)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Renesas R-Car Gen3 for USB2.0 PHY driver
4  *
5  * Copyright (C) 2015-2017 Renesas Electronics Corporation
6  *
7  * This is based on the phy-rcar-gen2 driver:
8  * Copyright (C) 2014 Renesas Solutions Corp.
9  * Copyright (C) 2014 Cogent Embedded, Inc.
10  */
11 
12 #include <linux/cleanup.h>
13 #include <linux/extcon-provider.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of.h>
19 #include <linux/phy/phy.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/reset.h>
24 #include <linux/string.h>
25 #include <linux/usb/of.h>
26 #include <linux/workqueue.h>
27 
28 /******* USB2.0 Host registers (original offset is +0x200) *******/
29 #define USB2_INT_ENABLE		0x000
30 #define USB2_AHB_BUS_CTR	0x008
31 #define USB2_USBCTR		0x00c
32 #define USB2_SPD_RSM_TIMSET	0x10c
33 #define USB2_OC_TIMSET		0x110
34 #define USB2_COMMCTRL		0x600
35 #define USB2_OBINTSTA		0x604
36 #define USB2_OBINTEN		0x608
37 #define USB2_VBCTRL		0x60c
38 #define USB2_LINECTRL1		0x610
39 #define USB2_ADPCTRL		0x630
40 
41 /* INT_ENABLE */
42 #define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
43 #define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)	/* For EHCI */
44 #define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)	/* For OHCI */
45 
46 /* AHB_BUS_CTR */
47 #define USB2_AHB_BUS_CTR_MBL_MASK	GENMASK(1, 0)
48 #define USB2_AHB_BUS_CTR_MBL_INCR4	2
49 
50 /* USBCTR */
51 #define USB2_USBCTR_DIRPD	BIT(2)
52 #define USB2_USBCTR_PLL_RST	BIT(1)
53 
54 /* SPD_RSM_TIMSET */
55 #define USB2_SPD_RSM_TIMSET_INIT	0x014e029b
56 
57 /* OC_TIMSET */
58 #define USB2_OC_TIMSET_INIT		0x000209ab
59 
60 /* COMMCTRL */
61 #define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */
62 
63 /* OBINTSTA and OBINTEN */
64 #define USB2_OBINT_SESSVLDCHG		BIT(12)
65 #define USB2_OBINT_IDDIGCHG		BIT(11)
66 #define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
67 					 USB2_OBINT_IDDIGCHG)
68 
69 /* VBCTRL */
70 #define USB2_VBCTRL_OCCLREN		BIT(16)
71 #define USB2_VBCTRL_DRVVBUSSEL		BIT(8)
72 #define USB2_VBCTRL_VBOUT		BIT(0)
73 
74 /* LINECTRL1 */
75 #define USB2_LINECTRL1_DPRPD_EN		BIT(19)
76 #define USB2_LINECTRL1_DP_RPD		BIT(18)
77 #define USB2_LINECTRL1_DMRPD_EN		BIT(17)
78 #define USB2_LINECTRL1_DM_RPD		BIT(16)
79 #define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)
80 
81 /* ADPCTRL */
82 #define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
83 #define USB2_ADPCTRL_IDDIG		BIT(19)
84 #define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
85 #define USB2_ADPCTRL_DRVVBUS		BIT(4)
86 
87 /*  RZ/G2L specific */
88 #define USB2_OBINT_IDCHG_EN		BIT(0)
89 #define USB2_LINECTRL1_USB2_IDMON	BIT(0)
90 
91 #define NUM_OF_PHYS			4
92 enum rcar_gen3_phy_index {
93 	PHY_INDEX_BOTH_HC,
94 	PHY_INDEX_OHCI,
95 	PHY_INDEX_EHCI,
96 	PHY_INDEX_HSUSB
97 };
98 
99 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
100 	USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
101 	USB2_INT_ENABLE_USBH_INTA_EN,
102 	USB2_INT_ENABLE_USBH_INTB_EN,
103 	0
104 };
105 
106 struct rcar_gen3_phy {
107 	struct phy *phy;
108 	struct rcar_gen3_chan *ch;
109 	u32 int_enable_bits;
110 	bool initialized;
111 	bool powered;
112 };
113 
114 struct rcar_gen3_chan {
115 	void __iomem *base;
116 	struct device *dev;	/* platform_device's device */
117 	struct extcon_dev *extcon;
118 	struct rcar_gen3_phy rphys[NUM_OF_PHYS];
119 	struct regulator *vbus;
120 	struct reset_control *rstc;
121 	struct work_struct work;
122 	spinlock_t lock;	/* protects access to hardware and driver data structure. */
123 	enum usb_dr_mode dr_mode;
124 	u32 obint_enable_bits;
125 	bool extcon_host;
126 	bool is_otg_channel;
127 	bool uses_otg_pins;
128 	bool soc_no_adp_ctrl;
129 };
130 
131 struct rcar_gen3_phy_drv_data {
132 	const struct phy_ops *phy_usb2_ops;
133 	bool no_adp_ctrl;
134 	bool init_bus;
135 };
136 
137 /*
138  * Combination about is_otg_channel and uses_otg_pins:
139  *
140  * Parameters				|| Behaviors
141  * is_otg_channel	| uses_otg_pins	|| irqs		| role sysfs
142  * ---------------------+---------------++--------------+------------
143  * true			| true		|| enabled	| enabled
144  * true                 | false		|| disabled	| enabled
145  * false                | any		|| disabled	| disabled
146  */
147 
rcar_gen3_phy_usb2_work(struct work_struct * work)148 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
149 {
150 	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
151 						 work);
152 
153 	if (ch->extcon_host) {
154 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
155 		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
156 	} else {
157 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
158 		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
159 	}
160 }
161 
rcar_gen3_set_host_mode(struct rcar_gen3_chan * ch,int host)162 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
163 {
164 	void __iomem *usb2_base = ch->base;
165 	u32 val = readl(usb2_base + USB2_COMMCTRL);
166 
167 	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
168 	if (host)
169 		val &= ~USB2_COMMCTRL_OTG_PERI;
170 	else
171 		val |= USB2_COMMCTRL_OTG_PERI;
172 	writel(val, usb2_base + USB2_COMMCTRL);
173 }
174 
rcar_gen3_set_linectrl(struct rcar_gen3_chan * ch,int dp,int dm)175 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
176 {
177 	void __iomem *usb2_base = ch->base;
178 	u32 val = readl(usb2_base + USB2_LINECTRL1);
179 
180 	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
181 	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
182 	if (dp)
183 		val |= USB2_LINECTRL1_DP_RPD;
184 	if (dm)
185 		val |= USB2_LINECTRL1_DM_RPD;
186 	writel(val, usb2_base + USB2_LINECTRL1);
187 }
188 
rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan * ch,int vbus)189 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
190 {
191 	void __iomem *usb2_base = ch->base;
192 	u32 vbus_ctrl_reg = USB2_ADPCTRL;
193 	u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
194 	u32 val;
195 
196 	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
197 	if (ch->soc_no_adp_ctrl) {
198 		vbus_ctrl_reg = USB2_VBCTRL;
199 		vbus_ctrl_val = USB2_VBCTRL_VBOUT;
200 	}
201 
202 	val = readl(usb2_base + vbus_ctrl_reg);
203 	if (vbus)
204 		val |= vbus_ctrl_val;
205 	else
206 		val &= ~vbus_ctrl_val;
207 	writel(val, usb2_base + vbus_ctrl_reg);
208 }
209 
rcar_gen3_control_otg_irq(struct rcar_gen3_chan * ch,int enable)210 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
211 {
212 	void __iomem *usb2_base = ch->base;
213 	u32 val = readl(usb2_base + USB2_OBINTEN);
214 
215 	if (ch->uses_otg_pins && enable)
216 		val |= ch->obint_enable_bits;
217 	else
218 		val &= ~ch->obint_enable_bits;
219 	writel(val, usb2_base + USB2_OBINTEN);
220 }
221 
rcar_gen3_init_for_host(struct rcar_gen3_chan * ch)222 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
223 {
224 	rcar_gen3_set_linectrl(ch, 1, 1);
225 	rcar_gen3_set_host_mode(ch, 1);
226 	rcar_gen3_enable_vbus_ctrl(ch, 1);
227 
228 	ch->extcon_host = true;
229 	schedule_work(&ch->work);
230 }
231 
rcar_gen3_init_for_peri(struct rcar_gen3_chan * ch)232 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
233 {
234 	rcar_gen3_set_linectrl(ch, 0, 1);
235 	rcar_gen3_set_host_mode(ch, 0);
236 	rcar_gen3_enable_vbus_ctrl(ch, 0);
237 
238 	ch->extcon_host = false;
239 	schedule_work(&ch->work);
240 }
241 
rcar_gen3_init_for_b_host(struct rcar_gen3_chan * ch)242 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
243 {
244 	void __iomem *usb2_base = ch->base;
245 	u32 val;
246 
247 	val = readl(usb2_base + USB2_LINECTRL1);
248 	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
249 
250 	rcar_gen3_set_linectrl(ch, 1, 1);
251 	rcar_gen3_set_host_mode(ch, 1);
252 	rcar_gen3_enable_vbus_ctrl(ch, 0);
253 
254 	val = readl(usb2_base + USB2_LINECTRL1);
255 	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
256 }
257 
rcar_gen3_init_for_a_peri(struct rcar_gen3_chan * ch)258 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
259 {
260 	rcar_gen3_set_linectrl(ch, 0, 1);
261 	rcar_gen3_set_host_mode(ch, 0);
262 	rcar_gen3_enable_vbus_ctrl(ch, 1);
263 }
264 
rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan * ch)265 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
266 {
267 	rcar_gen3_control_otg_irq(ch, 0);
268 
269 	rcar_gen3_enable_vbus_ctrl(ch, 1);
270 	rcar_gen3_init_for_host(ch);
271 
272 	rcar_gen3_control_otg_irq(ch, 1);
273 }
274 
rcar_gen3_check_id(struct rcar_gen3_chan * ch)275 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
276 {
277 	if (!ch->uses_otg_pins)
278 		return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
279 
280 	if (ch->soc_no_adp_ctrl)
281 		return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
282 
283 	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
284 }
285 
rcar_gen3_device_recognition(struct rcar_gen3_chan * ch)286 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
287 {
288 	if (!rcar_gen3_check_id(ch))
289 		rcar_gen3_init_for_host(ch);
290 	else
291 		rcar_gen3_init_for_peri(ch);
292 }
293 
rcar_gen3_is_host(struct rcar_gen3_chan * ch)294 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
295 {
296 	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
297 }
298 
rcar_gen3_get_phy_mode(struct rcar_gen3_chan * ch)299 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
300 {
301 	if (rcar_gen3_is_host(ch))
302 		return PHY_MODE_USB_HOST;
303 
304 	return PHY_MODE_USB_DEVICE;
305 }
306 
rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan * ch)307 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
308 {
309 	int i;
310 
311 	for (i = 0; i < NUM_OF_PHYS; i++) {
312 		if (ch->rphys[i].initialized)
313 			return true;
314 	}
315 
316 	return false;
317 }
318 
rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan * ch)319 static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch)
320 {
321 	for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI;
322 	     i++) {
323 		if (ch->rphys[i].initialized)
324 			return true;
325 	}
326 
327 	return false;
328 }
329 
rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan * ch)330 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
331 {
332 	int i;
333 
334 	for (i = 0; i < NUM_OF_PHYS; i++) {
335 		if (ch->rphys[i].powered)
336 			return false;
337 	}
338 
339 	return true;
340 }
341 
role_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)342 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
343 			  const char *buf, size_t count)
344 {
345 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
346 	bool is_b_device;
347 	enum phy_mode cur_mode, new_mode;
348 
349 	guard(spinlock_irqsave)(&ch->lock);
350 
351 	if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
352 		return -EIO;
353 
354 	if (sysfs_streq(buf, "host"))
355 		new_mode = PHY_MODE_USB_HOST;
356 	else if (sysfs_streq(buf, "peripheral"))
357 		new_mode = PHY_MODE_USB_DEVICE;
358 	else
359 		return -EINVAL;
360 
361 	/* is_b_device: true is B-Device. false is A-Device. */
362 	is_b_device = rcar_gen3_check_id(ch);
363 	cur_mode = rcar_gen3_get_phy_mode(ch);
364 
365 	/* If current and new mode is the same, this returns the error */
366 	if (cur_mode == new_mode)
367 		return -EINVAL;
368 
369 	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
370 		if (!is_b_device)	/* A-Peripheral */
371 			rcar_gen3_init_from_a_peri_to_a_host(ch);
372 		else			/* B-Peripheral */
373 			rcar_gen3_init_for_b_host(ch);
374 	} else {			/* And is_host must be true */
375 		if (!is_b_device)	/* A-Host */
376 			rcar_gen3_init_for_a_peri(ch);
377 		else			/* B-Host */
378 			rcar_gen3_init_for_peri(ch);
379 	}
380 
381 	return count;
382 }
383 
role_show(struct device * dev,struct device_attribute * attr,char * buf)384 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
385 			 char *buf)
386 {
387 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
388 
389 	if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
390 		return -EIO;
391 
392 	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
393 							    "peripheral");
394 }
395 static DEVICE_ATTR_RW(role);
396 
rcar_gen3_init_otg(struct rcar_gen3_chan * ch)397 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
398 {
399 	void __iomem *usb2_base = ch->base;
400 	u32 val;
401 
402 	if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch))
403 		return;
404 
405 	/* Should not use functions of read-modify-write a register */
406 	val = readl(usb2_base + USB2_LINECTRL1);
407 	val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
408 	      USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
409 	writel(val, usb2_base + USB2_LINECTRL1);
410 
411 	if (!ch->soc_no_adp_ctrl) {
412 		val = readl(usb2_base + USB2_VBCTRL);
413 		val &= ~USB2_VBCTRL_OCCLREN;
414 		writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
415 		val = readl(usb2_base + USB2_ADPCTRL);
416 		writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
417 	}
418 	mdelay(20);
419 
420 	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
421 	writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
422 
423 	rcar_gen3_device_recognition(ch);
424 }
425 
rcar_gen3_phy_usb2_irq(int irq,void * _ch)426 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
427 {
428 	struct rcar_gen3_chan *ch = _ch;
429 	void __iomem *usb2_base = ch->base;
430 	struct device *dev = ch->dev;
431 	irqreturn_t ret = IRQ_NONE;
432 	u32 status;
433 
434 	pm_runtime_get_noresume(dev);
435 
436 	if (pm_runtime_suspended(dev))
437 		goto rpm_put;
438 
439 	scoped_guard(spinlock, &ch->lock) {
440 		status = readl(usb2_base + USB2_OBINTSTA);
441 		if (status & ch->obint_enable_bits) {
442 			dev_vdbg(dev, "%s: %08x\n", __func__, status);
443 			writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
444 			rcar_gen3_device_recognition(ch);
445 			ret = IRQ_HANDLED;
446 		}
447 	}
448 
449 rpm_put:
450 	pm_runtime_put_noidle(dev);
451 	return ret;
452 }
453 
rcar_gen3_phy_usb2_init(struct phy * p)454 static int rcar_gen3_phy_usb2_init(struct phy *p)
455 {
456 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
457 	struct rcar_gen3_chan *channel = rphy->ch;
458 	void __iomem *usb2_base = channel->base;
459 	u32 val;
460 
461 	guard(spinlock_irqsave)(&channel->lock);
462 
463 	/* Initialize USB2 part */
464 	val = readl(usb2_base + USB2_INT_ENABLE);
465 	val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
466 	writel(val, usb2_base + USB2_INT_ENABLE);
467 
468 	if (!rcar_gen3_is_any_rphy_initialized(channel)) {
469 		writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
470 		writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
471 	}
472 
473 	/* Initialize otg part (only if we initialize a PHY with IRQs). */
474 	if (rphy->int_enable_bits)
475 		rcar_gen3_init_otg(channel);
476 
477 	rphy->initialized = true;
478 
479 	return 0;
480 }
481 
rcar_gen3_phy_usb2_exit(struct phy * p)482 static int rcar_gen3_phy_usb2_exit(struct phy *p)
483 {
484 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
485 	struct rcar_gen3_chan *channel = rphy->ch;
486 	void __iomem *usb2_base = channel->base;
487 	u32 val;
488 
489 	guard(spinlock_irqsave)(&channel->lock);
490 
491 	rphy->initialized = false;
492 
493 	val = readl(usb2_base + USB2_INT_ENABLE);
494 	val &= ~rphy->int_enable_bits;
495 	if (!rcar_gen3_is_any_rphy_initialized(channel))
496 		val &= ~USB2_INT_ENABLE_UCOM_INTEN;
497 	writel(val, usb2_base + USB2_INT_ENABLE);
498 
499 	return 0;
500 }
501 
rcar_gen3_phy_usb2_power_on(struct phy * p)502 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
503 {
504 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
505 	struct rcar_gen3_chan *channel = rphy->ch;
506 	void __iomem *usb2_base = channel->base;
507 	u32 val;
508 	int ret = 0;
509 
510 	if (channel->vbus) {
511 		ret = regulator_enable(channel->vbus);
512 		if (ret)
513 			return ret;
514 	}
515 
516 	guard(spinlock_irqsave)(&channel->lock);
517 
518 	if (!rcar_gen3_are_all_rphys_power_off(channel))
519 		goto out;
520 
521 	val = readl(usb2_base + USB2_USBCTR);
522 	val |= USB2_USBCTR_PLL_RST;
523 	writel(val, usb2_base + USB2_USBCTR);
524 	val &= ~USB2_USBCTR_PLL_RST;
525 	writel(val, usb2_base + USB2_USBCTR);
526 
527 out:
528 	/* The powered flag should be set for any other phys anyway */
529 	rphy->powered = true;
530 
531 	return 0;
532 }
533 
rcar_gen3_phy_usb2_power_off(struct phy * p)534 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
535 {
536 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
537 	struct rcar_gen3_chan *channel = rphy->ch;
538 	int ret = 0;
539 
540 	scoped_guard(spinlock_irqsave, &channel->lock) {
541 		rphy->powered = false;
542 
543 		if (rcar_gen3_are_all_rphys_power_off(channel)) {
544 			u32 val = readl(channel->base + USB2_USBCTR);
545 
546 			val |= USB2_USBCTR_PLL_RST;
547 			writel(val, channel->base + USB2_USBCTR);
548 		}
549 	}
550 
551 	if (channel->vbus)
552 		ret = regulator_disable(channel->vbus);
553 
554 	return ret;
555 }
556 
557 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
558 	.init		= rcar_gen3_phy_usb2_init,
559 	.exit		= rcar_gen3_phy_usb2_exit,
560 	.power_on	= rcar_gen3_phy_usb2_power_on,
561 	.power_off	= rcar_gen3_phy_usb2_power_off,
562 	.owner		= THIS_MODULE,
563 };
564 
565 static const struct phy_ops rz_g1c_phy_usb2_ops = {
566 	.init		= rcar_gen3_phy_usb2_init,
567 	.exit		= rcar_gen3_phy_usb2_exit,
568 	.owner		= THIS_MODULE,
569 };
570 
571 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
572 	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
573 	.no_adp_ctrl = false,
574 };
575 
576 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
577 	.phy_usb2_ops = &rz_g1c_phy_usb2_ops,
578 	.no_adp_ctrl = false,
579 };
580 
581 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
582 	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
583 	.no_adp_ctrl = true,
584 };
585 
586 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
587 	{
588 		.compatible = "renesas,usb2-phy-r8a77470",
589 		.data = &rz_g1c_phy_usb2_data,
590 	},
591 	{
592 		.compatible = "renesas,usb2-phy-r8a7795",
593 		.data = &rcar_gen3_phy_usb2_data,
594 	},
595 	{
596 		.compatible = "renesas,usb2-phy-r8a7796",
597 		.data = &rcar_gen3_phy_usb2_data,
598 	},
599 	{
600 		.compatible = "renesas,usb2-phy-r8a77965",
601 		.data = &rcar_gen3_phy_usb2_data,
602 	},
603 	{
604 		.compatible = "renesas,rzg2l-usb2-phy",
605 		.data = &rz_g2l_phy_usb2_data,
606 	},
607 	{
608 		.compatible = "renesas,rcar-gen3-usb2-phy",
609 		.data = &rcar_gen3_phy_usb2_data,
610 	},
611 	{ /* sentinel */ },
612 };
613 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
614 
615 static const unsigned int rcar_gen3_phy_cable[] = {
616 	EXTCON_USB,
617 	EXTCON_USB_HOST,
618 	EXTCON_NONE,
619 };
620 
rcar_gen3_phy_usb2_xlate(struct device * dev,struct of_phandle_args * args)621 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
622 					    struct of_phandle_args *args)
623 {
624 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
625 
626 	if (args->args_count == 0)	/* For old version dts */
627 		return ch->rphys[PHY_INDEX_BOTH_HC].phy;
628 	else if (args->args_count > 1)	/* Prevent invalid args count */
629 		return ERR_PTR(-ENODEV);
630 
631 	if (args->args[0] >= NUM_OF_PHYS)
632 		return ERR_PTR(-ENODEV);
633 
634 	return ch->rphys[args->args[0]].phy;
635 }
636 
rcar_gen3_get_dr_mode(struct device_node * np)637 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
638 {
639 	enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
640 	int i;
641 
642 	/*
643 	 * If one of device nodes has other dr_mode except UNKNOWN,
644 	 * this function returns UNKNOWN. To achieve backward compatibility,
645 	 * this loop starts the index as 0.
646 	 */
647 	for (i = 0; i < NUM_OF_PHYS; i++) {
648 		enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
649 
650 		if (mode != USB_DR_MODE_UNKNOWN) {
651 			if (candidate == USB_DR_MODE_UNKNOWN)
652 				candidate = mode;
653 			else if (candidate != mode)
654 				return USB_DR_MODE_UNKNOWN;
655 		}
656 	}
657 
658 	return candidate;
659 }
660 
rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan * channel)661 static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
662 {
663 	struct device *dev = channel->dev;
664 	int ret;
665 	u32 val;
666 
667 	channel->rstc = devm_reset_control_array_get_shared(dev);
668 	if (IS_ERR(channel->rstc))
669 		return PTR_ERR(channel->rstc);
670 
671 	ret = pm_runtime_resume_and_get(dev);
672 	if (ret)
673 		return ret;
674 
675 	ret = reset_control_deassert(channel->rstc);
676 	if (ret)
677 		goto rpm_put;
678 
679 	val = readl(channel->base + USB2_AHB_BUS_CTR);
680 	val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
681 	val |= USB2_AHB_BUS_CTR_MBL_INCR4;
682 	writel(val, channel->base + USB2_AHB_BUS_CTR);
683 
684 rpm_put:
685 	pm_runtime_put(dev);
686 
687 	return ret;
688 }
689 
rcar_gen3_phy_usb2_probe(struct platform_device * pdev)690 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
691 {
692 	const struct rcar_gen3_phy_drv_data *phy_data;
693 	struct device *dev = &pdev->dev;
694 	struct rcar_gen3_chan *channel;
695 	struct phy_provider *provider;
696 	int ret = 0, i, irq;
697 
698 	if (!dev->of_node) {
699 		dev_err(dev, "This driver needs device tree\n");
700 		return -EINVAL;
701 	}
702 
703 	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
704 	if (!channel)
705 		return -ENOMEM;
706 
707 	channel->base = devm_platform_ioremap_resource(pdev, 0);
708 	if (IS_ERR(channel->base))
709 		return PTR_ERR(channel->base);
710 
711 	channel->obint_enable_bits = USB2_OBINT_BITS;
712 	channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
713 	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
714 		channel->is_otg_channel = true;
715 		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
716 							"renesas,no-otg-pins");
717 		channel->extcon = devm_extcon_dev_allocate(dev,
718 							rcar_gen3_phy_cable);
719 		if (IS_ERR(channel->extcon))
720 			return PTR_ERR(channel->extcon);
721 
722 		ret = devm_extcon_dev_register(dev, channel->extcon);
723 		if (ret < 0) {
724 			dev_err(dev, "Failed to register extcon\n");
725 			return ret;
726 		}
727 	}
728 
729 	/*
730 	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
731 	 * And then, phy-core will manage runtime pm for this device.
732 	 */
733 	pm_runtime_enable(dev);
734 
735 	phy_data = of_device_get_match_data(dev);
736 	if (!phy_data) {
737 		ret = -EINVAL;
738 		goto error;
739 	}
740 
741 	platform_set_drvdata(pdev, channel);
742 	channel->dev = dev;
743 
744 	if (phy_data->init_bus) {
745 		ret = rcar_gen3_phy_usb2_init_bus(channel);
746 		if (ret)
747 			goto error;
748 	}
749 
750 	channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
751 	if (phy_data->no_adp_ctrl)
752 		channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
753 
754 	spin_lock_init(&channel->lock);
755 	for (i = 0; i < NUM_OF_PHYS; i++) {
756 		channel->rphys[i].phy = devm_phy_create(dev, NULL,
757 							phy_data->phy_usb2_ops);
758 		if (IS_ERR(channel->rphys[i].phy)) {
759 			dev_err(dev, "Failed to create USB2 PHY\n");
760 			ret = PTR_ERR(channel->rphys[i].phy);
761 			goto error;
762 		}
763 		channel->rphys[i].ch = channel;
764 		channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
765 		phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
766 	}
767 
768 	channel->vbus = devm_regulator_get_optional(dev, "vbus");
769 	if (IS_ERR(channel->vbus)) {
770 		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
771 			ret = PTR_ERR(channel->vbus);
772 			goto error;
773 		}
774 		channel->vbus = NULL;
775 	}
776 
777 	irq = platform_get_irq_optional(pdev, 0);
778 	if (irq < 0 && irq != -ENXIO) {
779 		ret = irq;
780 		goto error;
781 	} else if (irq > 0) {
782 		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
783 		ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
784 				       IRQF_SHARED, dev_name(dev), channel);
785 		if (ret < 0) {
786 			dev_err(dev, "Failed to request irq (%d)\n", irq);
787 			goto error;
788 		}
789 	}
790 
791 	provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
792 	if (IS_ERR(provider)) {
793 		dev_err(dev, "Failed to register PHY provider\n");
794 		ret = PTR_ERR(provider);
795 		goto error;
796 	} else if (channel->is_otg_channel) {
797 		ret = device_create_file(dev, &dev_attr_role);
798 		if (ret < 0)
799 			goto error;
800 	}
801 
802 	return 0;
803 
804 error:
805 	pm_runtime_disable(dev);
806 
807 	return ret;
808 }
809 
rcar_gen3_phy_usb2_remove(struct platform_device * pdev)810 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
811 {
812 	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
813 
814 	if (channel->is_otg_channel)
815 		device_remove_file(&pdev->dev, &dev_attr_role);
816 
817 	reset_control_assert(channel->rstc);
818 	pm_runtime_disable(&pdev->dev);
819 };
820 
821 static struct platform_driver rcar_gen3_phy_usb2_driver = {
822 	.driver = {
823 		.name		= "phy_rcar_gen3_usb2",
824 		.of_match_table	= rcar_gen3_phy_usb2_match_table,
825 	},
826 	.probe	= rcar_gen3_phy_usb2_probe,
827 	.remove_new = rcar_gen3_phy_usb2_remove,
828 };
829 module_platform_driver(rcar_gen3_phy_usb2_driver);
830 
831 MODULE_LICENSE("GPL v2");
832 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
833 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
834