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Searched defs:TCG_TARGET_HAS_andc_i32 (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/tcg/arm/
H A Dtcg-target-has.h35 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target-has.h27 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/tci/
H A Dtcg-target-has.h18 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target-has.h46 #define TCG_TARGET_HAS_andc_i32 0 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-has.h26 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target-has.h32 #define TCG_TARGET_HAS_andc_i32 (cpuinfo & CPUINFO_ZBB) macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target-has.h32 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target-has.h32 #define TCG_TARGET_HAS_andc_i32 1 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target-has.h41 #define TCG_TARGET_HAS_andc_i32 HAVE_FACILITY(MISC_INSN_EXT3) macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target-has.h38 #define TCG_TARGET_HAS_andc_i32 have_bmi1 macro