xref: /openbmc/linux/arch/arm/mach-exynos/smc.h (revision 8dd06ef34b6e2f41b29fbf5fc1663780f2524285)
1  /* SPDX-License-Identifier: GPL-2.0 */
2  /*
3   *  Copyright (c) 2012 Samsung Electronics.
4   *
5   * Exynos - SMC Call
6   */
7  
8  #ifndef __ASM_ARCH_EXYNOS_SMC_H
9  #define __ASM_ARCH_EXYNOS_SMC_H
10  
11  #define SMC_CMD_INIT		(-1)
12  #define SMC_CMD_INFO		(-2)
13  /* For Power Management */
14  #define SMC_CMD_SLEEP		(-3)
15  #define SMC_CMD_CPU1BOOT	(-4)
16  #define SMC_CMD_CPU0AFTR	(-5)
17  #define SMC_CMD_SAVE		(-6)
18  #define SMC_CMD_SHUTDOWN	(-7)
19  /* For CP15 Access */
20  #define SMC_CMD_C15RESUME	(-11)
21  /* For L2 Cache Access */
22  #define SMC_CMD_L2X0CTRL	(-21)
23  #define SMC_CMD_L2X0SETUP1	(-22)
24  #define SMC_CMD_L2X0SETUP2	(-23)
25  #define SMC_CMD_L2X0INVALL	(-24)
26  #define SMC_CMD_L2X0DEBUG	(-25)
27  
28  /* For Accessing CP15/SFR (General) */
29  #define SMC_CMD_REG		(-101)
30  
31  /* defines for SMC_CMD_REG */
32  #define SMC_REG_CLASS_SFR_W	(0x1 << 30)
33  #define SMC_REG_ID_SFR_W(addr)	(SMC_REG_CLASS_SFR_W | ((addr) >> 2))
34  
35  #ifndef __ASSEMBLY__
36  
37  extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
38  
39  #endif /* __ASSEMBLY__ */
40  
41  /* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
42  #define OP_TYPE_CORE		0x0
43  #define OP_TYPE_CLUSTER		0x1
44  
45  /* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
46  #define SMC_POWERSTATE_IDLE	0x1
47  
48  #endif
49