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Searched defs:DPCS_BASE__INST0_SEG1 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c102 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c90 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Ddimgrey_cavefish_ip_offset.h413 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dnavi12_ip_offset.h406 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dnavi14_ip_offset.h406 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dsienna_cichlid_ip_offset.h413 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dbeige_goby_ip_offset.h491 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Drenoir_ip_offset.h530 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dyellow_carp_offset.h435 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro
H A Dvangogh_ip_offset.h509 #define DPCS_BASE__INST0_SEG1 0x000000C0 macro