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Searched defs:CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3405 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h4549 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h4027 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12979 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_9_1_sh_mask.h14283 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_9_2_1_sh_mask.h14148 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_9_4_3_sh_mask.h16515 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_9_4_2_sh_mask.h4081 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_11_0_0_sh_mask.h17464 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_10_1_0_sh_mask.h20398 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_11_0_3_sh_mask.h19705 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro
H A Dgc_10_3_0_sh_mask.h18551 #define CP_HQD_DEQUEUE_REQUEST__IQ_REQ_PEND_MASK … macro