1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Real Time Clock driver for AB-RTCMC-32.768kHz-EOZ9 chip.
4 * Copyright (C) 2019 Orolia
5 *
6 */
7
8 #include <linux/module.h>
9 #include <linux/rtc.h>
10 #include <linux/i2c.h>
11 #include <linux/bcd.h>
12 #include <linux/of.h>
13 #include <linux/regmap.h>
14 #include <linux/bitfield.h>
15 #include <linux/hwmon.h>
16 #include <linux/hwmon-sysfs.h>
17
18 #define ABEOZ9_REG_CTRL1 0x00
19 #define ABEOZ9_REG_CTRL1_MASK GENMASK(7, 0)
20 #define ABEOZ9_REG_CTRL1_WE BIT(0)
21 #define ABEOZ9_REG_CTRL1_TE BIT(1)
22 #define ABEOZ9_REG_CTRL1_TAR BIT(2)
23 #define ABEOZ9_REG_CTRL1_EERE BIT(3)
24 #define ABEOZ9_REG_CTRL1_SRON BIT(4)
25 #define ABEOZ9_REG_CTRL1_TD0 BIT(5)
26 #define ABEOZ9_REG_CTRL1_TD1 BIT(6)
27 #define ABEOZ9_REG_CTRL1_CLKINT BIT(7)
28
29 #define ABEOZ9_REG_CTRL_INT 0x01
30 #define ABEOZ9_REG_CTRL_INT_AIE BIT(0)
31 #define ABEOZ9_REG_CTRL_INT_TIE BIT(1)
32 #define ABEOZ9_REG_CTRL_INT_V1IE BIT(2)
33 #define ABEOZ9_REG_CTRL_INT_V2IE BIT(3)
34 #define ABEOZ9_REG_CTRL_INT_SRIE BIT(4)
35
36 #define ABEOZ9_REG_CTRL_INT_FLAG 0x02
37 #define ABEOZ9_REG_CTRL_INT_FLAG_AF BIT(0)
38 #define ABEOZ9_REG_CTRL_INT_FLAG_TF BIT(1)
39 #define ABEOZ9_REG_CTRL_INT_FLAG_V1IF BIT(2)
40 #define ABEOZ9_REG_CTRL_INT_FLAG_V2IF BIT(3)
41 #define ABEOZ9_REG_CTRL_INT_FLAG_SRF BIT(4)
42
43 #define ABEOZ9_REG_CTRL_STATUS 0x03
44 #define ABEOZ9_REG_CTRL_STATUS_V1F BIT(2)
45 #define ABEOZ9_REG_CTRL_STATUS_V2F BIT(3)
46 #define ABEOZ9_REG_CTRL_STATUS_SR BIT(4)
47 #define ABEOZ9_REG_CTRL_STATUS_PON BIT(5)
48 #define ABEOZ9_REG_CTRL_STATUS_EEBUSY BIT(7)
49
50 #define ABEOZ9_REG_SEC 0x08
51 #define ABEOZ9_REG_MIN 0x09
52 #define ABEOZ9_REG_HOURS 0x0A
53 #define ABEOZ9_HOURS_PM BIT(6)
54 #define ABEOZ9_REG_DAYS 0x0B
55 #define ABEOZ9_REG_WEEKDAYS 0x0C
56 #define ABEOZ9_REG_MONTHS 0x0D
57 #define ABEOZ9_REG_YEARS 0x0E
58
59 #define ABEOZ9_SEC_LEN 7
60
61 #define ABEOZ9_REG_ALARM_SEC 0x10
62 #define ABEOZ9_BIT_ALARM_SEC GENMASK(6, 0)
63 #define ABEOZ9_REG_ALARM_MIN 0x11
64 #define ABEOZ9_BIT_ALARM_MIN GENMASK(6, 0)
65 #define ABEOZ9_REG_ALARM_HOURS 0x12
66 #define ABEOZ9_BIT_ALARM_HOURS_PM BIT(5)
67 #define ABEOZ9_BIT_ALARM_HOURS GENMASK(4, 0)
68 #define ABEOZ9_REG_ALARM_DAYS 0x13
69 #define ABEOZ9_BIT_ALARM_DAYS GENMASK(5, 0)
70 #define ABEOZ9_REG_ALARM_WEEKDAYS 0x14
71 #define ABEOZ9_BIT_ALARM_WEEKDAYS GENMASK(2, 0)
72 #define ABEOZ9_REG_ALARM_MONTHS 0x15
73 #define ABEOZ9_BIT_ALARM_MONTHS GENMASK(4, 0)
74 #define ABEOZ9_REG_ALARM_YEARS 0x16
75
76 #define ABEOZ9_ALARM_LEN 7
77 #define ABEOZ9_BIT_ALARM_AE BIT(7)
78
79 #define ABEOZ9_REG_REG_TEMP 0x20
80 #define ABEOZ953_TEMP_MAX 120
81 #define ABEOZ953_TEMP_MIN -60
82
83 #define ABEOZ9_REG_EEPROM 0x30
84 #define ABEOZ9_REG_EEPROM_MASK GENMASK(8, 0)
85 #define ABEOZ9_REG_EEPROM_THP BIT(0)
86 #define ABEOZ9_REG_EEPROM_THE BIT(1)
87 #define ABEOZ9_REG_EEPROM_FD0 BIT(2)
88 #define ABEOZ9_REG_EEPROM_FD1 BIT(3)
89 #define ABEOZ9_REG_EEPROM_R1K BIT(4)
90 #define ABEOZ9_REG_EEPROM_R5K BIT(5)
91 #define ABEOZ9_REG_EEPROM_R20K BIT(6)
92 #define ABEOZ9_REG_EEPROM_R80K BIT(7)
93
94 struct abeoz9_rtc_data {
95 struct rtc_device *rtc;
96 struct regmap *regmap;
97 struct device *hwmon_dev;
98 };
99
abeoz9_check_validity(struct device * dev)100 static int abeoz9_check_validity(struct device *dev)
101 {
102 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
103 struct regmap *regmap = data->regmap;
104 int ret;
105 int val;
106
107 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
108 if (ret < 0) {
109 dev_err(dev,
110 "unable to get CTRL_STATUS register (%d)\n", ret);
111 return ret;
112 }
113
114 if (val & ABEOZ9_REG_CTRL_STATUS_PON) {
115 dev_warn(dev, "power-on reset detected, date is invalid\n");
116 return -EINVAL;
117 }
118
119 if (val & ABEOZ9_REG_CTRL_STATUS_V1F) {
120 dev_warn(dev,
121 "voltage drops below VLOW1 threshold, date is invalid\n");
122 return -EINVAL;
123 }
124
125 if ((val & ABEOZ9_REG_CTRL_STATUS_V2F)) {
126 dev_warn(dev,
127 "voltage drops below VLOW2 threshold, date is invalid\n");
128 return -EINVAL;
129 }
130
131 return 0;
132 }
133
abeoz9_reset_validity(struct regmap * regmap)134 static int abeoz9_reset_validity(struct regmap *regmap)
135 {
136 return regmap_update_bits(regmap, ABEOZ9_REG_CTRL_STATUS,
137 ABEOZ9_REG_CTRL_STATUS_V1F |
138 ABEOZ9_REG_CTRL_STATUS_V2F |
139 ABEOZ9_REG_CTRL_STATUS_PON,
140 0);
141 }
142
abeoz9_rtc_get_time(struct device * dev,struct rtc_time * tm)143 static int abeoz9_rtc_get_time(struct device *dev, struct rtc_time *tm)
144 {
145 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
146 u8 regs[ABEOZ9_SEC_LEN];
147 int ret;
148
149 ret = abeoz9_check_validity(dev);
150 if (ret)
151 return ret;
152
153 ret = regmap_bulk_read(data->regmap, ABEOZ9_REG_SEC,
154 regs,
155 sizeof(regs));
156 if (ret) {
157 dev_err(dev, "reading RTC time failed (%d)\n", ret);
158 return ret;
159 }
160
161 tm->tm_sec = bcd2bin(regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] & 0x7F);
162 tm->tm_min = bcd2bin(regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] & 0x7F);
163
164 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM) {
165 tm->tm_hour =
166 bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & 0x1f);
167 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM)
168 tm->tm_hour += 12;
169 } else {
170 tm->tm_hour = bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC]);
171 }
172
173 tm->tm_mday = bcd2bin(regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC]);
174 tm->tm_wday = bcd2bin(regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC]);
175 tm->tm_mon = bcd2bin(regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC]) - 1;
176 tm->tm_year = bcd2bin(regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC]) + 100;
177
178 return ret;
179 }
180
abeoz9_rtc_set_time(struct device * dev,struct rtc_time * tm)181 static int abeoz9_rtc_set_time(struct device *dev, struct rtc_time *tm)
182 {
183 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
184 struct regmap *regmap = data->regmap;
185 u8 regs[ABEOZ9_SEC_LEN];
186 int ret;
187
188 regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_sec);
189 regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_min);
190 regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_hour);
191 regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mday);
192 regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_wday);
193 regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mon + 1);
194 regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_year - 100);
195
196 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_SEC,
197 regs,
198 sizeof(regs));
199
200 if (ret) {
201 dev_err(dev, "set RTC time failed (%d)\n", ret);
202 return ret;
203 }
204
205 return abeoz9_reset_validity(regmap);
206 }
207
abeoz9_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alarm)208 static int abeoz9_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
209 {
210 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
211 struct regmap *regmap = data->regmap;
212 u8 regs[ABEOZ9_ALARM_LEN];
213 u8 val[2];
214 int ret;
215
216 ret = abeoz9_check_validity(dev);
217 if (ret)
218 return ret;
219
220 ret = regmap_bulk_read(regmap, ABEOZ9_REG_CTRL_INT, val, sizeof(val));
221 if (ret)
222 return ret;
223
224 alarm->enabled = val[0] & ABEOZ9_REG_CTRL_INT_AIE;
225 alarm->pending = val[1] & ABEOZ9_REG_CTRL_INT_FLAG_AF;
226
227 ret = regmap_bulk_read(regmap, ABEOZ9_REG_ALARM_SEC, regs, sizeof(regs));
228 if (ret)
229 return ret;
230
231 alarm->time.tm_sec = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_SEC, regs[0]));
232 alarm->time.tm_min = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_MIN, regs[1]));
233 alarm->time.tm_hour = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_HOURS, regs[2]));
234 if (FIELD_GET(ABEOZ9_BIT_ALARM_HOURS_PM, regs[2]))
235 alarm->time.tm_hour += 12;
236
237 alarm->time.tm_mday = bcd2bin(FIELD_GET(ABEOZ9_BIT_ALARM_DAYS, regs[3]));
238
239 return 0;
240 }
241
abeoz9_rtc_alarm_irq_enable(struct device * dev,u32 enable)242 static int abeoz9_rtc_alarm_irq_enable(struct device *dev, u32 enable)
243 {
244 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
245
246 return regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT,
247 ABEOZ9_REG_CTRL_INT_AIE,
248 FIELD_PREP(ABEOZ9_REG_CTRL_INT_AIE, enable));
249 }
250
abeoz9_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alarm)251 static int abeoz9_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
252 {
253 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
254 u8 regs[ABEOZ9_ALARM_LEN] = {0};
255 int ret;
256
257 ret = regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG,
258 ABEOZ9_REG_CTRL_INT_FLAG_AF, 0);
259 if (ret)
260 return ret;
261
262 regs[0] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_SEC,
263 bin2bcd(alarm->time.tm_sec));
264 regs[1] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_MIN,
265 bin2bcd(alarm->time.tm_min));
266 regs[2] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_HOURS,
267 bin2bcd(alarm->time.tm_hour));
268 regs[3] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_DAYS,
269 bin2bcd(alarm->time.tm_mday));
270
271 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_ALARM_SEC, regs,
272 sizeof(regs));
273 if (ret)
274 return ret;
275
276 return abeoz9_rtc_alarm_irq_enable(dev, alarm->enabled);
277 }
278
abeoz9_rtc_irq(int irq,void * dev)279 static irqreturn_t abeoz9_rtc_irq(int irq, void *dev)
280 {
281 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
282 unsigned int val;
283 int ret;
284
285 ret = regmap_read(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG, &val);
286 if (ret)
287 return IRQ_NONE;
288
289 if (!FIELD_GET(ABEOZ9_REG_CTRL_INT_FLAG_AF, val))
290 return IRQ_NONE;
291
292 regmap_update_bits(data->regmap, ABEOZ9_REG_CTRL_INT_FLAG,
293 ABEOZ9_REG_CTRL_INT_FLAG_AF, 0);
294
295 rtc_update_irq(data->rtc, 1, RTC_IRQF | RTC_AF);
296
297 return IRQ_HANDLED;
298 }
299
abeoz9_trickle_parse_dt(struct device_node * node)300 static int abeoz9_trickle_parse_dt(struct device_node *node)
301 {
302 u32 ohms = 0;
303
304 if (of_property_read_u32(node, "trickle-resistor-ohms", &ohms))
305 return 0;
306
307 switch (ohms) {
308 case 1000:
309 return ABEOZ9_REG_EEPROM_R1K;
310 case 5000:
311 return ABEOZ9_REG_EEPROM_R5K;
312 case 20000:
313 return ABEOZ9_REG_EEPROM_R20K;
314 case 80000:
315 return ABEOZ9_REG_EEPROM_R80K;
316 default:
317 return 0;
318 }
319 }
320
abeoz9_rtc_setup(struct device * dev,struct device_node * node)321 static int abeoz9_rtc_setup(struct device *dev, struct device_node *node)
322 {
323 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
324 struct regmap *regmap = data->regmap;
325 int ret;
326
327 /* Enable Self Recovery, Clock for Watch and EEPROM refresh functions */
328 ret = regmap_update_bits(regmap, ABEOZ9_REG_CTRL1,
329 ABEOZ9_REG_CTRL1_MASK,
330 ABEOZ9_REG_CTRL1_WE |
331 ABEOZ9_REG_CTRL1_EERE |
332 ABEOZ9_REG_CTRL1_SRON);
333 if (ret < 0) {
334 dev_err(dev, "unable to set CTRL_1 register (%d)\n", ret);
335 return ret;
336 }
337
338 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT, 0);
339 if (ret < 0) {
340 dev_err(dev,
341 "unable to set control CTRL_INT register (%d)\n",
342 ret);
343 return ret;
344 }
345
346 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT_FLAG, 0);
347 if (ret < 0) {
348 dev_err(dev,
349 "unable to set control CTRL_INT_FLAG register (%d)\n",
350 ret);
351 return ret;
352 }
353
354 ret = abeoz9_trickle_parse_dt(node);
355
356 /* Enable built-in termometer */
357 ret |= ABEOZ9_REG_EEPROM_THE;
358
359 ret = regmap_update_bits(regmap, ABEOZ9_REG_EEPROM,
360 ABEOZ9_REG_EEPROM_MASK,
361 ret);
362 if (ret < 0) {
363 dev_err(dev, "unable to set EEPROM register (%d)\n", ret);
364 return ret;
365 }
366
367 return ret;
368 }
369
370 static const struct rtc_class_ops rtc_ops = {
371 .read_time = abeoz9_rtc_get_time,
372 .set_time = abeoz9_rtc_set_time,
373 .read_alarm = abeoz9_rtc_read_alarm,
374 .set_alarm = abeoz9_rtc_set_alarm,
375 .alarm_irq_enable = abeoz9_rtc_alarm_irq_enable,
376 };
377
378 static const struct regmap_config abeoz9_rtc_regmap_config = {
379 .reg_bits = 8,
380 .val_bits = 8,
381 .max_register = 0x3f,
382 };
383
384 #if IS_REACHABLE(CONFIG_HWMON)
385
abeoz9z3_temp_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)386 static int abeoz9z3_temp_read(struct device *dev,
387 enum hwmon_sensor_types type,
388 u32 attr, int channel, long *temp)
389 {
390 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
391 struct regmap *regmap = data->regmap;
392 int ret;
393 unsigned int val;
394
395 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
396 if (ret < 0)
397 return ret;
398
399 switch (attr) {
400 case hwmon_temp_input:
401 ret = regmap_read(regmap, ABEOZ9_REG_REG_TEMP, &val);
402 if (ret < 0)
403 return ret;
404 *temp = 1000 * (val + ABEOZ953_TEMP_MIN);
405 return 0;
406 case hwmon_temp_max:
407 *temp = 1000 * ABEOZ953_TEMP_MAX;
408 return 0;
409 case hwmon_temp_min:
410 *temp = 1000 * ABEOZ953_TEMP_MIN;
411 return 0;
412 default:
413 return -EOPNOTSUPP;
414 }
415 }
416
abeoz9_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)417 static umode_t abeoz9_is_visible(const void *data,
418 enum hwmon_sensor_types type,
419 u32 attr, int channel)
420 {
421 switch (attr) {
422 case hwmon_temp_input:
423 case hwmon_temp_max:
424 case hwmon_temp_min:
425 return 0444;
426 default:
427 return 0;
428 }
429 }
430
431 static const u32 abeoz9_chip_config[] = {
432 HWMON_C_REGISTER_TZ,
433 0
434 };
435
436 static const struct hwmon_channel_info abeoz9_chip = {
437 .type = hwmon_chip,
438 .config = abeoz9_chip_config,
439 };
440
441 static const u32 abeoz9_temp_config[] = {
442 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN,
443 0
444 };
445
446 static const struct hwmon_channel_info abeoz9_temp = {
447 .type = hwmon_temp,
448 .config = abeoz9_temp_config,
449 };
450
451 static const struct hwmon_channel_info * const abeoz9_info[] = {
452 &abeoz9_chip,
453 &abeoz9_temp,
454 NULL
455 };
456
457 static const struct hwmon_ops abeoz9_hwmon_ops = {
458 .is_visible = abeoz9_is_visible,
459 .read = abeoz9z3_temp_read,
460 };
461
462 static const struct hwmon_chip_info abeoz9_chip_info = {
463 .ops = &abeoz9_hwmon_ops,
464 .info = abeoz9_info,
465 };
466
abeoz9_hwmon_register(struct device * dev,struct abeoz9_rtc_data * data)467 static void abeoz9_hwmon_register(struct device *dev,
468 struct abeoz9_rtc_data *data)
469 {
470 data->hwmon_dev =
471 devm_hwmon_device_register_with_info(dev,
472 "abeoz9",
473 data,
474 &abeoz9_chip_info,
475 NULL);
476 if (IS_ERR(data->hwmon_dev)) {
477 dev_warn(dev, "unable to register hwmon device %ld\n",
478 PTR_ERR(data->hwmon_dev));
479 }
480 }
481
482 #else
483
abeoz9_hwmon_register(struct device * dev,struct abeoz9_rtc_data * data)484 static void abeoz9_hwmon_register(struct device *dev,
485 struct abeoz9_rtc_data *data)
486 {
487 }
488
489 #endif
490
abeoz9_probe(struct i2c_client * client)491 static int abeoz9_probe(struct i2c_client *client)
492 {
493 struct abeoz9_rtc_data *data = NULL;
494 struct device *dev = &client->dev;
495 struct regmap *regmap;
496 int ret;
497
498 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
499 I2C_FUNC_SMBUS_BYTE_DATA |
500 I2C_FUNC_SMBUS_I2C_BLOCK))
501 return -ENODEV;
502
503 regmap = devm_regmap_init_i2c(client, &abeoz9_rtc_regmap_config);
504 if (IS_ERR(regmap)) {
505 ret = PTR_ERR(regmap);
506 dev_err(dev, "regmap allocation failed: %d\n", ret);
507 return ret;
508 }
509
510 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
511 if (!data)
512 return -ENOMEM;
513
514 data->regmap = regmap;
515 dev_set_drvdata(dev, data);
516
517 ret = abeoz9_rtc_setup(dev, client->dev.of_node);
518 if (ret)
519 return ret;
520
521 data->rtc = devm_rtc_allocate_device(dev);
522 ret = PTR_ERR_OR_ZERO(data->rtc);
523 if (ret)
524 return ret;
525
526 data->rtc->ops = &rtc_ops;
527 data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
528 data->rtc->range_max = RTC_TIMESTAMP_END_2099;
529 clear_bit(RTC_FEATURE_ALARM, data->rtc->features);
530
531 if (client->irq > 0) {
532 unsigned long irqflags = IRQF_TRIGGER_LOW;
533
534 if (dev_fwnode(&client->dev))
535 irqflags = 0;
536
537 ret = devm_request_threaded_irq(dev, client->irq, NULL,
538 abeoz9_rtc_irq,
539 irqflags | IRQF_ONESHOT,
540 dev_name(dev), dev);
541 if (ret) {
542 dev_err(dev, "failed to request alarm irq\n");
543 return ret;
544 }
545 } else {
546 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, data->rtc->features);
547 }
548
549 if (client->irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
550 ret = device_init_wakeup(dev, true);
551 set_bit(RTC_FEATURE_ALARM, data->rtc->features);
552 }
553
554 ret = devm_rtc_register_device(data->rtc);
555 if (ret)
556 return ret;
557
558 abeoz9_hwmon_register(dev, data);
559 return 0;
560 }
561
562 #ifdef CONFIG_OF
563 static const struct of_device_id abeoz9_dt_match[] = {
564 { .compatible = "abracon,abeoz9" },
565 { },
566 };
567 MODULE_DEVICE_TABLE(of, abeoz9_dt_match);
568 #endif
569
570 static const struct i2c_device_id abeoz9_id[] = {
571 { "abeoz9", 0 },
572 { }
573 };
574
575 static struct i2c_driver abeoz9_driver = {
576 .driver = {
577 .name = "rtc-ab-eoz9",
578 .of_match_table = of_match_ptr(abeoz9_dt_match),
579 },
580 .probe = abeoz9_probe,
581 .id_table = abeoz9_id,
582 };
583
584 module_i2c_driver(abeoz9_driver);
585
586 MODULE_AUTHOR("Artem Panfilov <panfilov.artyom@gmail.com>");
587 MODULE_DESCRIPTION("Abracon AB-RTCMC-32.768kHz-EOZ9 RTC driver");
588 MODULE_LICENSE("GPL");
589