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Searched defs:val (Results 1 – 25 of 6170) sorted by relevance

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/openbmc/linux/arch/arm/include/asm/hardware/
H A Dcp14.h12 #define dbg_write(val, reg) WCP14_##reg(val) argument
14 #define etm_write(val, reg) WCP14_##reg(val) argument
24 #define MCR14(val, op1, crn, crm, op2) \ argument
152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) argument
153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) argument
154 #define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) argument
155 #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) argument
156 #define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) argument
157 #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) argument
158 #define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) argument
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/openbmc/u-boot/include/bedbug/
H A Dregs.h169 #define SET_REGISTER( str, val ) \ argument
180 #define SET_CR(val) SET_REGISTER( "mtcr %0", val ) argument
182 #define SET_MSR(val) SET_REGISTER( "mtmsr %0", val ) argument
184 #define SET_XER(val) SET_REGISTER( "mtspr 1,%0", val ) argument
186 #define SET_LR(val) SET_REGISTER( "mtspr 8,%0", val ) argument
188 #define SET_CTR(val) SET_REGISTER( "mtspr 9,%0", val ) argument
190 #define SET_DSISR(val) SET_REGISTER( "mtspr 18,%0", val ) argument
192 #define SET_DAR(val) SET_REGISTER( "mtspr 19,%0", val ) argument
194 #define SET_DEC(val) SET_REGISTER( "mtspr 22,%0", val ) argument
196 #define SET_SRR0(val) SET_REGISTER( "mtspr 26,%0", val ) argument
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/openbmc/u-boot/arch/microblaze/include/asm/
H A Dasm.h9 #define NGET(val, fslnum) \ argument
12 #define GET(val, fslnum) \ argument
15 #define NCGET(val, fslnum) \ argument
18 #define CGET(val, fslnum) \ argument
21 #define NPUT(val, fslnum) \ argument
24 #define PUT(val, fslnum) \ argument
27 #define NCPUT(val, fslnum) \ argument
30 #define CPUT(val, fslnum) \ argument
35 #define MFS(val, reg) \ argument
38 #define MTS(val, reg) \ argument
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dtypes.h133 #define CONF_HAS(config, val) ((config) & (1 << (val))) argument
138 #define CONF_IS(config, val) ((config) == (1 << (val))) argument
139 #define CONF_GE(config, val) ((config) & (0-(1 << (val)))) argument
140 #define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) argument
141 #define CONF_LT(config, val) ((config) & ((1 << (val))-1)) argument
142 #define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) argument
146 #define NCONF_HAS(val) CONF_HAS(NCONF, val) argument
148 #define NCONF_IS(val) CONF_IS(NCONF, val) argument
149 #define NCONF_GE(val) CONF_GE(NCONF, val) argument
150 #define NCONF_GT(val) CONF_GT(NCONF, val) argument
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/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Dfw.h341 static inline void RTW89_SET_FWCMD_SEC_IDX(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_IDX()
346 static inline void RTW89_SET_FWCMD_SEC_OFFSET(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_OFFSET()
351 static inline void RTW89_SET_FWCMD_SEC_LEN(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_LEN()
356 static inline void RTW89_SET_FWCMD_SEC_TYPE(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_TYPE()
361 static inline void RTW89_SET_FWCMD_SEC_EXT_KEY(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_EXT_KEY()
366 static inline void RTW89_SET_FWCMD_SEC_SPP_MODE(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_SPP_MODE()
371 static inline void RTW89_SET_FWCMD_SEC_KEY0(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY0()
376 static inline void RTW89_SET_FWCMD_SEC_KEY1(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY1()
381 static inline void RTW89_SET_FWCMD_SEC_KEY2(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY2()
386 static inline void RTW89_SET_FWCMD_SEC_KEY3(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY3()
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/openbmc/linux/arch/s390/include/asm/
H A Dpercpu.h27 #define arch_this_cpu_to_op_simple(pcp, val, op) \ argument
44 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
45 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
46 #define this_cpu_add_return_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
47 #define this_cpu_add_return_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
48 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
49 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
50 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
51 #define this_cpu_or_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
55 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
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/openbmc/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx.xml.h1123 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_MRB_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_MRB_START()
1129 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_VSD_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_VSD_START()
1135 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB1_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB1_START()
1141 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB2_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB2_START()
1149 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_SDS_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_SDS_START()
1155 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE()
1182 static inline uint32_t A6XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) in A6XX_CP_PROTECT_REG_BASE_ADDR()
1188 static inline uint32_t A6XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) in A6XX_CP_PROTECT_REG_MASK_LEN()
1257 static inline uint32_t A6XX_CP_ROQ_RB_STAT_RPTR(uint32_t val) in A6XX_CP_ROQ_RB_STAT_RPTR()
1263 static inline uint32_t A6XX_CP_ROQ_RB_STAT_WPTR(uint32_t val) in A6XX_CP_ROQ_RB_STAT_WPTR()
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H A Dadreno_pm4.xml.h526 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF()
532 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC()
538 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK()
544 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT()
552 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE()
558 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR()
566 static inline uint32_t CP_LOAD_STATE4_0_DST_OFF(uint32_t val) in CP_LOAD_STATE4_0_DST_OFF()
572 static inline uint32_t CP_LOAD_STATE4_0_STATE_SRC(enum a4xx_state_src val) in CP_LOAD_STATE4_0_STATE_SRC()
578 static inline uint32_t CP_LOAD_STATE4_0_STATE_BLOCK(enum a4xx_state_block val) in CP_LOAD_STATE4_0_STATE_BLOCK()
584 static inline uint32_t CP_LOAD_STATE4_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE4_0_NUM_UNIT()
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H A Da3xx.xml.h947 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES()
955 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
961 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
969 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET()
977 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE()
985 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET()
993 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE()
1001 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET()
1009 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE()
1017 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN()
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/openbmc/linux/arch/loongarch/include/asm/
H A Dpercpu.h108 static __always_inline void __percpu_write(void *ptr, unsigned long val, int size) in __percpu_write()
140 static __always_inline unsigned long __percpu_xchg(void *ptr, unsigned long val, in __percpu_xchg()
178 #define _percpu_write(pcp, val) \ argument
183 #define _pcp_protect(operation, pcp, val) \ argument
193 #define _percpu_add(pcp, val) \ argument
196 #define _percpu_add_return(pcp, val) _percpu_add(pcp, val) argument
198 #define _percpu_and(pcp, val) \ argument
201 #define _percpu_or(pcp, val) \ argument
204 #define _percpu_xchg(pcp, val) ((typeof(pcp)) \ argument
207 #define this_cpu_add_4(pcp, val) _percpu_add(pcp, val) argument
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/openbmc/linux/drivers/gpu/drm/panel/
H A Dpanel-abt-y030xx067a.c23 #define REG00_VBRT_CTRL(val) (val) argument
25 #define REG01_COM_DC(val) (val) argument
27 #define REG02_DA_CONTRAST(val) (val) argument
28 #define REG02_VESA_SEL(val) ((val) << 5) argument
31 #define REG03_VPOSITION(val) (val) argument
36 #define REG04_HPOSITION1(val) (val) argument
41 #define REG05_SLBRCHARGE(val) ((val) << 3) argument
42 #define REG05_PRECHARGE_LEVEL(val) ((val) << 6) argument
49 #define REG06_GAMMA_SEL(val) ((val) << 5) argument
58 #define REG07_AMPTST(val) ((val) << 6) argument
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/openbmc/linux/arch/alpha/lib/
H A Dfpreg.c14 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
16 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
22 unsigned long val; in alpha_read_fp_reg() local
69 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
71 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
75 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
123 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
125 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
131 unsigned long val; in alpha_read_fp_reg_s() local
180 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
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/openbmc/linux/arch/powerpc/lib/
H A Dqspinlock.c104 static inline int decode_tail_cpu(u32 val) in decode_tail_cpu()
109 static inline int get_owner_cpu(u32 val) in get_owner_cpu()
234 static __always_inline void seen_sleepy_owner(struct qspinlock *lock, u32 val) in seen_sleepy_owner()
250 static __always_inline void seen_sleepy_node(struct qspinlock *lock, u32 val) in seen_sleepy_node()
262 static struct qnode *get_tail_qnode(struct qspinlock *lock, u32 val) in get_tail_qnode()
287 static __always_inline bool __yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt,… in __yield_to_locked_owner()
340 static __always_inline bool yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) in yield_to_locked_owner()
346 static __always_inline bool yield_head_to_locked_owner(struct qspinlock *lock, u32 val, bool paravi… in yield_head_to_locked_owner()
356 static __always_inline void propagate_yield_cpu(struct qnode *node, u32 val, int *set_yield_cpu, bo… in propagate_yield_cpu()
384 static __always_inline bool yield_to_prev(struct qspinlock *lock, struct qnode *node, u32 val, bool… in yield_to_prev()
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/openbmc/linux/sound/synth/emux/
H A Demux_nrpn.c41 int type, int val, int mode) in send_converted_effect()
128 static int fx_delay(int val) in fx_delay()
133 static int fx_attack(int val) in fx_attack()
138 static int fx_hold(int val) in fx_hold()
143 static int fx_decay(int val) in fx_decay()
148 static int fx_the_value(int val) in fx_the_value()
153 static int fx_twice_value(int val) in fx_twice_value()
158 static int fx_conv_pitch(int val) in fx_conv_pitch()
163 static int fx_conv_Q(int val) in fx_conv_Q()
209 static int gs_cutoff(int val) in gs_cutoff()
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/openbmc/qemu/target/riscv/
H A Dcsr.c645 static int read_ssp(CPURISCVState *env, int csrno, target_ulong *val) in read_ssp()
651 static int write_ssp(CPURISCVState *env, int csrno, target_ulong val) in write_ssp()
659 target_ulong *val) in read_fflags()
666 target_ulong val) in write_fflags()
678 target_ulong *val) in read_frm()
685 target_ulong val) in write_frm()
697 target_ulong *val) in read_fcsr()
705 target_ulong val) in write_fcsr()
718 target_ulong *val) in read_vtype()
736 target_ulong *val) in read_vl()
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/openbmc/linux/include/sound/
H A Demu8000_reg.h108 #define EMU8000_CPF_WRITE(emu, chan, val) \ argument
110 #define EMU8000_PTRX_WRITE(emu, chan, val) \ argument
112 #define EMU8000_CVCF_WRITE(emu, chan, val) \ argument
114 #define EMU8000_VTFT_WRITE(emu, chan, val) \ argument
116 #define EMU8000_PSST_WRITE(emu, chan, val) \ argument
118 #define EMU8000_CSL_WRITE(emu, chan, val) \ argument
120 #define EMU8000_CCCA_WRITE(emu, chan, val) \ argument
122 #define EMU8000_HWCF4_WRITE(emu, val) \ argument
124 #define EMU8000_HWCF5_WRITE(emu, val) \ argument
126 #define EMU8000_HWCF6_WRITE(emu, val) \ argument
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/openbmc/linux/arch/alpha/include/uapi/asm/
H A Dcompiler.h14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
26 # define __kernel_inswl(val, shift) \ argument
30 # define __kernel_insql(val, shift) \ argument
34 # define __kernel_inslh(val, shift) \ argument
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/openbmc/linux/arch/arm64/lib/
H A Dcopy_from_user.S23 .macro ldrb1 reg, ptr, val
27 .macro strb1 reg, ptr, val
31 .macro ldrh1 reg, ptr, val
35 .macro strh1 reg, ptr, val
39 .macro ldr1 reg, ptr, val
43 .macro str1 reg, ptr, val
47 .macro ldp1 reg1, reg2, ptr, val
51 .macro stp1 reg1, reg2, ptr, val
H A Dcopy_to_user.S22 .macro ldrb1 reg, ptr, val
26 .macro strb1 reg, ptr, val
30 .macro ldrh1 reg, ptr, val
34 .macro strh1 reg, ptr, val
38 .macro ldr1 reg, ptr, val
42 .macro str1 reg, ptr, val
46 .macro ldp1 reg1, reg2, ptr, val
50 .macro stp1 reg1, reg2, ptr, val
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h1383 #define write_r10k_perf_cntr(counter,val) \ argument
1402 #define write_r10k_perf_cntl(counter,val) \ argument
1509 #define __write_ulong_c0_register(reg, sel, val) \ argument
1568 #define __write_64bit_c0_split(source, sel, val) \ argument
1655 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1658 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument
1661 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument
1664 #define writex_c0_entrylo0(val) __writex_32bit_c0_register($2, 0, val) argument
1667 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument
1670 #define writex_c0_entrylo1(val) __writex_32bit_c0_register($3, 0, val) argument
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/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi.xml.h146 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR()
152 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR()
158 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP()
213 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL()
219 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT()
225 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE()
242 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP()
250 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START()
256 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END()
264 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START()
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/openbmc/linux/arch/arm64/include/asm/
H A Dpercpu.h174 #define this_cpu_write_1(pcp, val) \ argument
176 #define this_cpu_write_2(pcp, val) \ argument
178 #define this_cpu_write_4(pcp, val) \ argument
180 #define this_cpu_write_8(pcp, val) \ argument
183 #define this_cpu_add_1(pcp, val) \ argument
185 #define this_cpu_add_2(pcp, val) \ argument
187 #define this_cpu_add_4(pcp, val) \ argument
189 #define this_cpu_add_8(pcp, val) \ argument
192 #define this_cpu_add_return_1(pcp, val) \ argument
194 #define this_cpu_add_return_2(pcp, val) \ argument
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/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h880 #define write_r10k_perf_cntr(counter,val) \ argument
899 #define write_r10k_perf_cntl(counter,val) \ argument
983 #define __write_ulong_c0_register(reg, sel, val) \ argument
1039 #define __write_64bit_c0_split(source, sel, val) \ argument
1097 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1100 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument
1103 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument
1106 #define writex_c0_entrylo0(val) __writex_32bit_c0_register(2, val) argument
1109 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument
1112 #define writex_c0_entrylo1(val) __writex_32bit_c0_register(3, val) argument
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/openbmc/linux/drivers/gpu/drm/i915/soc/
H A Dintel_dram.c142 u32 val; in chv_detect_mem_freq() local
160 u32 val; in vlv_detect_mem_freq() local
201 static int skl_get_dimm_size(u16 val) in skl_get_dimm_size()
206 static int skl_get_dimm_width(u16 val) in skl_get_dimm_width()
223 static int skl_get_dimm_ranks(u16 val) in skl_get_dimm_ranks()
234 static int icl_get_dimm_size(u16 val) in icl_get_dimm_size()
239 static int icl_get_dimm_width(u16 val) in icl_get_dimm_width()
256 static int icl_get_dimm_ranks(u16 val) in icl_get_dimm_ranks()
276 int channel, char dimm_name, u16 val) in skl_dram_get_dimm_info()
297 int channel, u32 val) in skl_dram_get_channel_info()
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/openbmc/linux/include/linux/
H A Diopoll.h36 #define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ argument
84 #define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ argument
134 #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument
154 #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ argument
157 #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
160 #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
163 #define readw_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
166 #define readw_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
169 #define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
172 #define readl_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
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