Lines Matching +full:otg +full:- +full:port
1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/imx-regs.h>
11 #include <usb/ehci-ci.h>
64 static int mxc_set_usbcontrol(int port, unsigned int flags) in mxc_set_usbcontrol() argument
70 switch (port) { in mxc_set_usbcontrol()
71 case 0: /* OTG port */ in mxc_set_usbcontrol()
86 case 1: /* H1 port */ in mxc_set_usbcontrol()
116 return -EINVAL; in mxc_set_usbcontrol()
119 switch (port) { in mxc_set_usbcontrol()
120 case 0: /* OTG port */ in mxc_set_usbcontrol()
128 case 1: /* H1 port */ in mxc_set_usbcontrol()
139 case 2: /* H2 port */ in mxc_set_usbcontrol()
151 return -EINVAL; in mxc_set_usbcontrol()
154 switch (port) { in mxc_set_usbcontrol()
155 case 0: /* OTG port */ in mxc_set_usbcontrol()
170 case 1: /* H1 port */ in mxc_set_usbcontrol()
200 return -EINVAL; in mxc_set_usbcontrol()
218 __raw_readl(&sc_regs->ccmr); in ehci_hcd_init()
219 __raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ; in ehci_hcd_init()
226 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); in ehci_hcd_init()
228 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); in ehci_hcd_init()
229 setbits_le32(&ehci->usbmode, CM_HOST); in ehci_hcd_init()
230 __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in ehci_hcd_init()
234 __raw_writel(0, &ehci->sbuscfg); in ehci_hcd_init()