Lines Matching +full:serdes +full:- +full:clk

1 // SPDX-License-Identifier: GPL-2.0+
3 * TI serdes driver for keystone2.
11 #include <asm/ti-common/keystone_serdes.h>
42 enum ks2_serdes_clock clk; member
49 /* SERDES PHY lane enable configuration value, indexed by PHY interface */
55 /* SERDES PHY PLL enable configuration value, indexed by PHY interface */
62 * Array to hold all possible serdes configurations.
67 .clk = SERDES_CLOCK_156P25M,
130 ks2_serdes_cfg_setup(base, cfg->cmu, SERDES_CMU_CFG_NUM); in ks2_serdes_init_cfg()
131 ks2_serdes_cfg_setup(base, cfg->comlane, SERDES_COMLANE_CFG_NUM); in ks2_serdes_init_cfg()
134 ks2_serdes_lane_config(base, cfg->lane, SERDES_LANE_CFG_NUM, i); in ks2_serdes_init_cfg()
139 static void ks2_serdes_cmu_comlane_enable(u32 base, struct ks2_serdes *serdes) in ks2_serdes_cmu_comlane_enable() argument
141 /* Bring SerDes out of Reset */ in ks2_serdes_cmu_comlane_enable()
143 if (serdes->intf == SERDES_PHY_PCSR) in ks2_serdes_cmu_comlane_enable()
148 if (serdes->intf == SERDES_PHY_PCSR) in ks2_serdes_cmu_comlane_enable()
154 static void ks2_serdes_pll_enable(u32 base, struct ks2_serdes *serdes) in ks2_serdes_pll_enable() argument
156 writel(serdes_cfg_pll_enable[serdes->intf], in ks2_serdes_pll_enable()
171 struct ks2_serdes *serdes, u32 lane) in ks2_serdes_lane_enable() argument
176 writel(SERDES_LANE_EN_VAL(serdes_cfg_lane_enable, serdes->intf, in ks2_serdes_lane_enable()
177 serdes->rate_mode), in ks2_serdes_lane_enable()
181 if (serdes->loopback) in ks2_serdes_lane_enable()
186 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes) in ks2_serdes_init() argument
192 if (serdes->clk == cfgs[i].clk && serdes->rate == cfgs[i].rate) in ks2_serdes_init()
196 puts("Cannot find keystone SerDes configuration"); in ks2_serdes_init()
197 return -EINVAL; in ks2_serdes_init()
202 ks2_serdes_cmu_comlane_enable(base, serdes); in ks2_serdes_init()
204 ks2_serdes_lane_enable(base, serdes, i); in ks2_serdes_init()
206 ks2_serdes_pll_enable(base, serdes); in ks2_serdes_init()