1 // SPDX-License-Identifier: GPL-2.0+
3  * Qualcomm UART driver
7  * UART will work in Data Mover mode.
21 /* Serial registers - this driver works in uartdm mode*/
49 #define UARTDM_TF               0x100 /* UART Transmit FIFO register */
50 #define UARTDM_RF               0x140 /* UART Receive FIFO register */
70 	if (priv->chars_cnt)  in msm_serial_fetch()
71 		return priv->chars_cnt;  in msm_serial_fetch()
74 	if (readl(priv->base + UARTDM_SR) & UARTDM_SR_UART_OVERRUN)  in msm_serial_fetch()
75 		writel(UARTDM_CR_CMD_RESET_ERR, priv->base + UARTDM_CR);  in msm_serial_fetch()
78 	sr = readl(priv->base + UARTDM_SR);  in msm_serial_fetch()
82 		priv->chars_buf = readl(priv->base + UARTDM_RF);  in msm_serial_fetch()
83 		priv->chars_cnt = 4;  in msm_serial_fetch()
86 		priv->chars_cnt = readl(priv->base + UARTDM_RXFS);  in msm_serial_fetch()
87 		/* Extract number of characters in UART packing buffer*/  in msm_serial_fetch()
88 		priv->chars_cnt = (priv->chars_cnt >>  in msm_serial_fetch()
91 		if (!priv->chars_cnt)  in msm_serial_fetch()
96 		       priv->base + UARTDM_CR);  in msm_serial_fetch()
98 		priv->chars_buf = readl(priv->base + UARTDM_RF);  in msm_serial_fetch()
100 		       priv->base + UARTDM_CR);  in msm_serial_fetch()
101 		writel(0x7, priv->base + UARTDM_DMRX);  in msm_serial_fetch()
104 	return priv->chars_cnt;  in msm_serial_fetch()
113 		return -EAGAIN;  in msm_serial_getc()
115 	c = priv->chars_buf & 0xFF;  in msm_serial_getc()
116 	priv->chars_buf >>= 8;  in msm_serial_getc()
117 	priv->chars_cnt--;  in msm_serial_getc()
126 	if (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&  in msm_serial_putc()
127 	    !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))  in msm_serial_putc()
128 		return -EAGAIN;  in msm_serial_putc()
130 	writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);  in msm_serial_putc()
132 	writel(1, priv->base + UARTDM_NCF_TX);  in msm_serial_putc()
133 	writel(ch, priv->base + UARTDM_TF);  in msm_serial_putc()
156 	uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),  in msm_uart_clk_init()
157 					"clock-frequency", 115200);  in msm_uart_clk_init()
164 	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock",  in msm_uart_clk_init()
169 	clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);  in msm_uart_clk_init()
192 	writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR);  in uart_dm_init()
193 	writel(0x0, priv->base + UARTDM_MR1);  in uart_dm_init()
194 	writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);  in uart_dm_init()
195 	writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);  in uart_dm_init()
196 	writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR);  in uart_dm_init()
203 	/* No need to reinitialize the UART after relocation */  in msm_serial_probe()
204 	if (gd->flags & GD_FLG_RELOC)  in msm_serial_probe()
211 	pinctrl_select_state(dev, "uart");  in msm_serial_probe()
221 	priv->base = devfdt_get_addr(dev);  in msm_serial_ofdata_to_platdata()
222 	if (priv->base == FDT_ADDR_T_NONE)  in msm_serial_ofdata_to_platdata()
223 		return -EINVAL;  in msm_serial_ofdata_to_platdata()
229 	{ .compatible = "qcom,msm-uartdm-v1.4" },