16 #define RCAR_AHBPCI_PCICOM_OFFSET	0x800
18 #define RCAR_PCIAHB_WIN1_CTR_REG	(RCAR_AHBPCI_PCICOM_OFFSET + 0x00)
19 #define RCAR_PCIAHB_WIN2_CTR_REG	(RCAR_AHBPCI_PCICOM_OFFSET + 0x04)
20 #define RCAR_PCIAHB_PREFETCH0		0x0
21 #define RCAR_PCIAHB_PREFETCH4		0x1
22 #define RCAR_PCIAHB_PREFETCH8		0x2
23 #define RCAR_PCIAHB_PREFETCH16		0x3
25 #define RCAR_AHBPCI_WIN1_CTR_REG	(RCAR_AHBPCI_PCICOM_OFFSET + 0x10)
26 #define RCAR_AHBPCI_WIN2_CTR_REG	(RCAR_AHBPCI_PCICOM_OFFSET + 0x14)
32 #define RCAR_PCI_INT_ENABLE_REG		(RCAR_AHBPCI_PCICOM_OFFSET + 0x20)
33 #define RCAR_PCI_INT_STATUS_REG		(RCAR_AHBPCI_PCICOM_OFFSET + 0x24)
34 #define RCAR_PCI_INT_SIGTABORT		BIT(0)
55 #define RCAR_AHB_BUS_CTR_REG		(RCAR_AHBPCI_PCICOM_OFFSET + 0x30)
56 #define RCAR_AHB_BUS_MMODE_HTRANS	BIT(0)
67 #define RCAR_USBCTR_REG			(RCAR_AHBPCI_PCICOM_OFFSET + 0x34)
68 #define RCAR_USBCTR_USBH_RST		BIT(0)
73 #define RCAR_USBCTR_PCIAHB_WIN1_256M	(0 << 10)
79 #define RCAR_PCI_ARBITER_CTR_REG	(RCAR_AHBPCI_PCICOM_OFFSET + 0x40)
80 #define RCAR_PCI_ARBITER_PCIREQ0	BIT(0)
84 #define RCAR_PCI_UNIT_REV_REG		(RCAR_AHBPCI_PCICOM_OFFSET + 0x48)
103 	/* bridge logic only has registers to 0x40 */  in rcar_gen2_pci_addr_valid()
104 	if (slot == 0x0 && offset >= 0x40)  in rcar_gen2_pci_addr_valid()
107 	return 0;  in rcar_gen2_pci_addr_valid()
114 	return priv->cfg_base + (PCI_DEV(bdf) >> 1) * 0x100 + (offset & ~3);  in get_bus_address()
139 		return 0;  in rcar_gen2_pci_read_config()
146 	return 0;  in rcar_gen2_pci_read_config()
166 	return 0;  in rcar_gen2_pci_write_config()
176 	ret = clk_get_by_index(dev, 0, &pci_clk);  in rcar_gen2_pci_probe()
193 	writel((CONFIG_SYS_SDRAM_BASE & 0xf0000000) | RCAR_PCIAHB_PREFETCH16,  in rcar_gen2_pci_probe()
195 	writel(0xf0000000 | RCAR_PCIAHB_PREFETCH16,  in rcar_gen2_pci_probe()
204 	devad = setup_bus_address(dev, PCI_BDF(0, 0, 0), 0);  in rcar_gen2_pci_probe()
205 	writel(priv->cfg_base + 0x800, devad + PCI_BASE_ADDRESS_0);  in rcar_gen2_pci_probe()
206 	writel(CONFIG_SYS_SDRAM_BASE & 0xf0000000, devad + PCI_BASE_ADDRESS_1);  in rcar_gen2_pci_probe()
207 	writel(0xf0000000, devad + PCI_BASE_ADDRESS_2);  in rcar_gen2_pci_probe()
213 	devad = setup_bus_address(dev, PCI_BDF(0, 1, 0), 0);  in rcar_gen2_pci_probe()
214 	writel(priv->mem_base + 0x0, devad + PCI_BASE_ADDRESS_0);  in rcar_gen2_pci_probe()
220 	devad = setup_bus_address(dev, PCI_BDF(0, 2, 0), 0);  in rcar_gen2_pci_probe()
221 	writel(priv->mem_base + 0x1000, devad + PCI_BASE_ADDRESS_0);  in rcar_gen2_pci_probe()
230 	return 0;  in rcar_gen2_pci_probe()
237 	priv->cfg_base = devfdt_get_addr_index(dev, 0);  in rcar_gen2_pci_ofdata_to_platdata()
242 	return 0;  in rcar_gen2_pci_ofdata_to_platdata()