60 		__raw_writel(1 << cfg->complete_code, base + EDMA3_ICR);  in qedma3_start()
62 		__raw_writel(1 << cfg->complete_code, base + EDMA3_ICRH);  in qedma3_start()
69 	__raw_writel(qchmap, base + EDMA3_QCHMAP(cfg->chnum));  in qedma3_start()
72 	__raw_writel(1 << cfg->chnum, base + EDMA3_QSECR);  in qedma3_start()
73 	__raw_writel(1 << cfg->chnum, base + EDMA3_QEMCR);  in qedma3_start()
76 	__raw_writel(1 << cfg->chnum, base + EDMA3_QEESR);  in qedma3_start()
107 	__raw_writel(opt, &rg->opt);  in edma3_set_dest()
108 	__raw_writel(dst, &rg->dst);  in edma3_set_dest()
133 	__raw_writel((src_dst_bidx & 0x0000ffff) | (bidx << 16),  in edma3_set_dest_index()
135 	__raw_writel((src_dst_cidx & 0x0000ffff) | (cidx << 16),  in edma3_set_dest_index()
147 	__raw_writel(dst, &rg->dst);  in edma3_set_dest_addr()
178 	__raw_writel(opt, &rg->opt);  in edma3_set_src()
179 	__raw_writel(src, &rg->src);  in edma3_set_src()
204 	__raw_writel((src_dst_bidx & 0xffff0000) | bidx,  in edma3_set_src_index()
206 	__raw_writel((src_dst_cidx & 0xffff0000) | cidx,  in edma3_set_src_index()
218 	__raw_writel(src, &rg->src);  in edma3_set_src_addr()
263 	__raw_writel((bcnt_rld << 16) | (0x0000ffff & link_bcntrld),  in edma3_set_transfer_params()
268 		__raw_writel(opt & ~EDMA3_SLOPT_AB_SYNC, &rg->opt);  in edma3_set_transfer_params()
270 		__raw_writel(opt | EDMA3_SLOPT_AB_SYNC, &rg->opt);  in edma3_set_transfer_params()
273 	__raw_writel((bcnt << 16) | (acnt & 0xffff), &rg->a_b_cnt);  in edma3_set_transfer_params()
274 	__raw_writel(0xffff & ccnt, &rg->ccnt);  in edma3_set_transfer_params()
295 		__raw_writel(*p++, addr++);  in edma3_write_slot()
323 	__raw_writel(cfg->opt, &rg->opt);  in edma3_slot_configure()
324 	__raw_writel(cfg->src, &rg->src);  in edma3_slot_configure()
325 	__raw_writel((cfg->bcnt << 16) | (cfg->acnt & 0xffff), &rg->a_b_cnt);  in edma3_slot_configure()
326 	__raw_writel(cfg->dst, &rg->dst);  in edma3_slot_configure()
327 	__raw_writel((cfg->dst_bidx << 16) |  in edma3_slot_configure()
329 	__raw_writel((cfg->bcntrld << 16) |  in edma3_slot_configure()
331 	__raw_writel((cfg->dst_cidx << 16) |  in edma3_slot_configure()
333 	__raw_writel(0xffff & cfg->ccnt, &rg->ccnt);  in edma3_slot_configure()
366 	__raw_writel(inum, icr_base);  in edma3_check_for_transfer()
380 	__raw_writel(1 << cfg->chnum, base + EDMA3_QEECR);  in qedma3_stop()
384 		__raw_writel(1 << cfg->complete_code, base + EDMA3_ICR);  in qedma3_stop()
386 		__raw_writel(1 << cfg->complete_code, base + EDMA3_ICRH);  in qedma3_stop()
389 	__raw_writel(1 << cfg->chnum, base + EDMA3_QSECR);  in qedma3_stop()
390 	__raw_writel(1 << cfg->chnum, base + EDMA3_QEMCR);  in qedma3_stop()
393 	__raw_writel(0, base + EDMA3_QCHMAP(cfg->chnum));  in qedma3_stop()