clk/renesas/r8a7790-cpg-mssr.c

2  * r8a7790 Clock Pulse Generator / Module Standby and Software Reset
6  * Based on clk-rcar-gen2.c
16 #include <clk-uclass.h>
19 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen2-cpg.h"
103 	DEF_MOD("2d-dmac",		 115,	R8A7790_CLK_ZS),
104 	DEF_MOD("fdp1-2",		 117,	R8A7790_CLK_ZS),
105 	DEF_MOD("fdp1-1",		 118,	R8A7790_CLK_ZS),
106 	DEF_MOD("fdp1-0",		 119,	R8A7790_CLK_ZS),
113 	DEF_MOD("vsp1-rt",		 130,	R8A7790_CLK_ZS),
114 	DEF_MOD("vsp1-sy",		 131,	R8A7790_CLK_ZS),
124 	DEF_MOD("sys-dmac1",		 218,	R8A7790_CLK_ZS),
125 	DEF_MOD("sys-dmac0",		 219,	R8A7790_CLK_ZS),
140 	DEF_MOD("usbhs-dmac0",		 330,	R8A7790_CLK_HP),
141 	DEF_MOD("usbhs-dmac1",		 331,	R8A7790_CLK_HP),
143 	DEF_MOD("intc-sys",		 408,	R8A7790_CLK_ZS),
144 	DEF_MOD("audio-dmac1",		 501,	R8A7790_CLK_HP),
145 	DEF_MOD("audio-dmac0",		 502,	R8A7790_CLK_HP),
149 	DEF_MOD("usb-ehci",		 703,	R8A7790_CLK_MP),
169 	DEF_MOD("gyro-adc",		 901,	R8A7790_CLK_P),
184 	DEF_MOD("ssi-all",		1005,	R8A7790_CLK_P),
195 	DEF_MOD("scu-all",		1017,	R8A7790_CLK_P),
196 	DEF_MOD("scu-dvc1",		1018,	MOD_CLK_ID(1017)),
197 	DEF_MOD("scu-dvc0",		1019,	MOD_CLK_ID(1017)),
198 	DEF_MOD("scu-ctu1-mix1",	1020,	MOD_CLK_ID(1017)),
199 	DEF_MOD("scu-ctu0-mix0",	1021,	MOD_CLK_ID(1017)),
200 	DEF_MOD("scu-src9",		1022,	MOD_CLK_ID(1017)),
201 	DEF_MOD("scu-src8",		1023,	MOD_CLK_ID(1017)),
202 	DEF_MOD("scu-src7",		1024,	MOD_CLK_ID(1017)),
203 	DEF_MOD("scu-src6",		1025,	MOD_CLK_ID(1017)),
204 	DEF_MOD("scu-src5",		1026,	MOD_CLK_ID(1017)),
205 	DEF_MOD("scu-src4",		1027,	MOD_CLK_ID(1017)),
206 	DEF_MOD("scu-src3",		1028,	MOD_CLK_ID(1017)),
207 	DEF_MOD("scu-src2",		1029,	MOD_CLK_ID(1017)),
208 	DEF_MOD("scu-src1",		1030,	MOD_CLK_ID(1017)),
209 	DEF_MOD("scu-src0",		1031,	MOD_CLK_ID(1017)),
219  *---------------------------------------------------
266 	.reset_node		= "renesas,r8a7790-rst",
277 		.compatible	= "renesas,r8a7790-cpg-mssr",