1 // SPDX-License-Identifier: GPL-2.0+
8 #include <clk-uclass.h>
20  * generated_clk_bind() - for the generated clock driver
21  * Recursively bind its children as clk devices.
27 	return at91_clk_sub_device_bind(dev, "generic-clk");  in generated_clk_bind()
31 	{ .compatible = "atmel,sama5d2-clk-generated" },
36 	.name = "generated-clk",
42 /*-------------------------------------------------------------*/
48 static ulong generic_clk_get_rate(struct clk *clk)  in generic_clk_get_rate()  argument
50 	struct pmc_platdata *plat = dev_get_platdata(clk->dev);  in generic_clk_get_rate()
51 	struct at91_pmc *pmc = plat->reg_base;  in generic_clk_get_rate()
52 	struct clk parent;  in generic_clk_get_rate()  local
58 	writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);  in generic_clk_get_rate()
59 	tmp = readl(&pmc->pcr);  in generic_clk_get_rate()
64 	parent_index = clock_source - 1;  in generic_clk_get_rate()
65 	ret = clk_get_by_index(dev_get_parent(clk->dev), parent_index, &parent);  in generic_clk_get_rate()
69 	clk_rate = clk_get_rate(&parent) / (gckdiv + 1);  in generic_clk_get_rate()
71 	clk_free(&parent);  in generic_clk_get_rate()
76 static ulong generic_clk_set_rate(struct clk *clk, ulong rate)  in generic_clk_set_rate()  argument
78 	struct pmc_platdata *plat = dev_get_platdata(clk->dev);  in generic_clk_set_rate()
79 	struct at91_pmc *pmc = plat->reg_base;  in generic_clk_set_rate()
80 	struct generic_clk_priv *priv = dev_get_priv(clk->dev);  in generic_clk_set_rate()
81 	struct clk parent, best_parent;  in generic_clk_set_rate()  local
83 	int tmp_diff, best_diff = -1;  in generic_clk_set_rate()
90 	for (i = 0; i < priv->num_parents; i++) {  in generic_clk_set_rate()
91 		ret = clk_get_by_index(dev_get_parent(clk->dev), i, &parent);  in generic_clk_set_rate()
95 		parent_rate = clk_get_rate(&parent);  in generic_clk_set_rate()
101 			tmp_diff = abs(rate - tmp_rate);  in generic_clk_set_rate()
107 				best_div = div - 1;  in generic_clk_set_rate()
108 				best_parent = parent;  in generic_clk_set_rate()
121 	debug("GCK: best parent: %s, best_rate = %ld, best_div = %d\n",  in generic_clk_set_rate()
122 	      best_parent.dev->name, best_rate, best_div);  in generic_clk_set_rate()
128 	writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);  in generic_clk_set_rate()
129 	tmp = readl(&pmc->pcr);  in generic_clk_set_rate()
135 	writel(tmp, &pmc->pcr);  in generic_clk_set_rate()
137 	while (!(readl(&pmc->sr) & AT91_PMC_GCKRDY))  in generic_clk_set_rate()
155 	num_parents = fdtdec_get_int_array_count(gd->fdt_blob,  in generic_clk_ofdata_to_platdata()
160 		return -1;  in generic_clk_ofdata_to_platdata()
162 	priv->num_parents = num_parents;  in generic_clk_ofdata_to_platdata()
168 	.name = "generic-clk",