device-tree-bindings/serial/8250.txt

4 - compatible : one of:
5 	- "ns8250"
6 	- "ns16450"
7 	- "ns16550a"
8 	- "ns16550"
9 	- "ns16750"
10 	- "ns16850"
11 	- For Tegra20, must contain "nvidia,tegra20-uart"
12 	- For other Tegra, must contain '"nvidia,<chip>-uart",
13 	  "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
15 	- "nxp,lpc3220-uart"
16 	- "ralink,rt2880-uart"
17 	- "ibm,qpace-nwp-serial"
18 	- "altr,16550-FIFO32"
19 	- "altr,16550-FIFO64"
20 	- "altr,16550-FIFO128"
21 	- "fsl,16550-FIFO64"
22 	- "fsl,ns16550"
23 	- "serial" if the port type is unknown.
24 - reg : offset and length of the register set for the device.
25 - interrupts : should contain uart interrupt.
26 - clock-frequency : the input clock frequency for the UART
29   /bindings/clock/clock-bindings.txt
32 - current-speed : the current active speed of the UART.
33 - reg-offset : offset to apply to the mapbase from the start of the registers.
34 - reg-shift : quantity to shift the register offsets by.
35 - reg-io-width : the size (in bytes) of the IO accesses that should be
36   performed on the device.  There are some systems that require 32-bit
38 - used-by-rtas : set to indicate that the port is in use by the OpenFirmware
40 - no-loopback-test: set to indicate that the port does not implements loopback
42 - fifo-size: the fifo size of the UART.
43 - auto-flow-control: one way to enable automatic flow control support. The
49   ------------
52   erratum A-004737 (relating to incorrect BRK handling).
63 		clock-frequency = <3686400>;
65 		reg-shift = <2>;