Lines Matching +full:0 +full:x00030000
11 #define SD_DLL_CTRL 0xFF180358
12 #define SD_ITAP_DLY 0xFF180314
13 #define SD_OTAP_DLY 0xFF180318
14 #define SD0_DLL_RST_MASK 0x00000004
15 #define SD0_DLL_RST 0x00000004
16 #define SD1_DLL_RST_MASK 0x00040000
17 #define SD1_DLL_RST 0x00040000
18 #define SD0_ITAPCHGWIN_MASK 0x00000200
19 #define SD0_ITAPCHGWIN 0x00000200
20 #define SD1_ITAPCHGWIN_MASK 0x02000000
21 #define SD1_ITAPCHGWIN 0x02000000
22 #define SD0_ITAPDLYENA_MASK 0x00000100
23 #define SD0_ITAPDLYENA 0x00000100
24 #define SD1_ITAPDLYENA_MASK 0x01000000
25 #define SD1_ITAPDLYENA 0x01000000
26 #define SD0_ITAPDLYSEL_MASK 0x000000FF
27 #define SD0_ITAPDLYSEL_HSD 0x00000015
28 #define SD0_ITAPDLYSEL_SD_DDR50 0x0000003D
29 #define SD0_ITAPDLYSEL_MMC_DDR50 0x00000012
31 #define SD1_ITAPDLYSEL_MASK 0x00FF0000
32 #define SD1_ITAPDLYSEL_HSD 0x00150000
33 #define SD1_ITAPDLYSEL_SD_DDR50 0x003D0000
34 #define SD1_ITAPDLYSEL_MMC_DDR50 0x00120000
36 #define SD0_OTAPDLYSEL_MASK 0x0000003F
37 #define SD0_OTAPDLYSEL_MMC_HSD 0x00000006
38 #define SD0_OTAPDLYSEL_SD_HSD 0x00000005
39 #define SD0_OTAPDLYSEL_SDR50 0x00000003
40 #define SD0_OTAPDLYSEL_SDR104_B0 0x00000003
41 #define SD0_OTAPDLYSEL_SDR104_B2 0x00000002
42 #define SD0_OTAPDLYSEL_SD_DDR50 0x00000004
43 #define SD0_OTAPDLYSEL_MMC_DDR50 0x00000006
45 #define SD1_OTAPDLYSEL_MASK 0x003F0000
46 #define SD1_OTAPDLYSEL_MMC_HSD 0x00060000
47 #define SD1_OTAPDLYSEL_SD_HSD 0x00050000
48 #define SD1_OTAPDLYSEL_SDR50 0x00030000
49 #define SD1_OTAPDLYSEL_SDR104_B0 0x00030000
50 #define SD1_OTAPDLYSEL_SDR104_B2 0x00020000
51 #define SD1_OTAPDLYSEL_SD_DDR50 0x00040000
52 #define SD1_OTAPDLYSEL_MMC_DDR50 0x00060000
54 #define MMC_BANK2 0x2
68 if (deviceid == 0) in zynqmp_dll_reset()
78 if (deviceid == 0) in zynqmp_dll_reset()
79 zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0); in zynqmp_dll_reset()
81 zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0); in zynqmp_dll_reset()
86 if (deviceid == 0) { in arasan_zynqmp_tap_sdr104()
107 if (deviceid == 0) { in arasan_zynqmp_tap_hs()
115 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_hs()
131 zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_hs()
144 if (deviceid == 0) { in arasan_zynqmp_tap_ddr50()
156 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_ddr50()
176 zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_ddr50()
189 if (deviceid == 0) { in arasan_zynqmp_tap_sdr50()
202 if (deviceid == 0) in arasan_zynqmp_set_tapdelay()
225 if (deviceid == 0) in arasan_zynqmp_set_tapdelay()
226 zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0); in arasan_zynqmp_set_tapdelay()
228 zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0); in arasan_zynqmp_set_tapdelay()