Lines Matching +full:0 +full:x00020002
26 #define SD2CKCR 0xE615026C
27 #define SD_97500KHZ 0x7
37 static const u32 dbsc3_1_base = DBSC3_0_BASE + 0x10000; in dbsc_wait()
39 while (!(readl(dbsc3_0_base + reg) & BIT(0))) in dbsc_wait()
42 while (!(readl(dbsc3_1_base + reg) & BIT(0))) in dbsc_wait()
48 u32 r0 = 0; in spl_init_sys()
50 writel(0xa5a5a500, 0xe6020004); in spl_init_sys()
51 writel(0xa5a5a500, 0xe6030004); in spl_init_sys()
55 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
57 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
59 "mrc 15, 0, %0, cr1, cr0, 0 \n" in spl_init_sys()
60 "orr %0, #0x1800 \n" in spl_init_sys()
61 "mcr 15, 0, %0, cr1, cr0, 0 \n" in spl_init_sys()
69 { 0x0090, 0x00140300 }, in spl_init_pfc()
70 { 0x0094, 0x09500000 }, in spl_init_pfc()
71 { 0x0098, 0xc0000084 }, in spl_init_pfc()
72 { 0x0020, 0x01a33492 }, in spl_init_pfc()
73 { 0x0024, 0x10000000 }, in spl_init_pfc()
74 { 0x0028, 0x08449252 }, in spl_init_pfc()
75 { 0x002c, 0x2925b322 }, in spl_init_pfc()
76 { 0x0030, 0x0c311249 }, in spl_init_pfc()
77 { 0x0034, 0x10124000 }, in spl_init_pfc()
78 { 0x0038, 0x00001295 }, in spl_init_pfc()
79 { 0x003c, 0x50890000 }, in spl_init_pfc()
80 { 0x0040, 0x0eaa56aa }, in spl_init_pfc()
81 { 0x0044, 0x55550000 }, in spl_init_pfc()
82 { 0x0048, 0x00000005 }, in spl_init_pfc()
83 { 0x004c, 0x54800000 }, in spl_init_pfc()
84 { 0x0050, 0x3736db55 }, in spl_init_pfc()
85 { 0x0054, 0x29148da3 }, in spl_init_pfc()
86 { 0x0058, 0x48c446e1 }, in spl_init_pfc()
87 { 0x005c, 0x2a3a54dc }, in spl_init_pfc()
88 { 0x0160, 0x00000023 }, in spl_init_pfc()
89 { 0x0004, 0xfca0ffff }, in spl_init_pfc()
90 { 0x0008, 0x3fbffbf0 }, in spl_init_pfc()
91 { 0x000c, 0x3ffdffff }, in spl_init_pfc()
92 { 0x0010, 0x00ffffff }, in spl_init_pfc()
93 { 0x0014, 0xfc3ffff3 }, in spl_init_pfc()
94 { 0x0018, 0xe4fdfff7 }, in spl_init_pfc()
98 { 0x0104, 0xffffbfff }, in spl_init_pfc()
99 { 0x0108, 0xb1ffffe1 }, in spl_init_pfc()
100 { 0x010c, 0xffffffff }, in spl_init_pfc()
101 { 0x0110, 0xffffffff }, in spl_init_pfc()
102 { 0x0114, 0xe047beab }, in spl_init_pfc()
103 { 0x0118, 0x00000203 }, in spl_init_pfc()
106 static const u32 pfc_base = 0xe6060000; in spl_init_pfc()
110 for (i = 0; i < ARRAY_SIZE(pfc_with_unlock); i++) { in spl_init_pfc()
116 for (i = 0; i < ARRAY_SIZE(pfc_without_unlock); i++) in spl_init_pfc()
124 0x1000, 0x3000, 0x4000, 0x5000 in spl_init_gpio()
128 { 0x4000, 0x00c00000 }, in spl_init_gpio()
129 { 0x5000, 0x63020000 }, in spl_init_gpio()
133 { 0x1000, 0x00000000 }, in spl_init_gpio()
134 { 0x3000, 0x00000000 }, in spl_init_gpio()
135 { 0x4000, 0x00c00000 }, in spl_init_gpio()
136 { 0x5000, 0xe3020000 }, in spl_init_gpio()
139 static const u32 gpio_base = 0xe6050000; in spl_init_gpio()
143 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio()
144 writel(0, gpio_base | 0x20 | gpio_offs[i]); in spl_init_gpio()
146 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio()
147 writel(0, gpio_base | 0x00 | gpio_offs[i]); in spl_init_gpio()
149 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio()
150 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); in spl_init_gpio()
152 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio()
153 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off); in spl_init_gpio()
159 { 0x00, 0x00000020 }, in spl_init_lbsc()
160 { 0x08, 0x00002020 }, in spl_init_lbsc()
161 { 0x30, 0x02150326 }, in spl_init_lbsc()
162 { 0x38, 0x077f077f }, in spl_init_lbsc()
166 0x80, 0x84, 0x88, 0x8c, 0xa0, 0xc0, 0xc4, 0xc8, 0x180 in spl_init_lbsc()
169 static const u32 lbsc_base = 0xfec00200; in spl_init_lbsc()
173 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc()
180 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc()
181 writel(0, lbsc_base | lbsc_offs[i]); in spl_init_lbsc()
187 { 0x0280, 0x0000a55a }, in spl_init_dbsc()
188 { 0x0018, 0x21000000 }, in spl_init_dbsc()
189 { 0x0018, 0x11000000 }, in spl_init_dbsc()
190 { 0x0018, 0x10000000 }, in spl_init_dbsc()
191 { 0x0290, 0x00000001 }, in spl_init_dbsc()
192 { 0x02a0, 0x80000000 }, in spl_init_dbsc()
193 { 0x0290, 0x00000004 }, in spl_init_dbsc()
197 { 0x0290, 0x00000006 }, in spl_init_dbsc()
198 { 0x02a0, 0x0001c000 }, in spl_init_dbsc()
202 { 0x0290, 0x0000000f }, in spl_init_dbsc()
203 { 0x02a0, 0x00181885 }, in spl_init_dbsc()
204 { 0x0290, 0x00000070 }, in spl_init_dbsc()
205 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
206 { 0x0290, 0x00000080 }, in spl_init_dbsc()
207 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
208 { 0x0290, 0x00000090 }, in spl_init_dbsc()
209 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
210 { 0x0290, 0x000000a0 }, in spl_init_dbsc()
211 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
212 { 0x0290, 0x000000b0 }, in spl_init_dbsc()
213 { 0x02a0, 0x7c000880 }, in spl_init_dbsc()
214 { 0x0290, 0x000000c0 }, in spl_init_dbsc()
215 { 0x02a0, 0x7c000880 }, in spl_init_dbsc()
216 { 0x0290, 0x000000d0 }, in spl_init_dbsc()
217 { 0x02a0, 0x7c000880 }, in spl_init_dbsc()
218 { 0x0290, 0x000000e0 }, in spl_init_dbsc()
219 { 0x02a0, 0x7c000880 }, in spl_init_dbsc()
223 { 0x0290, 0x0000000f }, in spl_init_dbsc()
224 { 0x02a0, 0x00181885 }, in spl_init_dbsc()
225 { 0x0290, 0x00000070 }, in spl_init_dbsc()
226 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
227 { 0x0290, 0x00000080 }, in spl_init_dbsc()
228 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
229 { 0x0290, 0x00000090 }, in spl_init_dbsc()
230 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
231 { 0x0290, 0x000000a0 }, in spl_init_dbsc()
232 { 0x02a0, 0x7c000887 }, in spl_init_dbsc()
236 { 0x0290, 0x0000000f }, in spl_init_dbsc()
237 { 0x02a0, 0x00181224 }, in spl_init_dbsc()
241 { 0x0290, 0x00000010 }, in spl_init_dbsc()
242 { 0x02a0, 0xf004649b }, in spl_init_dbsc()
243 { 0x0290, 0x00000061 }, in spl_init_dbsc()
244 { 0x02a0, 0x0000006d }, in spl_init_dbsc()
245 { 0x0290, 0x00000001 }, in spl_init_dbsc()
246 { 0x02a0, 0x00000073 }, in spl_init_dbsc()
247 { 0x0020, 0x00000007 }, in spl_init_dbsc()
248 { 0x0024, 0x0f030a02 }, in spl_init_dbsc()
249 { 0x0030, 0x00000001 }, in spl_init_dbsc()
250 { 0x00b0, 0x00000000 }, in spl_init_dbsc()
251 { 0x0040, 0x0000000b }, in spl_init_dbsc()
252 { 0x0044, 0x00000008 }, in spl_init_dbsc()
253 { 0x0048, 0x00000000 }, in spl_init_dbsc()
254 { 0x0050, 0x0000000b }, in spl_init_dbsc()
255 { 0x0054, 0x000c000b }, in spl_init_dbsc()
256 { 0x0058, 0x00000027 }, in spl_init_dbsc()
257 { 0x005c, 0x0000001c }, in spl_init_dbsc()
258 { 0x0060, 0x00000006 }, in spl_init_dbsc()
259 { 0x0064, 0x00000020 }, in spl_init_dbsc()
260 { 0x0068, 0x00000008 }, in spl_init_dbsc()
261 { 0x006c, 0x0000000c }, in spl_init_dbsc()
262 { 0x0070, 0x00000009 }, in spl_init_dbsc()
263 { 0x0074, 0x00000012 }, in spl_init_dbsc()
264 { 0x0078, 0x000000d0 }, in spl_init_dbsc()
265 { 0x007c, 0x00140005 }, in spl_init_dbsc()
266 { 0x0080, 0x00050004 }, in spl_init_dbsc()
267 { 0x0084, 0x70233005 }, in spl_init_dbsc()
268 { 0x0088, 0x000c0000 }, in spl_init_dbsc()
269 { 0x008c, 0x00000200 }, in spl_init_dbsc()
270 { 0x0090, 0x00000040 }, in spl_init_dbsc()
271 { 0x0100, 0x00000001 }, in spl_init_dbsc()
272 { 0x00c0, 0x00020001 }, in spl_init_dbsc()
273 { 0x00c8, 0x20042004 }, in spl_init_dbsc()
274 { 0x0380, 0x00020002 }, in spl_init_dbsc()
275 { 0x0390, 0x0000001f }, in spl_init_dbsc()
279 { 0x0244, 0x00000011 }, in spl_init_dbsc()
280 { 0x0290, 0x00000003 }, in spl_init_dbsc()
281 { 0x02a0, 0x0300c4e1 }, in spl_init_dbsc()
282 { 0x0290, 0x00000023 }, in spl_init_dbsc()
283 { 0x02a0, 0x00fcdb60 }, in spl_init_dbsc()
284 { 0x0290, 0x00000011 }, in spl_init_dbsc()
285 { 0x02a0, 0x1000040b }, in spl_init_dbsc()
286 { 0x0290, 0x00000012 }, in spl_init_dbsc()
287 { 0x02a0, 0x9d9cbb66 }, in spl_init_dbsc()
288 { 0x0290, 0x00000013 }, in spl_init_dbsc()
289 { 0x02a0, 0x1a868400 }, in spl_init_dbsc()
290 { 0x0290, 0x00000014 }, in spl_init_dbsc()
291 { 0x02a0, 0x300214d8 }, in spl_init_dbsc()
292 { 0x0290, 0x00000015 }, in spl_init_dbsc()
293 { 0x02a0, 0x00000d70 }, in spl_init_dbsc()
294 { 0x0290, 0x00000016 }, in spl_init_dbsc()
295 { 0x02a0, 0x00000006 }, in spl_init_dbsc()
296 { 0x0290, 0x00000017 }, in spl_init_dbsc()
297 { 0x02a0, 0x00000018 }, in spl_init_dbsc()
298 { 0x0290, 0x0000001a }, in spl_init_dbsc()
299 { 0x02a0, 0x910035c7 }, in spl_init_dbsc()
300 { 0x0290, 0x00000004 }, in spl_init_dbsc()
304 { 0x0290, 0x00000001 }, in spl_init_dbsc()
305 { 0x02a0, 0x00000181 }, in spl_init_dbsc()
306 { 0x0018, 0x11000000 }, in spl_init_dbsc()
307 { 0x0290, 0x00000004 }, in spl_init_dbsc()
311 { 0x0290, 0x00000001 }, in spl_init_dbsc()
312 { 0x02a0, 0x0000fe01 }, in spl_init_dbsc()
313 { 0x0304, 0x00000000 }, in spl_init_dbsc()
314 { 0x00f4, 0x01004c20 }, in spl_init_dbsc()
315 { 0x00f8, 0x014000aa }, in spl_init_dbsc()
316 { 0x00e0, 0x00000140 }, in spl_init_dbsc()
317 { 0x00e4, 0x00081860 }, in spl_init_dbsc()
318 { 0x00e8, 0x00010000 }, in spl_init_dbsc()
319 { 0x0290, 0x00000004 }, in spl_init_dbsc()
323 { 0x0014, 0x00000001 }, in spl_init_dbsc()
324 { 0x0010, 0x00000001 }, in spl_init_dbsc()
325 { 0x0280, 0x00000000 }, in spl_init_dbsc()
329 static const u32 dbsc3_1_base = DBSC3_0_BASE + 0x10000; in spl_init_dbsc()
330 static const u32 prr_base = 0xff000044; in spl_init_dbsc()
331 const u16 prr_rev = readl(prr_base) & 0x7fff; in spl_init_dbsc()
334 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) { in spl_init_dbsc()
339 dbsc_wait(0x2a0); in spl_init_dbsc()
341 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) { in spl_init_dbsc()
346 if (prr_rev == 0x4500) { in spl_init_dbsc()
347 for (i = 0; i < ARRAY_SIZE(dbsc_config3r0d0); i++) { in spl_init_dbsc()
351 for (i = 0; i < ARRAY_SIZE(dbsc_config3r0d1); i++) { in spl_init_dbsc()
355 } else if (prr_rev != 0x4510) { in spl_init_dbsc()
356 for (i = 0; i < ARRAY_SIZE(dbsc_config3r2); i++) { in spl_init_dbsc()
364 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) { in spl_init_dbsc()
369 dbsc_wait(0x240); in spl_init_dbsc()
371 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) { in spl_init_dbsc()
376 dbsc_wait(0x2a0); in spl_init_dbsc()
378 for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++) { in spl_init_dbsc()
383 dbsc_wait(0x2a0); in spl_init_dbsc()
385 for (i = 0; i < ARRAY_SIZE(dbsc_config7); i++) { in spl_init_dbsc()
390 dbsc_wait(0x2a0); in spl_init_dbsc()
392 for (i = 0; i < ARRAY_SIZE(dbsc_config8); i++) { in spl_init_dbsc()
403 static const u32 qspi_base = 0xe6b10000; in spl_init_qspi()
405 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
406 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
407 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
408 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
409 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
410 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
411 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
412 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
414 writew(0xe080, qspi_base + 0x10); in spl_init_qspi()
416 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
417 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
418 writeb(0x00, qspi_base + 0x08); in spl_init_qspi()
419 writeb(0x48, qspi_base + 0x00); in spl_init_qspi()
449 const u32 jtag_magic = 0x1337c0de; in board_boot_order()
450 const u32 load_magic = 0xb33fc0de; in board_boot_order()
453 * If JTAG probe sets special word at 0xe6300020, then it must in board_boot_order()
456 if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) { in board_boot_order()
459 while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic) in board_boot_order()
462 spl_boot_list[0] = BOOT_DEVICE_RAM; in board_boot_order()
469 spl_boot_list[0] = BOOT_DEVICE_SPI; in board_boot_order()