Lines Matching +full:0 +full:x00020002

32 #define	CPG_PLL1CR	0xE6150028
33 #define CPG_PLL3CR 0xE61500DC
50 if (cpu_type == 0x4A) { in blanche_init_sys()
51 writel(0x4D000000, CPG_PLL1CR); in blanche_init_sys()
52 writel(0x4F000000, CPG_PLL3CR); in blanche_init_sys()
56 writel(0xA5A5A500, &rwdt->rwtcsra); in blanche_init_sys()
57 writel(0xA5A5A500, &swdt->swtcsra); in blanche_init_sys()
63 { 0x0004, 0x0bffffff }, in blanche_init_pfc()
64 { 0x0008, 0x002fffff }, in blanche_init_pfc()
65 { 0x0014, 0x00000fff }, in blanche_init_pfc()
66 { 0x0018, 0x00010fff }, in blanche_init_pfc()
67 { 0x001c, 0x00010fff }, in blanche_init_pfc()
68 { 0x0020, 0x00010fff }, in blanche_init_pfc()
69 { 0x0024, 0x00010fff }, in blanche_init_pfc()
70 { 0x0028, 0x00010fff }, in blanche_init_pfc()
71 { 0x002c, 0x04006000 }, in blanche_init_pfc()
72 { 0x0030, 0x303fefe0 }, in blanche_init_pfc()
73 { 0x0058, 0x0002000e }, in blanche_init_pfc()
77 { 0x0108, 0x00000000 }, in blanche_init_pfc()
78 { 0x010c, 0x0803FF40 }, in blanche_init_pfc()
79 { 0x0110, 0x0000FFFF }, in blanche_init_pfc()
80 { 0x0114, 0x00010FFF }, in blanche_init_pfc()
81 { 0x011c, 0x0001AFFF }, in blanche_init_pfc()
82 { 0x0124, 0x0001CFFF }, in blanche_init_pfc()
83 { 0x0128, 0xC0438001 }, in blanche_init_pfc()
84 { 0x012c, 0x0FC00007 }, in blanche_init_pfc()
87 static const u32 pfc_base = 0xe6060000; in blanche_init_pfc()
91 for (i = 0; i < ARRAY_SIZE(pfc_with_unlock); i++) { in blanche_init_pfc()
97 for (i = 0; i < ARRAY_SIZE(pfc_without_unlock); i++) in blanche_init_pfc()
105 { 0x00, 0x00000020 }, in blanche_init_lbsc()
106 { 0x08, 0x00002020 }, in blanche_init_lbsc()
107 { 0x30, 0x2a103320 }, in blanche_init_lbsc()
108 { 0x38, 0x19102110 }, in blanche_init_lbsc()
111 static const u32 lbsc_base = 0xfec00200; in blanche_init_lbsc()
115 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in blanche_init_lbsc()
128 while (!(readl(dbsc3_0_base + reg) & BIT(0))) in dbsc_wait()
135 { 0x0280, 0x0000a55a }, in blanche_init_dbsc()
136 { 0x0018, 0x21000000 }, in blanche_init_dbsc()
137 { 0x0018, 0x11000000 }, in blanche_init_dbsc()
138 { 0x0018, 0x10000000 }, in blanche_init_dbsc()
139 { 0x0290, 0x00000001 }, in blanche_init_dbsc()
140 { 0x02a0, 0x80000000 }, in blanche_init_dbsc()
141 { 0x0290, 0x00000004 }, in blanche_init_dbsc()
145 { 0x0290, 0x00000006 }, in blanche_init_dbsc()
146 { 0x02a0, 0x0001c000 }, in blanche_init_dbsc()
150 { 0x0290, 0x0000000f }, in blanche_init_dbsc()
151 { 0x02a0, 0x00181ee4 }, in blanche_init_dbsc()
152 { 0x0290, 0x00000010 }, in blanche_init_dbsc()
153 { 0x02a0, 0xf00464db }, in blanche_init_dbsc()
154 { 0x0290, 0x00000061 }, in blanche_init_dbsc()
155 { 0x02a0, 0x0000008d }, in blanche_init_dbsc()
156 { 0x0290, 0x00000001 }, in blanche_init_dbsc()
157 { 0x02a0, 0x00000073 }, in blanche_init_dbsc()
158 { 0x0020, 0x00000007 }, in blanche_init_dbsc()
159 { 0x0024, 0x0f030a02 }, in blanche_init_dbsc()
160 { 0x0030, 0x00000001 }, in blanche_init_dbsc()
161 { 0x00b0, 0x00000000 }, in blanche_init_dbsc()
162 { 0x0040, 0x0000000b }, in blanche_init_dbsc()
163 { 0x0044, 0x00000008 }, in blanche_init_dbsc()
164 { 0x0048, 0x00000000 }, in blanche_init_dbsc()
165 { 0x0050, 0x0000000b }, in blanche_init_dbsc()
166 { 0x0054, 0x000c000b }, in blanche_init_dbsc()
167 { 0x0058, 0x00000027 }, in blanche_init_dbsc()
168 { 0x005c, 0x0000001c }, in blanche_init_dbsc()
169 { 0x0060, 0x00000006 }, in blanche_init_dbsc()
170 { 0x0064, 0x00000020 }, in blanche_init_dbsc()
171 { 0x0068, 0x00000008 }, in blanche_init_dbsc()
172 { 0x006c, 0x0000000c }, in blanche_init_dbsc()
173 { 0x0070, 0x00000009 }, in blanche_init_dbsc()
174 { 0x0074, 0x00000012 }, in blanche_init_dbsc()
175 { 0x0078, 0x000000d0 }, in blanche_init_dbsc()
176 { 0x007c, 0x00140005 }, in blanche_init_dbsc()
177 { 0x0080, 0x00050004 }, in blanche_init_dbsc()
178 { 0x0084, 0x70233005 }, in blanche_init_dbsc()
179 { 0x0088, 0x000c0000 }, in blanche_init_dbsc()
180 { 0x008c, 0x00000300 }, in blanche_init_dbsc()
181 { 0x0090, 0x00000040 }, in blanche_init_dbsc()
182 { 0x0100, 0x00000001 }, in blanche_init_dbsc()
183 { 0x00c0, 0x00020001 }, in blanche_init_dbsc()
184 { 0x00c8, 0x20082004 }, in blanche_init_dbsc()
185 { 0x0380, 0x00020002 }, in blanche_init_dbsc()
186 { 0x0390, 0x0000001f }, in blanche_init_dbsc()
190 { 0x0244, 0x00000011 }, in blanche_init_dbsc()
191 { 0x0290, 0x00000003 }, in blanche_init_dbsc()
192 { 0x02a0, 0x0300c4e1 }, in blanche_init_dbsc()
193 { 0x0290, 0x00000023 }, in blanche_init_dbsc()
194 { 0x02a0, 0x00fcdb60 }, in blanche_init_dbsc()
195 { 0x0290, 0x00000011 }, in blanche_init_dbsc()
196 { 0x02a0, 0x1000040b }, in blanche_init_dbsc()
197 { 0x0290, 0x00000012 }, in blanche_init_dbsc()
198 { 0x02a0, 0x9d9cbb66 }, in blanche_init_dbsc()
199 { 0x0290, 0x00000013 }, in blanche_init_dbsc()
200 { 0x02a0, 0x1a868400 }, in blanche_init_dbsc()
201 { 0x0290, 0x00000014 }, in blanche_init_dbsc()
202 { 0x02a0, 0x300214d8 }, in blanche_init_dbsc()
203 { 0x0290, 0x00000015 }, in blanche_init_dbsc()
204 { 0x02a0, 0x00000d70 }, in blanche_init_dbsc()
205 { 0x0290, 0x00000016 }, in blanche_init_dbsc()
206 { 0x02a0, 0x00000004 }, in blanche_init_dbsc()
207 { 0x0290, 0x00000017 }, in blanche_init_dbsc()
208 { 0x02a0, 0x00000018 }, in blanche_init_dbsc()
209 { 0x0290, 0x0000001a }, in blanche_init_dbsc()
210 { 0x02a0, 0x910035c7 }, in blanche_init_dbsc()
211 { 0x0290, 0x00000004 }, in blanche_init_dbsc()
215 { 0x0290, 0x00000001 }, in blanche_init_dbsc()
216 { 0x02a0, 0x00000181 }, in blanche_init_dbsc()
217 { 0x0018, 0x11000000 }, in blanche_init_dbsc()
218 { 0x0290, 0x00000004 }, in blanche_init_dbsc()
222 { 0x0290, 0x00000001 }, in blanche_init_dbsc()
223 { 0x02a0, 0x0000fe01 }, in blanche_init_dbsc()
224 { 0x0304, 0x00000000 }, in blanche_init_dbsc()
225 { 0x00f4, 0x01004c20 }, in blanche_init_dbsc()
226 { 0x00f8, 0x014000aa }, in blanche_init_dbsc()
227 { 0x00e0, 0x00000140 }, in blanche_init_dbsc()
228 { 0x00e4, 0x00081860 }, in blanche_init_dbsc()
229 { 0x00e8, 0x00010000 }, in blanche_init_dbsc()
230 { 0x0290, 0x00000004 }, in blanche_init_dbsc()
234 { 0x0014, 0x00000001 }, in blanche_init_dbsc()
235 { 0x0010, 0x00000001 }, in blanche_init_dbsc()
236 { 0x0280, 0x00000000 }, in blanche_init_dbsc()
242 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in blanche_init_dbsc()
245 dbsc_wait(0x2a0); in blanche_init_dbsc()
247 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) in blanche_init_dbsc()
250 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in blanche_init_dbsc()
253 dbsc_wait(0x240); in blanche_init_dbsc()
255 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in blanche_init_dbsc()
258 dbsc_wait(0x2a0); in blanche_init_dbsc()
260 for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++) in blanche_init_dbsc()
263 dbsc_wait(0x2a0); in blanche_init_dbsc()
265 for (i = 0; i < ARRAY_SIZE(dbsc_config7); i++) in blanche_init_dbsc()
268 dbsc_wait(0x2a0); in blanche_init_dbsc()
270 for (i = 0; i < ARRAY_SIZE(dbsc_config8); i++) in blanche_init_dbsc()
277 volatile u32 i = cnt * 0x10000; in s_init_wait()
279 while (i-- > 0) in s_init_wait()
303 return 0; in board_early_init_f()
309 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
311 return 0; in board_init()
317 int rc = 0; in board_eth_init()
323 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); in board_eth_init()
326 dev = eth_get_dev_by_index(0); in board_eth_init()
342 if (fdtdec_setup_mem_size_base() != 0) in dram_init()
345 return 0; in dram_init()
352 return 0; in dram_init_banksize()