Lines Matching refs:M4

36 MUX_VAL(CONTROL_PADCONF_CAM_D0, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
37 MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \
39 MUX_VAL(CONTROL_PADCONF_CAM_D3, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
40 MUX_VAL(CONTROL_PADCONF_CAM_D4, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
45 MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \
47 MUX_VAL(CONTROL_PADCONF_CAM_D11, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \
48 MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \
49 MUX_VAL(CONTROL_PADCONF_CAM_HS, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \
50 MUX_VAL(CONTROL_PADCONF_CAM_PCLK, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
51 MUX_VAL(CONTROL_PADCONF_CAM_STROBE, (IDIS | PTU | EN | SB_HI | SB_PU | M4)) \
52 MUX_VAL(CONTROL_PADCONF_CAM_VS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
53 MUX_VAL(CONTROL_PADCONF_CAM_WEN, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
54 MUX_VAL(CONTROL_PADCONF_CAM_XCLKA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
148 MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \
165 MUX_VAL(CONTROL_PADCONF_I2C3_SCL, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
166 MUX_VAL(CONTROL_PADCONF_I2C3_SDA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
177 MUX_VAL(CONTROL_PADCONF_MCBSP_CLKS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
178 MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
179 MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \
180 MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \
183 MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \
189 MUX_VAL(CONTROL_PADCONF_MCBSP3_DR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \