Lines Matching +full:5 +full:k
34 unsigned k; in board_early_init_f() local
36 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) in board_early_init_f()
37 gd->arch.fpga_state[k] = 0; in board_early_init_f()
44 unsigned k; in board_early_init_r() local
47 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) in board_early_init_r()
48 gd->arch.fpga_state[k] = 0; in board_early_init_r()
59 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { in board_early_init_r()
61 while (!mpc8308_get_fpga_done(k)) { in board_early_init_r()
63 if (ctr++ > 5) { in board_early_init_r()
64 gd->arch.fpga_state[k] |= in board_early_init_r()
75 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { in board_early_init_r()
83 FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN); in board_early_init_r()
85 FPGA_GET_REG(k, REFLECTION_TESTREG, &val); in board_early_init_r()
90 if (ctr++ > 5) { in board_early_init_r()
91 gd->arch.fpga_state[k] |= in board_early_init_r()