Lines Matching +full:two +full:- +full:ethernet
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7 ------------------
8 The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
9 processor cores with high-performance data path acceleration architecture
14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
16 - Interconnect CoreNet platform
17 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
19 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
21 - Packet parsing, classification, and distribution
22 - Queue management for scheduling, packet sequencing, and congestion
24 - Cryptography Acceleration (SEC 5.0)
25 - RegEx Pattern Matching Acceleration (PME 2.2)
26 - IEEE Std 1588 support
27 - Hardware buffer management for buffer allocation and deallocation
28 - Ethernet interfaces
29 - Integrated 8-port Gigabit Ethernet switch (T1040 only)
30 - Four 1 Gbps Ethernet controllers
31 - Two RGMII interfaces or one RGMII and one MII interfaces
32 - High speed peripheral interfaces
33 - Four PCI Express 2.0 controllers running at up to 5 GHz
34 - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation
35 - Upto two QSGMII interface
36 - Upto six SGMII interface supporting 1000 Mbps
37 - One SGMII interface supporting upto 2500 Mbps
38 - Additional peripheral interfaces
39 - Two USB 2.0 controllers with integrated PHY
40 - SD/eSDHC/eMMC
41 - eSPI controller
42 - Four I2C controllers
43 - Four UARTs
44 - Four GPIO controllers
45 - Integrated flash controller (IFC)
46 - LCD and HDMI interface (DIU) with 12 bit dual data rate
47 - TDM interface
48 - Multicore programmable interrupt controller (PIC)
49 - Two 8-channel DMA engines
50 - Single source clocking implementation
51 - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
54 -----------------------
55 - SERDES Connections, 8 lanes supporting:
61 - DDR Controller
62 - Supports rates of up to 1600 MHz data-rate
63 - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types.
64 -IFC/Local Bus
65 - NAND flash: 8-bit, async, up to 2GB.
66 - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
67 - GASIC: Simple (minimal) target within Qixis FPGA
68 - PromJET rapid memory download support
69 - Ethernet
70 - Two on-board RGMII 10/100/1G ethernet ports.
71 - PHY #0 remains powered up during deep-sleep (T1040 only)
72 - QIXIS System Logic FPGA
73 - Clocks
74 - System and DDR clock (SYSCLK, “DDRCLK”)
75 - SERDES clocks
76 - Power Supplies
77 - Video
78 - DIU supports video at up to 1280x1024x32bpp
79 - USB
80 - Supports two USB 2.0 ports with integrated PHYs
81 — Two type A ports with 5V@1.5A per port.
82 — Second port can be converted to OTG mini-AB
83 - SDHC
84 - SDHC port connects directly to an adapter card slot, featuring:
85 - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
87 - SPI
88 - On-board support of 3 different devices and sizes
89 - Other IO
90 - Two Serial ports
91 - ProfiBus port
92 - Four I2C ports
95 ----------------------
99 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
100 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
108 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
119 --------------------------------
121 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
122 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
128 0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB
129 0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB
138 --------------------------------------------------------------
141 1. U-Boot environment variable hwconfig
160 --------------------
163 --------------------
167 --------------------
168 T1042 is a reduced personality of T1040 without Integrated 8-port Gigabit
169 Ethernet switch. Rest of the blocks are same as T1040