Lines Matching +full:ras +full:- +full:to +full:- +full:cas

1 // SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/mx6-ddr.h>
12 	/* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */
18 	/* SDCKE[0:1]: 100k pull-up */
21 	/* SDBA2: pull-up disabled */
23 	/* SDODT[0:1]: 100k pull-up, 48 ohm */
77 	.rtt_wr     = 1,	/* DDR3_RTT_60_OHM - RTT_Wr = RZQ/4 */
78 	.rtt_nom    = 1,	/* DDR3_RTT_60_OHM - RTT_Nom = RZQ/4 */
89 /* MT41K128M16JT-125 */
115 	/* Read Calibration: DQS delay relative to DQ read access */
118 	/* Write Calibration: DQ/DM delay relative to DQS write access */
132  * - we have a stack and a place to store GD, both in SRAM
133  * - no variable global data is available
146 	/* UART clocks enabled and gd valid - init serial console */  in board_init_f()
149 	/* configure MMDC for SDRAM width/size and per-model calibration */  in board_init_f()