374 	       (INTB << D31IP_SMIP) | (INTA << D31IP_SIP), RCB_REG(D31IP));  in rcba_config()
375 	writel(NOINT << D30IP_PIP, RCB_REG(D30IP));  in rcba_config()
376 	writel(INTA << D29IP_E1P, RCB_REG(D29IP));  in rcba_config()
377 	writel(INTA << D28IP_P3IP, RCB_REG(D28IP));  in rcba_config()
378 	writel(INTA << D27IP_ZIP, RCB_REG(D27IP));  in rcba_config()
379 	writel(INTA << D26IP_E2P, RCB_REG(D26IP));  in rcba_config()
380 	writel(NOINT << D25IP_LIP, RCB_REG(D25IP));  in rcba_config()
381 	writel(NOINT << D22IP_MEI1IP, RCB_REG(D22IP));  in rcba_config()
384 	writel(DIR_ROUTE(PIRQB, PIRQH, PIRQA, PIRQC), RCB_REG(D31IR));  in rcba_config()
385 	writel(DIR_ROUTE(PIRQD, PIRQE, PIRQF, PIRQG), RCB_REG(D29IR));  in rcba_config()
386 	writel(DIR_ROUTE(PIRQB, PIRQC, PIRQD, PIRQE), RCB_REG(D28IR));  in rcba_config()
387 	writel(DIR_ROUTE(PIRQA, PIRQH, PIRQA, PIRQB), RCB_REG(D27IR));  in rcba_config()
388 	writel(DIR_ROUTE(PIRQF, PIRQE, PIRQG, PIRQH), RCB_REG(D26IR));  in rcba_config()
389 	writel(DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD), RCB_REG(D25IR));  in rcba_config()
390 	writel(DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD), RCB_REG(D22IR));  in rcba_config()
393 	writew(0x0100, RCB_REG(OIC));  in rcba_config()
395 	(void)readw(RCB_REG(OIC));  in rcba_config()
398 	setbits_le32(RCB_REG(FD), PCH_DISABLE_ALWAYS);  in rcba_config()