Lines Matching refs:MCHBAR_REG
171 if (!(readl(MCHBAR_REG(BIOS_MAILBOX_INTERFACE)) & in pcode_ready()
192 writel(command | MAILBOX_RUN_BUSY, MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in pcode_mailbox_read()
201 return readl(MCHBAR_REG(BIOS_MAILBOX_DATA)); in pcode_mailbox_read()
214 writel(data, MCHBAR_REG(BIOS_MAILBOX_DATA)); in pcode_mailbox_write()
217 writel(command | MAILBOX_RUN_BUSY, MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in pcode_mailbox_write()
311 writel(~0, MCHBAR_REG(BIOS_MAILBOX_DATA)); in calibrate_24mhz_bclk()
313 MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in calibrate_24mhz_bclk()
319 err_code = readl(MCHBAR_REG(BIOS_MAILBOX_INTERFACE)) & 0xff; in calibrate_24mhz_bclk()
325 MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in calibrate_24mhz_bclk()
332 readl(MCHBAR_REG(BIOS_MAILBOX_DATA))); in calibrate_24mhz_bclk()
703 writel(limit.lo, MCHBAR_REG(MCH_PKG_POWER_LIMIT_LO)); in cpu_set_power_limits()
704 writel(limit.hi, MCHBAR_REG(MCH_PKG_POWER_LIMIT_HI)); in cpu_set_power_limits()
707 msr.lo = readl(MCHBAR_REG(MCH_DDR_POWER_LIMIT_LO)); in cpu_set_power_limits()
708 msr.hi = readl(MCHBAR_REG(MCH_DDR_POWER_LIMIT_HI)); in cpu_set_power_limits()