Lines Matching +full:0 +full:xfe040000
12 #define CCR_CACHE_INIT 0x0000090b
15 #define TRA 0xFF000020
16 #define EXPEVT 0xFF000024
17 #define INTEVT 0xFF000028
20 #define CCR 0xFF00001C
21 #define QACR0 0xFF000038
22 #define QACR1 0xFF00003C
23 #define RAMCR 0xFF000074
27 #define WDTST 0xFFCC0000
28 #define WDTCSR 0xFFCC0004
29 #define WDTBST 0xFFCC0008
30 #define WDTCNT 0xFFCC0010
31 #define WDTBCNT 0xFFCC0018
34 #define TMU_BASE 0xFFD80000
37 #define SCIF1_BASE 0xffeb0000
40 #define MMSELR 0xfc400020
41 #define LBSC_BASE 0xff800000
42 #define BCR (LBSC_BASE + 0x1000)
43 #define CS0BCR (LBSC_BASE + 0x2000)
44 #define CS1BCR (LBSC_BASE + 0x2010)
45 #define CS2BCR (LBSC_BASE + 0x2020)
46 #define CS3BCR (LBSC_BASE + 0x2030)
47 #define CS4BCR (LBSC_BASE + 0x2040)
48 #define CS5BCR (LBSC_BASE + 0x2050)
49 #define CS6BCR (LBSC_BASE + 0x2060)
50 #define CS0WCR (LBSC_BASE + 0x2008)
51 #define CS1WCR (LBSC_BASE + 0x2018)
52 #define CS2WCR (LBSC_BASE + 0x2028)
53 #define CS3WCR (LBSC_BASE + 0x2038)
54 #define CS4WCR (LBSC_BASE + 0x2048)
55 #define CS5WCR (LBSC_BASE + 0x2058)
56 #define CS6WCR (LBSC_BASE + 0x2068)
57 #define CS5PCR (LBSC_BASE + 0x2070)
58 #define CS6PCR (LBSC_BASE + 0x2080)
61 #define SH7780_PCIECR 0xFE000008
62 #define SH7780_PCIVID 0xFE040000
63 #define SH7780_PCIDID 0xFE040002
64 #define SH7780_PCICMD 0xFE040004
65 #define SH7780_PCISTATUS 0xFE040006
66 #define SH7780_PCIRID 0xFE040008
67 #define SH7780_PCIPIF 0xFE040009
68 #define SH7780_PCISUB 0xFE04000A
69 #define SH7780_PCIBCC 0xFE04000B
70 #define SH7780_PCICLS 0xFE04000C
71 #define SH7780_PCILTM 0xFE04000D
72 #define SH7780_PCIHDR 0xFE04000E
73 #define SH7780_PCIBIST 0xFE04000F
74 #define SH7780_PCIIBAR 0xFE040010
75 #define SH7780_PCIMBAR0 0xFE040014
76 #define SH7780_PCIMBAR1 0xFE040018
77 #define SH7780_PCISVID 0xFE04002C
78 #define SH7780_PCISID 0xFE04002E
79 #define SH7780_PCICP 0xFE040034
80 #define SH7780_PCIINTLINE 0xFE04003C
81 #define SH7780_PCIINTPIN 0xFE04003D
82 #define SH7780_PCIMINGNT 0xFE04003E
83 #define SH7780_PCIMAXLAT 0xFE04003F
84 #define SH7780_PCICID 0xFE040040
85 #define SH7780_PCINIP 0xFE040041
86 #define SH7780_PCIPMC 0xFE040042
87 #define SH7780_PCIPMCSR 0xFE040044
88 #define SH7780_PCIPMCSRBSE 0xFE040046
89 #define SH7780_PCI_CDD 0xFE040047
90 #define SH7780_PCICR 0xFE040100
91 #define SH7780_PCILSR0 0xFE040104
92 #define SH7780_PCILSR1 0xFE040108
93 #define SH7780_PCILAR0 0xFE04010C
94 #define SH7780_PCILAR1 0xFE040110
95 #define SH7780_PCIIR 0xFE040114
96 #define SH7780_PCIIMR 0xFE040118
97 #define SH7780_PCIAIR 0xFE04011C
98 #define SH7780_PCICIR 0xFE040120
99 #define SH7780_PCIAINT 0xFE040130
100 #define SH7780_PCIAINTM 0xFE040134
101 #define SH7780_PCIBMIR 0xFE040138
102 #define SH7780_PCIPAR 0xFE0401C0
103 #define SH7780_PCIPINT 0xFE0401CC
104 #define SH7780_PCIPINTM 0xFE0401D0
105 #define SH7780_PCIMBR0 0xFE0401E0
106 #define SH7780_PCIMBMR0 0xFE0401E4
107 #define SH7780_PCIMBR1 0xFE0401E8
108 #define SH7780_PCIMBMR1 0xFE0401EC
109 #define SH7780_PCIMBR2 0xFE0401F0
110 #define SH7780_PCIMBMR2 0xFE0401F4
111 #define SH7780_PCIIOBR 0xFE0401F8
112 #define SH7780_PCIIOBMR 0xFE0401FC
113 #define SH7780_PCICSCR0 0xFE040210
114 #define SH7780_PCICSCR1 0xFE040214
115 #define SH7780_PCICSAR0 0xFE040218
116 #define SH7780_PCICSAR1 0xFE04021C
117 #define SH7780_PCIPDR 0xFE040220