Lines Matching +full:0 +full:xfe040000
11 #define CCR_CACHE_INIT 0x0000090b
14 #define TRA 0xFF000020
15 #define EXPEVT 0xFF000024
16 #define INTEVT 0xFF000028
19 #define PTEH 0xFF000000
20 #define PTEL 0xFF000004
21 #define TTB 0xFF000008
22 #define TEA 0xFF00000C
23 #define MMUCR 0xFF000010
24 #define PASCR 0xFF000070
25 #define IRMCR 0xFF000078
28 #define CCR 0xFF00001C
29 #define QACR0 0xFF000038
30 #define QACR1 0xFF00003C
31 #define RAMCR 0xFF000074
34 #define RAMCR 0xFF000074
35 #define LSA0 0xFF000050
36 #define LSA1 0xFF000054
37 #define LDA0 0xFF000058
38 #define LDA1 0xFF00005C
41 #define ICR0 0xFFD00000
42 #define ICR1 0xFFD0001C
43 #define INTPRI 0xFFD00010
44 #define INTREQ 0xFFD00024
45 #define INTMSK0 0xFFD00044
46 #define INTMSK1 0xFFD00048
47 #define INTMSK2 0xFFD40080
48 #define INTMSKCLR0 0xFFD00064
49 #define INTMSKCLR1 0xFFD00068
50 #define INTMSKCLR2 0xFFD40084
51 #define NMIFCR 0xFFD000C0
52 #define USERIMASK 0xFFD30000
53 #define INT2PRI0 0xFFD40000
54 #define INT2PRI1 0xFFD40004
55 #define INT2PRI2 0xFFD40008
56 #define INT2PRI3 0xFFD4000C
57 #define INT2PRI4 0xFFD40010
58 #define INT2PRI5 0xFFD40014
59 #define INT2PRI6 0xFFD40018
60 #define INT2PRI7 0xFFD4001C
61 #define INT2A0 0xFFD40030
62 #define INT2A1 0xFFD40034
63 #define INT2MSKR 0xFFD40038
64 #define INT2MSKCR 0xFFD4003C
65 #define INT2B0 0xFFD40040
66 #define INT2B1 0xFFD40044
67 #define INT2B2 0xFFD40048
68 #define INT2B3 0xFFD4004C
69 #define INT2B4 0xFFD40050
70 #define INT2B5 0xFFD40054
71 #define INT2B6 0xFFD40058
72 #define INT2B7 0xFFD4005C
73 #define INT2GPIC 0xFFD40090
76 #define MMSELR 0xFF400020
77 #define BCR 0xFF801000
78 #define CS0BCR 0xFF802000
79 #define CS1BCR 0xFF802010
80 #define CS2BCR 0xFF802020
81 #define CS4BCR 0xFF802040
82 #define CS5BCR 0xFF802050
83 #define CS6BCR 0xFF802060
84 #define CS0WCR 0xFF802008
85 #define CS1WCR 0xFF802018
86 #define CS2WCR 0xFF802028
87 #define CS4WCR 0xFF802048
88 #define CS5WCR 0xFF802058
89 #define CS6WCR 0xFF802068
90 #define CS5PCR 0xFF802070
91 #define CS6PCR 0xFF802080
94 #define MIM_1 0xFE800008
95 #define MIM_2 0xFE80000C
96 #define SCR_1 0xFE800010
97 #define SCR_2 0xFE800014
98 #define STR_1 0xFE800018
99 #define STR_2 0xFE80001C
100 #define SDR_1 0xFE800030
101 #define SDR_2 0xFE800034
102 #define DBK_1 0xFE800400
103 #define DBK_2 0xFE800404
106 #define SH7780_PCIECR 0xFE000008
107 #define SH7780_PCIVID 0xFE040000
108 #define SH7780_PCIDID 0xFE040002
109 #define SH7780_PCICMD 0xFE040004
110 #define SH7780_PCISTATUS 0xFE040006
111 #define SH7780_PCIRID 0xFE040008
112 #define SH7780_PCIPIF 0xFE040009
113 #define SH7780_PCISUB 0xFE04000A
114 #define SH7780_PCIBCC 0xFE04000B
115 #define SH7780_PCICLS 0xFE04000C
116 #define SH7780_PCILTM 0xFE04000D
117 #define SH7780_PCIHDR 0xFE04000E
118 #define SH7780_PCIBIST 0xFE04000F
119 #define SH7780_PCIIBAR 0xFE040010
120 #define SH7780_PCIMBAR0 0xFE040014
121 #define SH7780_PCIMBAR1 0xFE040018
122 #define SH7780_PCISVID 0xFE04002C
123 #define SH7780_PCISID 0xFE04002E
124 #define SH7780_PCICP 0xFE040034
125 #define SH7780_PCIINTLINE 0xFE04003C
126 #define SH7780_PCIINTPIN 0xFE04003D
127 #define SH7780_PCIMINGNT 0xFE04003E
128 #define SH7780_PCIMAXLAT 0xFE04003F
129 #define SH7780_PCICID 0xFE040040
130 #define SH7780_PCINIP 0xFE040041
131 #define SH7780_PCIPMC 0xFE040042
132 #define SH7780_PCIPMCSR 0xFE040044
133 #define SH7780_PCIPMCSRBSE 0xFE040046
134 #define SH7780_PCI_CDD 0xFE040047
135 #define SH7780_PCICR 0xFE040100
136 #define SH7780_PCILSR0 0xFE040104
137 #define SH7780_PCILSR1 0xFE040108
138 #define SH7780_PCILAR0 0xFE04010C
139 #define SH7780_PCILAR1 0xFE040110
140 #define SH7780_PCIIR 0xFE040114
141 #define SH7780_PCIIMR 0xFE040118
142 #define SH7780_PCIAIR 0xFE04011C
143 #define SH7780_PCICIR 0xFE040120
144 #define SH7780_PCIAINT 0xFE040130
145 #define SH7780_PCIAINTM 0xFE040134
146 #define SH7780_PCIBMIR 0xFE040138
147 #define SH7780_PCIPAR 0xFE0401C0
148 #define SH7780_PCIPINT 0xFE0401CC
149 #define SH7780_PCIPINTM 0xFE0401D0
150 #define SH7780_PCIMBR0 0xFE0401E0
151 #define SH7780_PCIMBMR0 0xFE0401E4
152 #define SH7780_PCIMBR1 0xFE0401E8
153 #define SH7780_PCIMBMR1 0xFE0401EC
154 #define SH7780_PCIMBR2 0xFE0401F0
155 #define SH7780_PCIMBMR2 0xFE0401F4
156 #define SH7780_PCIIOBR 0xFE0401F8
157 #define SH7780_PCIIOBMR 0xFE0401FC
158 #define SH7780_PCICSCR0 0xFE040210
159 #define SH7780_PCICSCR1 0xFE040214
160 #define SH7780_PCICSAR0 0xFE040218
161 #define SH7780_PCICSAR1 0xFE04021C
162 #define SH7780_PCIPDR 0xFE040220
165 #define DMAC_SAR0 0xFC808020
166 #define DMAC_DAR0 0xFC808024
167 #define DMAC_TCR0 0xFC808028
168 #define DMAC_CHCR0 0xFC80802C
169 #define DMAC_SAR1 0xFC808030
170 #define DMAC_DAR1 0xFC808034
171 #define DMAC_TCR1 0xFC808038
172 #define DMAC_CHCR1 0xFC80803C
173 #define DMAC_SAR2 0xFC808040
174 #define DMAC_DAR2 0xFC808044
175 #define DMAC_TCR2 0xFC808048
176 #define DMAC_CHCR2 0xFC80804C
177 #define DMAC_SAR3 0xFC808050
178 #define DMAC_DAR3 0xFC808054
179 #define DMAC_TCR3 0xFC808058
180 #define DMAC_CHCR3 0xFC80805C
181 #define DMAC_DMAOR0 0xFC808060
182 #define DMAC_SAR4 0xFC808070
183 #define DMAC_DAR4 0xFC808074
184 #define DMAC_TCR4 0xFC808078
185 #define DMAC_CHCR4 0xFC80807C
186 #define DMAC_SAR5 0xFC808080
187 #define DMAC_DAR5 0xFC808084
188 #define DMAC_TCR5 0xFC808088
189 #define DMAC_CHCR5 0xFC80808C
190 #define DMAC_SARB0 0xFC808120
191 #define DMAC_DARB0 0xFC808124
192 #define DMAC_TCRB0 0xFC808128
193 #define DMAC_SARB1 0xFC808130
194 #define DMAC_DARB1 0xFC808134
195 #define DMAC_TCRB1 0xFC808138
196 #define DMAC_SARB2 0xFC808140
197 #define DMAC_DARB2 0xFC808144
198 #define DMAC_TCRB2 0xFC808148
199 #define DMAC_SARB3 0xFC808150
200 #define DMAC_DARB3 0xFC808154
201 #define DMAC_TCRB3 0xFC808158
202 #define DMAC_DMARS0 0xFC809000
203 #define DMAC_DMARS1 0xFC809004
204 #define DMAC_DMARS2 0xFC809008
205 #define DMAC_SAR6 0xFC818020
206 #define DMAC_DAR6 0xFC818024
207 #define DMAC_TCR6 0xFC818028
208 #define DMAC_CHCR6 0xFC81802C
209 #define DMAC_SAR7 0xFC818030
210 #define DMAC_DAR7 0xFC818034
211 #define DMAC_TCR7 0xFC818038
212 #define DMAC_CHCR7 0xFC81803C
213 #define DMAC_SAR8 0xFC818040
214 #define DMAC_DAR8 0xFC818044
215 #define DMAC_TCR8 0xFC818048
216 #define DMAC_CHCR8 0xFC81804C
217 #define DMAC_SAR9 0xFC818050
218 #define DMAC_DAR9 0xFC818054
219 #define DMAC_TCR9 0xFC818058
220 #define DMAC_CHCR9 0xFC81805C
221 #define DMAC_DMAOR1 0xFC818060
222 #define DMAC_SAR10 0xFC818070
223 #define DMAC_DAR10 0xFC818074
224 #define DMAC_TCR10 0xFC818078
225 #define DMAC_CHCR10 0xFC81807C
226 #define DMAC_SAR11 0xFC818080
227 #define DMAC_DAR11 0xFC818084
228 #define DMAC_TCR11 0xFC818088
229 #define DMAC_CHCR11 0xFC81808C
230 #define DMAC_SARB6 0xFC818120
231 #define DMAC_DARB6 0xFC818124
232 #define DMAC_TCRB6 0xFC818128
233 #define DMAC_SARB7 0xFC818130
234 #define DMAC_DARB7 0xFC818134
235 #define DMAC_TCRB7 0xFC818138
236 #define DMAC_SARB8 0xFC818140
237 #define DMAC_DARB8 0xFC818144
238 #define DMAC_TCRB8 0xFC818148
239 #define DMAC_SARB9 0xFC818150
240 #define DMAC_DARB9 0xFC818154
241 #define DMAC_TCRB9 0xFC818158
244 #define FRQCR 0xFFC80000
245 #define PLLCR 0xFFC80024
246 #define MSTPCR 0xFFC80030
250 #define WDTST 0xFFCC0000
251 #define WDTCSR 0xFFCC0004
252 #define WDTBST 0xFFCC0008
253 #define WDTCNT 0xFFCC0010
254 #define WDTBCNT 0xFFCC0018
257 #define MSTPCR 0xFFC80030
260 #define TMU_BASE 0xFFD80000
263 #define CMTCFG 0xFFE30000
264 #define CMTFRT 0xFFE30004
265 #define CMTCTL 0xFFE30008
266 #define CMTIRQS 0xFFE3000C
267 #define CMTCH0T 0xFFE30010
268 #define CMTCH0ST 0xFFE30020
269 #define CMTCH0C 0xFFE30030
270 #define CMTCH1T 0xFFE30014
271 #define CMTCH1ST 0xFFE30024
272 #define CMTCH1C 0xFFE30034
273 #define CMTCH2T 0xFFE30018
274 #define CMTCH2C 0xFFE30038
275 #define CMTCH3T 0xFFE3001C
276 #define CMTCH3C 0xFFE3003C
279 #define R64CNT 0xFFE80000
280 #define RSECCNT 0xFFE80004
281 #define RMINCNT 0xFFE80008
282 #define RHRCNT 0xFFE8000C
283 #define RWKCNT 0xFFE80010
284 #define RDAYCNT 0xFFE80014
285 #define RMONCNT 0xFFE80018
286 #define RYRCNT 0xFFE8001C
287 #define RSECAR 0xFFE80020
288 #define RMINAR 0xFFE80024
289 #define RHRAR 0xFFE80028
290 #define RWKAR 0xFFE8002C
291 #define RDAYAR 0xFFE80030
292 #define RMONAR 0xFFE80034
293 #define RCR1 0xFFE80038
294 #define RCR2 0xFFE8003C
295 #define RCR3 0xFFE80050
296 #define RYRAR 0xFFE80054
299 #define SCSMR0 0xFFE00000
303 #define SIMDR 0xFFE20000
304 #define SISCR 0xFFE20002
305 #define SITDAR 0xFFE20004
306 #define SIRDAR 0xFFE20006
307 #define SICDAR 0xFFE20008
308 #define SICTR 0xFFE2000C
309 #define SIFCTR 0xFFE20010
310 #define SISTR 0xFFE20014
311 #define SIIER 0xFFE20016
312 #define SITCR 0xFFE20028
313 #define SIRCR 0xFFE2002C
314 #define SPICR 0xFFE20030
317 #define SPCR 0xFFE50000
318 #define SPSR 0xFFE50004
319 #define SPSCR 0xFFE50008
320 #define SPTBR 0xFFE5000C
321 #define SPRBR 0xFFE50010
324 #define CMDR0 0xFFE60000
325 #define CMDR1 0xFFE60001
326 #define CMDR2 0xFFE60002
327 #define CMDR3 0xFFE60003
328 #define CMDR4 0xFFE60004
329 #define CMDR5 0xFFE60005
330 #define CMDSTRT 0xFFE60006
331 #define OPCR 0xFFE6000A
332 #define CSTR 0xFFE6000B
333 #define INTCR0 0xFFE6000C
334 #define INTCR1 0xFFE6000D
335 #define INTSTR0 0xFFE6000E
336 #define INTSTR1 0xFFE6000F
337 #define CLKON 0xFFE60010
338 #define CTOCR 0xFFE60011
339 #define TBCR 0xFFE60014
340 #define MODER 0xFFE60016
341 #define CMDTYR 0xFFE60018
342 #define RSPTYR 0xFFE60019
343 #define TBNCR 0xFFE6001A
344 #define RSPR0 0xFFE60020
345 #define RSPR1 0xFFE60021
346 #define RSPR2 0xFFE60022
347 #define RSPR3 0xFFE60023
348 #define RSPR4 0xFFE60024
349 #define RSPR5 0xFFE60025
350 #define RSPR6 0xFFE60026
351 #define RSPR7 0xFFE60027
352 #define RSPR8 0xFFE60028
353 #define RSPR9 0xFFE60029
354 #define RSPR10 0xFFE6002A
355 #define RSPR11 0xFFE6002B
356 #define RSPR12 0xFFE6002C
357 #define RSPR13 0xFFE6002D
358 #define RSPR14 0xFFE6002E
359 #define RSPR15 0xFFE6002F
360 #define RSPR16 0xFFE60030
361 #define RSPRD 0xFFE60031
362 #define DTOUTR 0xFFE60032
363 #define DR 0xFFE60040
364 #define DMACR 0xFFE60044
365 #define INTCR2 0xFFE60046
366 #define INTSTR2 0xFFE60048
369 #define HACCR 0xFFE40008
370 #define HACCSAR 0xFFE40020
371 #define HACCSDR 0xFFE40024
372 #define HACPCML 0xFFE40028
373 #define HACPCMR 0xFFE4002C
374 #define HACTIER 0xFFE40050
375 #define HACTSR 0xFFE40054
376 #define HACRIER 0xFFE40058
377 #define HACRSR 0xFFE4005C
378 #define HACACR 0xFFE40060
381 #define SSICR 0xFFE70000
382 #define SSISR 0xFFE70004
383 #define SSITDR 0xFFE70008
384 #define SSIRDR 0xFFE7000C
387 #define FLCMNCR 0xFFE90000
388 #define FLCMDCR 0xFFE90004
389 #define FLCMCDR 0xFFE90008
390 #define FLADR 0xFFE9000C
391 #define FLDATAR 0xFFE90010
392 #define FLDTCNTR 0xFFE90014
393 #define FLINTDMACR 0xFFE90018
394 #define FLBSYTMR 0xFFE9001C
395 #define FLBSYCNT 0xFFE90020
396 #define FLTRCR 0xFFE9002C
399 #define PACR 0xFFEA0000
400 #define PBCR 0xFFEA0002
401 #define PCCR 0xFFEA0004
402 #define PDCR 0xFFEA0006
403 #define PECR 0xFFEA0008
404 #define PFCR 0xFFEA000A
405 #define PGCR 0xFFEA000C
406 #define PHCR 0xFFEA000E
407 #define PJCR 0xFFEA0010
408 #define PKCR 0xFFEA0012
409 #define PLCR 0xFFEA0014
410 #define PMCR 0xFFEA0016
411 #define PADR 0xFFEA0020
412 #define PBDR 0xFFEA0022
413 #define PCDR 0xFFEA0024
414 #define PDDR 0xFFEA0026
415 #define PEDR 0xFFEA0028
416 #define PFDR 0xFFEA002A
417 #define PGDR 0xFFEA002C
418 #define PHDR 0xFFEA002E
419 #define PJDR 0xFFEA0030
420 #define PKDR 0xFFEA0032
421 #define PLDR 0xFFEA0034
422 #define PMDR 0xFFEA0036
423 #define PEPUPR 0xFFEA0048
424 #define PHPUPR 0xFFEA004E
425 #define PJPUPR 0xFFEA0050
426 #define PKPUPR 0xFFEA0052
427 #define PMPUPR 0xFFEA0056
428 #define PPUPR1 0xFFEA0060
429 #define PPUPR2 0xFFEA0062
430 #define PMSELR 0xFFEA0080
433 #define CBR0 0xFF200000
434 #define CRR0 0xFF200004
435 #define CAR0 0xFF200008
436 #define CAMR0 0xFF20000C
437 #define CBR1 0xFF200020
438 #define CRR1 0xFF200024
439 #define CAR1 0xFF200028
440 #define CAMR1 0xFF20002C
441 #define CDR1 0xFF200030
442 #define CDMR1 0xFF200034
443 #define CETR1 0xFF200038
444 #define CCMFR 0xFF200600
445 #define CBCR 0xFF200620