5  * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
19  * Buffer descriptors must be allocated from the dual ported memory
30  * because we have stack and init data in dual port ram
34 #define CPM_DATAONLY_SIZE	((uint)(8 * 1024) - CPM_DATAONLY_BASE)
46 	gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;  in m8560_cpm_reset()
47 	gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;  in m8560_cpm_reset()
52 	cpm->im_cpm_cp.cpcr = CPM_CR_RST;  in m8560_cpm_reset()
56 	} while ((cpm->im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000);  in m8560_cpm_reset()
59 /* Allocate some memory from the dual ported ram.
71 	align_mask = align - 1;  in m8560_cpm_dpalloc()
72 	savebase = gd->arch.dp_alloc_base;  in m8560_cpm_dpalloc()
74 	off = gd->arch.dp_alloc_base & align_mask;  in m8560_cpm_dpalloc()
76 		gd->arch.dp_alloc_base += (align - off);  in m8560_cpm_dpalloc()
79 		size += align - off;  in m8560_cpm_dpalloc()
81 	if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {  in m8560_cpm_dpalloc()
82 		gd->arch.dp_alloc_base = savebase;  in m8560_cpm_dpalloc()
83 		panic("m8560_cpm_dpalloc: ran out of dual port ram!");  in m8560_cpm_dpalloc()
86 	retloc = gd->arch.dp_alloc_base;  in m8560_cpm_dpalloc()
87 	gd->arch.dp_alloc_base += size;  in m8560_cpm_dpalloc()
89 	memset((void *)&(cpm->im_dprambase[retloc]), 0, size);  in m8560_cpm_dpalloc()
100 	/* the host might not even have RAM yet - just use dual port RAM */  in m8560_cpm_hostalloc()
111  * Baud rate clocks are zero-based in the driver code (as that maps
112  * to port numbers).  Documentation uses 1-based numbering.
114 #define BRG_INT_CLK	gd->arch.brg_clk
129 		bp = (uint *)&(cpm->im_cpm_brg1.brgc1);  in m8560_cpm_setbrg()
132 		bp = (uint *)&(cpm->im_cpm_brg2.brgc5);  in m8560_cpm_setbrg()
133 		brg -= 4;  in m8560_cpm_setbrg()
136 	*bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;  in m8560_cpm_setbrg()
151 		bp = (uint *)&(cpm->im_cpm_brg1.brgc1);  in m8560_cpm_fastbrg()
154 		bp = (uint *)&(cpm->im_cpm_brg2.brgc5);  in m8560_cpm_fastbrg()
155 		brg -= 4;  in m8560_cpm_fastbrg()
158 	*bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;  in m8560_cpm_fastbrg()
174 		bp = (uint *)&(cpm->im_cpm_brg1.brgc1);  in m8560_cpm_extcbrg()
177 		bp = (uint *)&(cpm->im_cpm_brg2.brgc5);  in m8560_cpm_extcbrg()
178 		brg -= 4;  in m8560_cpm_extcbrg()
181 	*bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;  in m8560_cpm_extcbrg()