Lines Matching +full:rom +full:- +full:19 +full:h
1 /* SPDX-License-Identifier: GPL-2.0+ */
10 * U-Boot - Startup Code for MPC83xx PowerPC based Embedded Boards
13 #include <asm-offsets.h>
14 #include <config.h>
15 #include <mpc83xx.h>
16 #include <version.h>
21 #include <ppc_defs.h>
23 #include <asm/cache.h>
24 #include <asm/mmu.h>
25 #include <asm/u-boot.h>
86 * Magic number and version string - put it after the HRCW since it
89 .long 0x27051956 /* U-Boot Magic Number */
146 * This determines the location of the boot ROM (flash or EPROM) in the
153 * bottom 32K of the boot ROM is effectively repeated all throughout the
155 * address at which the boot ROM was linked at compile time, and proceed
158 * we configure BR0 with the same boot ROM link address).
164 lis r4, CONFIG_DEFAULT_IMMR@h
173 lis r3, CONFIG_SYS_IMMR@h
187 /*------------------------------------------*/
207 /*------------------------------------------------------------*/
209 lis r4, (CONFIG_SYS_MONITOR_BASE)@h
211 addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
225 * Cache must be enabled here for stack-in-cache trick.
232 * everything is write-through.
233 * The init-mem BAT can be reused after reloc. The old
234 * gt-regs BAT can be reused after board_init_f calls
250 * cache-ram; use r3 to keep the new SP for now to
252 lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
272 /* r3 = new stack pointer / pre-reloc malloc area */
275 /* Set pointer to pre-reloc malloc area in GD */
279 stwu r0, -4(r3) /* clear final stack frame so that */
280 stwu r0, -4(r3) /* stack backtraces terminate cleanly */
285 /* let the C-code set up the rest */
288 /*------------------------------------------------------*/
291 /* Needed for -msingle-pic-base */
292 bl _GLOBAL_OFFSET_TABLE_@local-4
296 lis r3, CONFIG_SYS_IMMR@h
297 /* run low-level CPU init code (in Flash)*/
304 /* NOTREACHED - board_init_f() does not return */
382 * well - that didnt work, so just do an infinite loop!
432 lis r22,MSR_POW@h
491 /*-----------------------------------------------------------*/
504 lis r3, CONFIG_SYS_IMMR@h
507 /*------------------------------------------------------*/
516 li r4, -0x55C7
520 /*-------------------*/
523 once disabled by SW you can't re-enable */
542 /* Initialize the Hardware Implementation-dependent Registers */
544 /* - force invalidation of data and instruction caches */
545 /*------------------------------------------------------*/
547 lis r3, CONFIG_SYS_HID0_INIT@h
552 lis r3, CONFIG_SYS_HID0_FINAL@h
557 lis r3, CONFIG_SYS_HID2@h
563 /*------------------------------*/
566 /* setup_bats - set them up to some initial state */
572 addis r4, r0, CONFIG_SYS_IBAT0L@h
574 addis r3, r0, CONFIG_SYS_IBAT0U@h
580 addis r4, r0, CONFIG_SYS_DBAT0L@h
582 addis r3, r0, CONFIG_SYS_DBAT0U@h
588 addis r4, r0, CONFIG_SYS_IBAT1L@h
590 addis r3, r0, CONFIG_SYS_IBAT1U@h
596 addis r4, r0, CONFIG_SYS_DBAT1L@h
598 addis r3, r0, CONFIG_SYS_DBAT1U@h
604 addis r4, r0, CONFIG_SYS_IBAT2L@h
606 addis r3, r0, CONFIG_SYS_IBAT2U@h
612 addis r4, r0, CONFIG_SYS_DBAT2L@h
614 addis r3, r0, CONFIG_SYS_DBAT2U@h
620 addis r4, r0, CONFIG_SYS_IBAT3L@h
622 addis r3, r0, CONFIG_SYS_IBAT3U@h
628 addis r4, r0, CONFIG_SYS_DBAT3L@h
630 addis r3, r0, CONFIG_SYS_DBAT3U@h
637 addis r4, r0, CONFIG_SYS_IBAT4L@h
639 addis r3, r0, CONFIG_SYS_IBAT4U@h
645 addis r4, r0, CONFIG_SYS_DBAT4L@h
647 addis r3, r0, CONFIG_SYS_DBAT4U@h
653 addis r4, r0, CONFIG_SYS_IBAT5L@h
655 addis r3, r0, CONFIG_SYS_IBAT5U@h
661 addis r4, r0, CONFIG_SYS_DBAT5L@h
663 addis r3, r0, CONFIG_SYS_DBAT5U@h
669 addis r4, r0, CONFIG_SYS_IBAT6L@h
671 addis r3, r0, CONFIG_SYS_IBAT6U@h
677 addis r4, r0, CONFIG_SYS_DBAT6L@h
679 addis r3, r0, CONFIG_SYS_DBAT6U@h
685 addis r4, r0, CONFIG_SYS_IBAT7L@h
687 addis r3, r0, CONFIG_SYS_IBAT7U@h
693 addis r4, r0, CONFIG_SYS_DBAT7L@h
695 addis r3, r0, CONFIG_SYS_DBAT7U@h
710 * index corresponds to bits 15-19 of the EA. To invalidate all
717 * bits 15-19 correspond to addresses 0x00000000 to 0x0001F000
765 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
797 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
812 /*-------------------------------------------------------------------*/
833 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
842 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE)
865 la r8,-4(r4)
866 la r7,-4(r3)
876 la r8,-4(r4)
877 la r7,-4(r3)
894 3: lwzu r0,-4(r8)
895 stwu r0,-4(r7)
925 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
942 addi r3,r3,-4
945 beq- 2f
959 addi r3,r3,-4
966 beq- 5f
1011 bgelr /* return if r7>=r8 - just in case */
1023 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
1024 li r8, Alignment - _start + EXC_OFF_SYS_RESET
1031 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
1034 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
1037 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
1038 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
1045 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
1046 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
1054 lis r7, MSR_IP@h /* relocated into low memory */
1070 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1092 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1119 /* When booting from ROM (Flash or EPROM), clear the */
1120 /* Address Mask in OR0 so ROM appears everywhere */
1121 /*----------------------------------------------------*/
1122 lis r3, (CONFIG_SYS_IMMR)@h /* r3 <= CONFIG_SYS_IMMR */
1134 * jumping happened. Laterly, the u-boot code has to do an absolutely
1136 * u-boot TEXT base address is. Because the TEXT base resides in the
1137 * boot ROM memory space, to garantee the code can run smoothly after
1138 * that jumping, we must map in the entire boot ROM by Local Access
1139 * Window. Sometimes, we desire an non-0x00000 or non-0xFF800 starting
1140 * address for boot ROM, such as 0xFE000000. In this case, the default
1144 lis r4, (CONFIG_SYS_FLASH_BASE)@h
1149 lis r4, (0x80000012)@h
1164 * initialized in the C code, we'd better configure boot ROM's
1168 /* Initialize the BR0 with the boot ROM starting address. */
1172 lis r5, (CONFIG_SYS_FLASH_BASE & 0xFFFF8000)@h
1178 lis r5, ~((CONFIG_SYS_FLASH_SIZE << 4) - 1)
1182 lis r4, (CONFIG_SYS_FLASH_BASE)@h
1187 lis r4, (0x80000012)@h