Lines Matching full:r1
24 ldr r1, [r0]
25 and r1, r1, #SG_REVISION_TYPE_MASK
26 mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT
30 cmp r1, #0x26
34 ldr r1, [r0]
35 orr r1, r1, #1
36 str r1, [r0]
38 sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0
47 cmp r1, #0x28
50 sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
53 mov r1, #1
54 str r1, [r0]
57 ldr r1, [r0]
58 orr r1, r1, #SC_CLKCTRL_CEN_PERI
59 str r1, [r0]
68 cmp r1, #0x29
72 ldr r1, [r0]
73 orr r1, r1, #1
74 str r1, [r0]
76 sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0
85 cmp r1, #0x2A
88 sg_set_pinsel 47, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
89 sg_set_pinsel 49, 0, 4, 8, r0, r1 @ TXD1 -> TXD1
90 sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2
91 sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3
94 mov r1, #1
95 str r1, [r0]
98 ldr r1, [r0]
99 orr r1, r1, #SC_CLKCTRL_CEN_PERI
100 str r1, [r0]
109 cmp r1, #0x2E
113 ldr r1, [r0]
114 orr r1, r1, #1
115 str r1, [r0]
117 sg_set_pinsel 217, 8, 8, 4, r0, r1 @ TXD0 -> TXD0
118 sg_set_pinsel 115, 8, 8, 4, r0, r1 @ TXD1 -> TXD1
119 sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2
120 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3
123 ldr r1, [r0]
124 orr r1, r1, #SC_CLKCTRL_CEN_PERI
125 str r1, [r0]
134 cmp r1, #0x2F
138 ldr r1, [r0]
139 orr r1, r1, #1
140 str r1, [r0]
142 sg_set_pinsel 135, 3, 8, 4, r0, r1 @ PORT10 -> TXD0
143 sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1
144 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2
147 ldr r1, [r0]
148 orr r1, r1, #SC_CLKCTRL_CEN_PERI
149 str r1, [r0]
159 addruart r0, r1, r2
160 mov r1, #UART_LCR_WLEN8 << 8
161 str r1, [r0, #0x10]