Lines Matching refs:cs
40 if (readl(&sdrc_base->cs[CS0].mr) == SDRC_MR_0_SDR) in is_mem_sdr()
68 u32 get_sdr_cs_size(u32 cs) in get_sdr_cs_size() argument
73 size = readl(&sdrc_base->cs[cs].mcfg) >> 8; in get_sdr_cs_size()
83 u32 get_sdr_cs_offset(u32 cs) in get_sdr_cs_offset() argument
87 if (!cs) in get_sdr_cs_offset()
101 static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base, in write_sdrc_timings() argument
105 writel(timings->mcfg, &sdrc_base->cs[cs].mcfg); in write_sdrc_timings()
108 writel(timings->rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl); in write_sdrc_timings()
109 writel(CMD_NOP, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
110 writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
111 writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
112 writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); in write_sdrc_timings()
113 writel(timings->mr, &sdrc_base->cs[cs].mr); in write_sdrc_timings()
119 if (!mem_ok(cs)) in write_sdrc_timings()
120 writel(0, &sdrc_base->cs[cs].mcfg); in write_sdrc_timings()
129 void do_sdrc_init(u32 cs, u32 early) in do_sdrc_init() argument
183 if (cs == CS1) { in do_sdrc_init()
184 timings.mcfg = readl(&sdrc_base->cs[CS0].mcfg), in do_sdrc_init()
185 timings.rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl); in do_sdrc_init()
188 timings.mr = readl(&sdrc_base->cs[CS0].mr); in do_sdrc_init()
189 write_sdrc_timings(cs, sdrc_actim_base1, &timings); in do_sdrc_init()